1/* 2 * Some or all of this work - Copyright (c) 2006 - 2016, Intel Corp. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without modification, 6 * are permitted provided that the following conditions are met: 7 * 8 * Redistributions of source code must retain the above copyright notice, 9 * this list of conditions and the following disclaimer. 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * Neither the name of Intel Corporation nor the names of its contributors 14 * may be used to endorse or promote products derived from this software 15 * without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 25 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29/* 30 * Resource Descriptor macros 31 * 32 * Generic Register Resource Descriptor Macro 33 */ 34 35Name (p436, Package() { 36 37 // Byte 3 (Address Space ID) of Register Descriptor 38 39 ResourceTemplate () { 40 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 41 }, 42 ResourceTemplate () { 43 Register (SystemIO, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 44 }, 45 ResourceTemplate () { 46 Register (PCI_Config, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 47 }, 48 ResourceTemplate () { 49 Register (EmbeddedControl, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 50 }, 51 ResourceTemplate () { 52 Register (SMBus, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 53 }, 54 ResourceTemplate () { 55 Register (SystemCMOS, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 56 }, 57 ResourceTemplate () { 58 Register (PciBarTarget, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 59 }, 60 ResourceTemplate () { 61 Register (IPMI, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 62 }, 63 ResourceTemplate () { 64 Register (GeneralPurposeIo, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 65 }, 66 ResourceTemplate () { 67 Register (GenericSerialBus, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 68 }, 69 ResourceTemplate () { 70 Register (FFixedHW, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9) 71 }, 72 73 // Byte 6 (Address Size) of Register Descriptor 74 75 ResourceTemplate () { 76 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 0) 77 }, 78 ResourceTemplate () { 79 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 1) 80 }, 81 ResourceTemplate () { 82 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 2) 83 }, 84 ResourceTemplate () { 85 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 3) 86 }, 87 ResourceTemplate () { 88 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 4) 89 }, 90 91 // Particular cases 92 93 ResourceTemplate () { 94 Register (SystemMemory, 0, 0, 0) 95 }, 96 ResourceTemplate () { 97 Register (SystemMemory, 0xff, 0xff, 0) 98 }, 99}) 100 101/* 102ACPI Specification, Revision 3.0, September 2, 2004 1036.4.3.7 Generic Register Descriptor 104 105Generic Register Descriptor layout: 106 107Byte 0 Generic register descriptor Value = 10000010B (0x82) (Type = 1, Large item name = 0x2) 108Byte 1 Length, bits[7:0] Value = 00001100B (12) 109Byte 2 Length, bits[15:8] Value = 00000000B (0) 110Byte 3 Address Space ID, _ASI The address space where the data structure or register exists. 111 Defined values are: 112 0x00 System Memory 113 0x01 System I/O 114 0x02 PCI Configuration Space 115 0x03 Embedded Controller 116 0x04 SMBus 117 0x7F Functional Fixed Hardware 118Byte 4 Register Bit Width, _RBW Indicates the register width in bits. 119Byte 5 Register Bit Offset, _RBO Indicates the offset to the start of the register in bits 120 from the Register Address. 121Byte 6 Address Size, _ASZ Specifies access size. 122 0-Undefined (legacy reasons) 123 1-Byte access 124 2-Word access 125 3-Dword access 126 4-Qword access 127Byte 7 Register Address, _ADR bits[7:0] Register Address 128Byte 8 Register Address, _ADR bits[15:8] 129Byte 9 Register Address, _ADR bits[23:16] 130Byte 10 Register Address, _ADR bits[31:24] 131Byte 11 Register Address, _ADR bits[39:32] 132Byte 12 Register Address, _ADR bits[47:40] 133Byte 13 Register Address, _ADR bits[55:48] 134Byte 14 Register Address, _ADR bits[63:56] 135*/ 136 137Name (p437, Package() { 138 139 // Byte 3 (Address Space ID) of Register Descriptor 140 141 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xf0, 0xf1, 0x00, 142 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 143 Buffer () {0x82, 0x0c, 0x00, 0x01, 0xf0, 0xf1, 0x00, 144 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 145 Buffer () {0x82, 0x0c, 0x00, 0x02, 0xf0, 0xf1, 0x00, 146 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 147 Buffer () {0x82, 0x0c, 0x00, 0x03, 0xf0, 0xf1, 0x00, 148 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 149 Buffer () {0x82, 0x0c, 0x00, 0x04, 0xf0, 0xf1, 0x00, 150 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 151 Buffer () {0x82, 0x0c, 0x00, 0x05, 0xf0, 0xf1, 0x00, 152 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 153 Buffer () {0x82, 0x0c, 0x00, 0x06, 0xf0, 0xf1, 0x00, 154 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 155 Buffer () {0x82, 0x0c, 0x00, 0x07, 0xf0, 0xf1, 0x00, 156 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 157 Buffer () {0x82, 0x0c, 0x00, 0x08, 0xf0, 0xf1, 0x00, 158 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 159 Buffer () {0x82, 0x0c, 0x00, 0x09, 0xf0, 0xf1, 0x00, 160 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 161 Buffer () {0x82, 0x0c, 0x00, 0x7f, 0xf0, 0xf1, 0x00, 162 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 163 164 // Byte 6 (Address Size) of Register Descriptor 165 166 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xf0, 0xf1, 0x00, 167 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 168 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xf0, 0xf1, 0x01, 169 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 170 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xf0, 0xf1, 0x02, 171 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 172 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xf0, 0xf1, 0x03, 173 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 174 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xf0, 0xf1, 0x04, 175 0xf9, 0xf8, 0xf7, 0xf6, 0xf5, 0xf4, 0xf3, 0xf2, 0x79, 0x00}, 176 177 // Particular cases 178 179 Buffer () {0x82, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79, 0x00}, 181 Buffer () {0x82, 0x0c, 0x00, 0x00, 0xff, 0xff, 0x00, 182 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x79, 0x00}, 183}) 184 185Method(RT19,, Serialized) 186{ 187 Name(ts, "RT19") 188 189 // Emit test header, set the filename 190 191 THDR (ts, "Register Resource Descriptor Macro", __FILE__) 192 193 // The main test packages must have the same number of entries 194 195 If (LNotEqual (SizeOf (p436), SizeOf (p437))) 196 { 197 err (ts, 179, 0, 0, 0, 0, "Incorrect package length") 198 Return () 199 } 200 201 // Main test case for packages above 202 203 m330(ts, SizeOf (p436), "p436", p436, p437) 204 205 /* Register macro DescriptorName is recently implemented */ 206 207 // Check resource descriptor tag offsets 208 209 Store ( 210 ResourceTemplate () { 211 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 0, REG0) 212 Register (SystemMemory, 0xf0, 0xf1, 0xf2f3f4f5f6f7f8f9, 0, REG1) 213 }, Local0) 214 215 m331(ts, 1, REG0._ASI, 0x18, REG1._ASI, 0x90, "_ASI") 216 m331(ts, 2, REG0._RBW, 0x20, REG1._RBW, 0x98, "_RBW") 217 m331(ts, 3, REG0._RBO, 0x28, REG1._RBO, 0xA0, "_RBO") 218 m331(ts, 4, REG0._ASZ, 0x30, REG1._ASZ, 0xA8, "_ASZ") 219 m331(ts, 5, REG0._ADR, 0x38, REG1._ADR, 0xB0, "_ADR") 220} 221