1/**
2 * \file
3 * \brief Platform interface for ARMv7-A boards.
4 *
5 * This file defines the hardware abstraction layer for ARM targets. Each
6 * board is expected to have an implementation that corresponds to this
7 * interface.
8 *
9 * This interface is expected to change as new boards are added.
10 */
11
12/*
13 * Copyright (c) 2016 ETH Zurich.
14 * All rights reserved.
15 *
16 * This file is distributed under the terms in the attached LICENSE file.
17 * If you do not find this file, copies can be found by writing to:
18 * ETH Zurich D-INFK, Universitaetstr. 6, CH-8092 Zurich. Attn: Systems Group.
19 */
20
21#ifndef __ARM_PLATFORM_H__
22#define __ARM_PLATFORM_H__
23
24#include <barrelfish_kpi/types.h>
25#include <barrelfish_kpi/platform.h>
26
27/*
28 * Return the address of the UART device.
29 */
30lpaddr_t platform_get_uart_address(unsigned port);
31void platform_set_uart_address(unsigned port, lpaddr_t uart_base);
32
33/*
34 * Do any extra initialisation for this particular CPU (e.g. A9/A15).
35 */
36void platform_revision_init(void);
37
38/*
39 * Return the core count
40 */
41size_t platform_get_core_count(void);
42
43/*
44 * Print system identification. MMU is NOT yet enabled.
45 */
46void platform_print_id(void);
47
48/*
49 * Fill out provided `struct platform_info`
50 */
51void platform_get_info(struct platform_info *pi);
52void armv8_get_info(struct arch_info_armv8 *ai);
53/*
54 * Figure out how much RAM we have
55 */
56size_t platform_get_ram_size(void);
57
58/*
59 * Boot secondary processors
60 */
61errval_t platform_boot_core(hwid_t target, genpaddr_t gen_entry, genpaddr_t context);
62
63
64void platform_notify_bsp(lpaddr_t *mailbox);
65
66
67/*
68 * UART locations
69 */
70extern lpaddr_t uart_base[];
71extern size_t uart_size[];
72
73/*
74 * GIC locations
75 */
76extern lpaddr_t platform_gic_cpu_base;
77extern lpaddr_t platform_gic_dist_base;
78extern lpaddr_t platform_gic_redist_base;
79
80#define tsc_read() timer_get_timestamp()
81#define tsc_get_hz() timer_get_frequency()
82
83/*
84 * GIC interface
85 */
86
87errval_t platform_gic_init(void);
88
89errval_t platform_gic_cpu_interface_enable(void);
90
91
92#endif // __ARM_PLATFORM_H__
93