1/**
2 * \file
3 * \brief Hardware Abstraction Layer interface for ARM boards.
4 *
5 * This file defines the hardware abstraction layer for ARM targets. Each
6 * board is expected to have an implementation that corresponds to this
7 * interface.
8 *
9 * This interface is expected to change as new boards are added.
10 */
11
12/*
13 * Copyright (c) 2007, 2009, 2012 ETH Zurich.
14 * All rights reserved.
15 *
16 * This file is distributed under the terms in the attached LICENSE file.
17 * If you do not find this file, copies can be found by writing to:
18 * ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group.
19 */
20
21#ifndef __ARM_HAL_H__
22#define __ARM_HAL_H__
23
24// TODO: check all of these
25
26#include <barrelfish_kpi/types.h>
27
28/**
29 * @return Unique 32-bit identifier associated with current board.
30 */
31uint32_t hal_get_board_id(void);
32
33/**
34 * @return Current processor ordinal. Value has range 0 to n_cpus - 1.
35 */
36uint8_t  hal_get_cpu_id(void);
37
38/**
39 * @return true if current processor is bootstrap processor.
40 */
41bool     hal_cpu_is_bsp(void);
42
43/*
44 * Timer
45 */
46void     pit_init(uint32_t tick_hz, uint8_t pit_id);
47void     pit_start(uint8_t pit_id);
48bool     pit_handle_irq(uint32_t irq);
49void     pit_mask_irq(bool masked, uint8_t pit_id);
50
51/*
52 * Time-stamp counter
53 */
54void     tsc_init(void);
55uint32_t tsc_read(void);
56uint32_t tsc_get_hz(void);
57
58/*
59 * system control unit
60 * only for multi-core
61 */
62void scu_initialize(void);
63void scu_enable(void);
64int  scu_get_core_count(void);
65
66void write_sysflags_reg(uint32_t regval);
67
68/* [2009-11-17 orion] TODO: device enumeration */
69
70#endif // __ARM_HAL_H__
71