1/** 2 * \file 3 * \brief Arch specific definition of the registers, can be included by anyone. 4 * Definitions shared by kernel and user 5 */ 6 7/* 8 * Copyright (c) 2010, ETH Zurich. 9 * All rights reserved. 10 * 11 * This file is distributed under the terms in the attached LICENSE file. 12 * If you do not find this file, copies can be found by writing to: 13 * ETH Zurich D-INFK, Haldeneggsteig 4, CH-8092 Zurich. Attn: Systems Group. 14 */ 15 16#ifndef TARGET_X86_64_BARRELFISH_KPI_REGISTERS_H 17#define TARGET_X86_64_BARRELFISH_KPI_REGISTERS_H 18 19#include <barrelfish_kpi/eflags_arch.h> // for USER_EFLAGS 20#include <barrelfish_kpi/types.h> // for lvaddr_t 21 22/** \brief Number of registers to be saved for this architecture 23 * 24 * This is the same as ARCH_NUMREGS, but it is used by assembler stubs, so needs 25 * to be defined here as a constant. 26 */ 27#define X86_64_NUM_REGS 20 28 29#ifndef __ASSEMBLER__ 30 31// Warning: both the GDB stubs and any number of asm fragments depend 32// on the order of these fields. Don't change them without due care! 33struct registers_x86_64 { 34 uint64_t rax, rbx, rcx, rdx, rsi, rdi, rbp, rsp, 35 r8, r9, r10, r11, r12, r13, r14, r15, rip, eflags; 36 uint16_t fs, gs; ///< Only meaningful segment selectors in 64-bit mode 37 struct { 38 uint16_t fcw, fsw; 39 uint8_t ftw, res1; 40 uint16_t fop; 41 uint32_t fpu_ip1; 42 uint16_t fpu_ip2, res2; 43 uint32_t fpu_dp1; 44 uint16_t fpu_dp2, res3; 45 uint32_t mxcsr, mxcsr_mask; 46 uint64_t st[8][2]; 47 uint64_t xmm[16][2]; 48 uint64_t res4[12]; 49 } fxsave_area __attribute__ ((packed, aligned (16))); 50}; 51 52static inline void 53registers_x86_64_set_entry(struct registers_x86_64 *regs, lvaddr_t entry) 54{ 55 regs->rip = entry; 56 regs->eflags = USER_EFLAGS; 57 regs->fs = 0; 58 regs->gs = 0; 59} 60 61static inline void 62registers_x86_64_set_param(struct registers_x86_64 *regs, uint64_t param) 63{ 64 regs->rax = param; 65} 66 67static inline void 68registers_x86_64_get_param(struct registers_x86_64 *regs, uint64_t *param) 69{ 70 *param = regs->rax; 71} 72 73static inline uint64_t 74registers_x86_64_get_ip(struct registers_x86_64 *regs) 75{ 76 return regs->rip; 77} 78 79static inline uint64_t 80registers_x86_64_get_sp(struct registers_x86_64 *regs) 81{ 82 return regs->rsp; 83} 84 85#endif // __ASSEMBLER__ 86#endif // TARGET_X86_64_BARRELFISH_KPI_REGISTERS_H 87