1/* 2 * Copyright (c) 2013 ETH Zurich. All rights reserved. 3 * 4 * This file is distributed under the terms in the attached LICENSE file. 5 * If you do not find this file, copies can be found by writing to: 6 * ETH Zurich D-INFK, CAB F.78, Universitaetstr. 6, CH-8092 Zurich, 7 * Attn: Systems Group. 8 */ 9 10/* 11 * omap44xx_clk1_clk1_targ_pwr_disc_clk2.dev 12 * 13 * DESCRIPTION: 14 * 15 * NOTE: This file has been automatically generated based on the 16 * XML files extracted from the TI RDT v1.0.0.4p Tool. 17 * Download from here: http://www.ti.com/product/omap4460 18 * This means that the file might not be optimal in terms of naming 19 * conventions for constants and registers (duplicated 20 * namespaces in register and device name etc.). 21 * Also, because of the underlying structure from the original XML 22 * it's possible that some constants appear multiple times (if they 23 * have slightly different descriptions for example). 24 * 25 * You want to clean that up before using the files for the first time! 26 */ 27 28device omap44xx_clk1_clk1_targ_pwr_disc_clk2 msbfirst ( addr base ) "" { 29 30 31 constants stdhosthdr_corereg_vendorcode_status width(1) "" { 32 STDHOSTHDR_COREREG_VENDORCODE_0_r = 0 "Third-party vendor."; 33 STDHOSTHDR_COREREG_VENDORCODE_1_r = 1 ""; 34 }; 35 36 register l3_pwr_disc_stdhosthdr_corereg addr(base, 0x0) "" { 37 _ 10 mbz; 38 stdhosthdr_corereg_corecode 6 ro "The Core Code field is a constant reporting a vendor-specific core generator code. Type: Constant. Reset value: 0x38."; 39 _ 15 mbz; 40 stdhosthdr_corereg_vendorcode 1 ro type(stdhosthdr_corereg_vendorcode_status) "The Vendor Code field is a constant reporting the core generator vendor code. Type: Constant. Reset value: 0x1."; 41 }; 42 43 register l3_pwr_disc_stdhosthdr_versionreg addr(base, 0x4) "" { 44 stdhosthdr_versionreg_revisionid 8 ro "The Revision Identifier field is a constant reporting the core generator revision number. Type: Constant. Reset value: 0x0."; 45 stdhosthdr_versionreg_coreparamschecksum 24 ro "Reserved. Type: Reserved. Reset value: Reserved."; 46 }; 47 48 register l3_pwr_disc_stdhosthdr_mainctlreg addr(base, 0x8) "" { 49 _ 27 mbz; 50 _ 1 mbz; 51 stdhosthdr_mainctlreg_cm 1 ro "Reserved for internal testing. Must be set to 0. Type: Control. Reset value: 0x0."; 52 stdhosthdr_mainctlreg_flt 1 ro "Asserted when a Fault condition is detected: if the unit includes Error Logging, Flt is asserted when the FltCnt register field indicates a Fault, and deasserted when FltCnt is reset. If no Error Logging is implemented, this bit becomes unit-dependent. In all cases, Flt bit and Flt pin (service network) have the same logical level. Type: Status. Reset value: X."; 53 _ 2 mbz; 54 }; 55 56 constants stderrlog_svrtstdlvl_0_status width(2) "" { 57 STDERRLOG_SVRTSTDLVL_0_0 = 0 "Error logging is disabled."; 58 STDERRLOG_SVRTSTDLVL_0_1 = 1 "Errors are logged with severity level Error."; 59 STDERRLOG_SVRTSTDLVL_0_2 = 2 "Errors are logged with severity level Fault."; 60 }; 61 62 register l3_pwr_disc_stderrlog_svrtstdlvl addr(base, 0x40) "" { 63 _ 30 mbz; 64 stderrlog_svrtstdlvl_0 2 rw type(stderrlog_svrtstdlvl_0_status) "Severity level parameters Type: Control. Reset value: 0x2."; 65 }; 66 67 constants stderrlog_main_errtype_status width(1) "" { 68 STDERRLOG_MAIN_ERRTYPE_0_r = 0 "Logged Error format is standard (header and necker recorded)."; 69 STDERRLOG_MAIN_ERRTYPE_1_r = 1 "Logged Error format is module dependent. CustomInfo register(s) may be implemented to store additional information."; 70 }; 71 72 register l3_pwr_disc_stderrlog_main addr(base, 0x48) "" { 73 stderrlog_main_clrlog 1 rw "Clears Error Logging Valid bit when written to 1. Type: Give_AutoCleared. Reset value: 0x0."; 74 _ 11 mbz; 75 stderrlog_main_fltcnt 1 rw "Asserted when at least one error with severity level FAULT is detected. Reset when written to 1. Type: Take. Reset value: 0x0."; 76 stderrlog_main_errcnt 1 rw "Asserted when at least one error with severity level ERROR is detected. Reset when written to 1. Type: Take. Reset value: 0x0."; 77 _ 16 mbz; 78 stderrlog_main_errtype 1 ro type(stderrlog_main_errtype_status) "Indicates logging type. Type: Status. Reset value: X."; 79 stderrlog_main_errlogvld 1 ro "Error Logging Valid. Asserted when logging information is valid(indicates that an error has been logged). Type: Status. Reset value: X."; 80 }; 81 82 register l3_pwr_disc_stderrlog_hdr addr(base, 0x4C) "" { 83 _ 8 mbz; 84 stderrlog_hdr_len1 6 ro "This field contains the number of payload cell(s) minus one of the logged packet. Type: Status. Reset value: X."; 85 _ 2 mbz; 86 stderrlog_hdr_stopofswrpsz 4 ro "StopOfs or WrapSize field of the logged packet (meaning depends on Wrp bit of logged opcode). Type: Status. Reset value: X."; 87 stderrlog_hdr_err 1 ro "Err bit of the logged packet. Type: Status. Reset value: X."; 88 _ 4 mbz; 89 stderrlog_hdr_pressure 1 ro "Pressure field of the logged packet. Type: Status. Reset value: X."; 90 _ 2 mbz; 91 stderrlog_hdr_opcode 4 ro "Opcode of the logged packet. Type: Status. Reset value: X."; 92 }; 93 94 register l3_pwr_disc_stderrlog_mstaddr addr(base, 0x50) "" { 95 _ 24 mbz; 96 stderrlog_mstaddr 8 ro "Master Address field of the logged packet. Type: Status. Reset value: X."; 97 }; 98 99 register l3_pwr_disc_stderrlog_slvaddr addr(base, 0x54) "" { 100 _ 27 mbz; 101 stderrlog_slvaddr 5 ro "Slave Address field of the logged packet. Type: Status. Reset value: X."; 102 }; 103 104 register l3_pwr_disc_stderrlog_info addr(base, 0x58) "" { 105 _ 24 mbz; 106 stderrlog_info 8 ro "Info field of the logged packet. Type: Status. Reset value: X."; 107 }; 108 109 register l3_pwr_disc_stderrlog_slvofslsb ro addr(base, 0x5C) "" type(uint32); 110 111 register l3_pwr_disc_stderrlog_slvofsmsb addr(base, 0x60) "" { 112 _ 31 mbz; 113 stderrlog_slvofsmsb 1 ro "MSB of the slave offset field of the logged packet (according to NTTP packet format, this register field may exceed the actual slave offset size. Unused bits are stuck at 0, if any). Type: Status. Reset value: X."; 114 }; 115};