1/* Simulator instruction semantics for m32rbf. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc. 6 7This file is part of the GNU simulators. 8 9This program is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 3 of the License, or 12(at your option) any later version. 13 14This program is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with this program. If not, see <http://www.gnu.org/licenses/>. 21 22*/ 23 24#define WANT_CPU m32rbf 25#define WANT_CPU_M32RBF 26 27#include "sim-main.h" 28#include "cgen-mem.h" 29#include "cgen-ops.h" 30 31#undef GET_ATTR 32#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 33#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 34#else 35#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) 36#endif 37 38/* This is used so that we can compile two copies of the semantic code, 39 one with full feature support and one without that runs fast(er). 40 FAST_P, when desired, is defined on the command line, -DFAST_P=1. */ 41#if FAST_P 42#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn) 43#undef TRACE_RESULT 44#define TRACE_RESULT(cpu, abuf, name, type, val) 45#else 46#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn) 47#endif 48 49/* x-invalid: --invalid-- */ 50 51static SEM_PC 52SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 53{ 54#define FLD(f) abuf->fields.fmt_empty.f 55 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 56 int UNUSED written = 0; 57 IADDR UNUSED pc = abuf->addr; 58 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 59 60 { 61 /* Update the recorded pc in the cpu state struct. 62 Only necessary for WITH_SCACHE case, but to avoid the 63 conditional compilation .... */ 64 SET_H_PC (pc); 65 /* Virtual insns have zero size. Overwrite vpc with address of next insn 66 using the default-insn-bitsize spec. When executing insns in parallel 67 we may want to queue the fault and continue execution. */ 68 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 69 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 70 } 71 72 return vpc; 73#undef FLD 74} 75 76/* x-after: --after-- */ 77 78static SEM_PC 79SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 80{ 81#define FLD(f) abuf->fields.fmt_empty.f 82 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 83 int UNUSED written = 0; 84 IADDR UNUSED pc = abuf->addr; 85 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 86 87 { 88#if WITH_SCACHE_PBB_M32RBF 89 m32rbf_pbb_after (current_cpu, sem_arg); 90#endif 91 } 92 93 return vpc; 94#undef FLD 95} 96 97/* x-before: --before-- */ 98 99static SEM_PC 100SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 101{ 102#define FLD(f) abuf->fields.fmt_empty.f 103 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 104 int UNUSED written = 0; 105 IADDR UNUSED pc = abuf->addr; 106 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 107 108 { 109#if WITH_SCACHE_PBB_M32RBF 110 m32rbf_pbb_before (current_cpu, sem_arg); 111#endif 112 } 113 114 return vpc; 115#undef FLD 116} 117 118/* x-cti-chain: --cti-chain-- */ 119 120static SEM_PC 121SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 122{ 123#define FLD(f) abuf->fields.fmt_empty.f 124 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 125 int UNUSED written = 0; 126 IADDR UNUSED pc = abuf->addr; 127 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 128 129 { 130#if WITH_SCACHE_PBB_M32RBF 131#ifdef DEFINE_SWITCH 132 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, 133 pbb_br_type, pbb_br_npc); 134 BREAK (sem); 135#else 136 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 137 vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg, 138 CPU_PBB_BR_TYPE (current_cpu), 139 CPU_PBB_BR_NPC (current_cpu)); 140#endif 141#endif 142 } 143 144 return vpc; 145#undef FLD 146} 147 148/* x-chain: --chain-- */ 149 150static SEM_PC 151SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 152{ 153#define FLD(f) abuf->fields.fmt_empty.f 154 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 155 int UNUSED written = 0; 156 IADDR UNUSED pc = abuf->addr; 157 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 158 159 { 160#if WITH_SCACHE_PBB_M32RBF 161 vpc = m32rbf_pbb_chain (current_cpu, sem_arg); 162#ifdef DEFINE_SWITCH 163 BREAK (sem); 164#endif 165#endif 166 } 167 168 return vpc; 169#undef FLD 170} 171 172/* x-begin: --begin-- */ 173 174static SEM_PC 175SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 176{ 177#define FLD(f) abuf->fields.fmt_empty.f 178 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 179 int UNUSED written = 0; 180 IADDR UNUSED pc = abuf->addr; 181 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 182 183 { 184#if WITH_SCACHE_PBB_M32RBF 185#if defined DEFINE_SWITCH || defined FAST_P 186 /* In the switch case FAST_P is a constant, allowing several optimizations 187 in any called inline functions. */ 188 vpc = m32rbf_pbb_begin (current_cpu, FAST_P); 189#else 190#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 191 vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 192#else 193 vpc = m32rbf_pbb_begin (current_cpu, 0); 194#endif 195#endif 196#endif 197 } 198 199 return vpc; 200#undef FLD 201} 202 203/* add: add $dr,$sr */ 204 205static SEM_PC 206SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 207{ 208#define FLD(f) abuf->fields.sfmt_add.f 209 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 210 int UNUSED written = 0; 211 IADDR UNUSED pc = abuf->addr; 212 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 213 214 { 215 SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr)); 216 * FLD (i_dr) = opval; 217 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 218 } 219 220 return vpc; 221#undef FLD 222} 223 224/* add3: add3 $dr,$sr,$hash$slo16 */ 225 226static SEM_PC 227SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 228{ 229#define FLD(f) abuf->fields.sfmt_add3.f 230 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 231 int UNUSED written = 0; 232 IADDR UNUSED pc = abuf->addr; 233 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 234 235 { 236 SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16)); 237 * FLD (i_dr) = opval; 238 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 239 } 240 241 return vpc; 242#undef FLD 243} 244 245/* and: and $dr,$sr */ 246 247static SEM_PC 248SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 249{ 250#define FLD(f) abuf->fields.sfmt_add.f 251 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 252 int UNUSED written = 0; 253 IADDR UNUSED pc = abuf->addr; 254 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 255 256 { 257 SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr)); 258 * FLD (i_dr) = opval; 259 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 260 } 261 262 return vpc; 263#undef FLD 264} 265 266/* and3: and3 $dr,$sr,$uimm16 */ 267 268static SEM_PC 269SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 270{ 271#define FLD(f) abuf->fields.sfmt_and3.f 272 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 273 int UNUSED written = 0; 274 IADDR UNUSED pc = abuf->addr; 275 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 276 277 { 278 SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16)); 279 * FLD (i_dr) = opval; 280 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 281 } 282 283 return vpc; 284#undef FLD 285} 286 287/* or: or $dr,$sr */ 288 289static SEM_PC 290SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 291{ 292#define FLD(f) abuf->fields.sfmt_add.f 293 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 294 int UNUSED written = 0; 295 IADDR UNUSED pc = abuf->addr; 296 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 297 298 { 299 SI opval = ORSI (* FLD (i_dr), * FLD (i_sr)); 300 * FLD (i_dr) = opval; 301 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 302 } 303 304 return vpc; 305#undef FLD 306} 307 308/* or3: or3 $dr,$sr,$hash$ulo16 */ 309 310static SEM_PC 311SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 312{ 313#define FLD(f) abuf->fields.sfmt_and3.f 314 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 315 int UNUSED written = 0; 316 IADDR UNUSED pc = abuf->addr; 317 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 318 319 { 320 SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16)); 321 * FLD (i_dr) = opval; 322 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 323 } 324 325 return vpc; 326#undef FLD 327} 328 329/* xor: xor $dr,$sr */ 330 331static SEM_PC 332SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 333{ 334#define FLD(f) abuf->fields.sfmt_add.f 335 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 336 int UNUSED written = 0; 337 IADDR UNUSED pc = abuf->addr; 338 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 339 340 { 341 SI opval = XORSI (* FLD (i_dr), * FLD (i_sr)); 342 * FLD (i_dr) = opval; 343 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 344 } 345 346 return vpc; 347#undef FLD 348} 349 350/* xor3: xor3 $dr,$sr,$uimm16 */ 351 352static SEM_PC 353SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 354{ 355#define FLD(f) abuf->fields.sfmt_and3.f 356 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 357 int UNUSED written = 0; 358 IADDR UNUSED pc = abuf->addr; 359 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 360 361 { 362 SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16)); 363 * FLD (i_dr) = opval; 364 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 365 } 366 367 return vpc; 368#undef FLD 369} 370 371/* addi: addi $dr,$simm8 */ 372 373static SEM_PC 374SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 375{ 376#define FLD(f) abuf->fields.sfmt_addi.f 377 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 378 int UNUSED written = 0; 379 IADDR UNUSED pc = abuf->addr; 380 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 381 382 { 383 SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8)); 384 * FLD (i_dr) = opval; 385 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 386 } 387 388 return vpc; 389#undef FLD 390} 391 392/* addv: addv $dr,$sr */ 393 394static SEM_PC 395SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 396{ 397#define FLD(f) abuf->fields.sfmt_add.f 398 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 399 int UNUSED written = 0; 400 IADDR UNUSED pc = abuf->addr; 401 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 402 403{ 404 SI temp0;BI temp1; 405 temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr)); 406 temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0); 407 { 408 SI opval = temp0; 409 * FLD (i_dr) = opval; 410 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 411 } 412 { 413 BI opval = temp1; 414 CPU (h_cond) = opval; 415 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 416 } 417} 418 419 return vpc; 420#undef FLD 421} 422 423/* addv3: addv3 $dr,$sr,$simm16 */ 424 425static SEM_PC 426SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 427{ 428#define FLD(f) abuf->fields.sfmt_add3.f 429 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 430 int UNUSED written = 0; 431 IADDR UNUSED pc = abuf->addr; 432 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 433 434{ 435 SI temp0;BI temp1; 436 temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16)); 437 temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0); 438 { 439 SI opval = temp0; 440 * FLD (i_dr) = opval; 441 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 442 } 443 { 444 BI opval = temp1; 445 CPU (h_cond) = opval; 446 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 447 } 448} 449 450 return vpc; 451#undef FLD 452} 453 454/* addx: addx $dr,$sr */ 455 456static SEM_PC 457SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 458{ 459#define FLD(f) abuf->fields.sfmt_add.f 460 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 461 int UNUSED written = 0; 462 IADDR UNUSED pc = abuf->addr; 463 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 464 465{ 466 SI temp0;BI temp1; 467 temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 468 temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 469 { 470 SI opval = temp0; 471 * FLD (i_dr) = opval; 472 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 473 } 474 { 475 BI opval = temp1; 476 CPU (h_cond) = opval; 477 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 478 } 479} 480 481 return vpc; 482#undef FLD 483} 484 485/* bc8: bc.s $disp8 */ 486 487static SEM_PC 488SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 489{ 490#define FLD(f) abuf->fields.sfmt_bl8.f 491 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 492 int UNUSED written = 0; 493 IADDR UNUSED pc = abuf->addr; 494 SEM_BRANCH_INIT 495 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 496 497if (CPU (h_cond)) { 498 { 499 USI opval = FLD (i_disp8); 500 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 501 written |= (1 << 2); 502 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 503 } 504} 505 506 abuf->written = written; 507 SEM_BRANCH_FINI (vpc); 508 return vpc; 509#undef FLD 510} 511 512/* bc24: bc.l $disp24 */ 513 514static SEM_PC 515SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 516{ 517#define FLD(f) abuf->fields.sfmt_bl24.f 518 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 519 int UNUSED written = 0; 520 IADDR UNUSED pc = abuf->addr; 521 SEM_BRANCH_INIT 522 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 523 524if (CPU (h_cond)) { 525 { 526 USI opval = FLD (i_disp24); 527 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 528 written |= (1 << 2); 529 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 530 } 531} 532 533 abuf->written = written; 534 SEM_BRANCH_FINI (vpc); 535 return vpc; 536#undef FLD 537} 538 539/* beq: beq $src1,$src2,$disp16 */ 540 541static SEM_PC 542SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 543{ 544#define FLD(f) abuf->fields.sfmt_beq.f 545 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 546 int UNUSED written = 0; 547 IADDR UNUSED pc = abuf->addr; 548 SEM_BRANCH_INIT 549 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 550 551if (EQSI (* FLD (i_src1), * FLD (i_src2))) { 552 { 553 USI opval = FLD (i_disp16); 554 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 555 written |= (1 << 3); 556 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 557 } 558} 559 560 abuf->written = written; 561 SEM_BRANCH_FINI (vpc); 562 return vpc; 563#undef FLD 564} 565 566/* beqz: beqz $src2,$disp16 */ 567 568static SEM_PC 569SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 570{ 571#define FLD(f) abuf->fields.sfmt_beq.f 572 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 573 int UNUSED written = 0; 574 IADDR UNUSED pc = abuf->addr; 575 SEM_BRANCH_INIT 576 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 577 578if (EQSI (* FLD (i_src2), 0)) { 579 { 580 USI opval = FLD (i_disp16); 581 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 582 written |= (1 << 2); 583 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 584 } 585} 586 587 abuf->written = written; 588 SEM_BRANCH_FINI (vpc); 589 return vpc; 590#undef FLD 591} 592 593/* bgez: bgez $src2,$disp16 */ 594 595static SEM_PC 596SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 597{ 598#define FLD(f) abuf->fields.sfmt_beq.f 599 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 600 int UNUSED written = 0; 601 IADDR UNUSED pc = abuf->addr; 602 SEM_BRANCH_INIT 603 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 604 605if (GESI (* FLD (i_src2), 0)) { 606 { 607 USI opval = FLD (i_disp16); 608 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 609 written |= (1 << 2); 610 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 611 } 612} 613 614 abuf->written = written; 615 SEM_BRANCH_FINI (vpc); 616 return vpc; 617#undef FLD 618} 619 620/* bgtz: bgtz $src2,$disp16 */ 621 622static SEM_PC 623SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 624{ 625#define FLD(f) abuf->fields.sfmt_beq.f 626 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 627 int UNUSED written = 0; 628 IADDR UNUSED pc = abuf->addr; 629 SEM_BRANCH_INIT 630 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 631 632if (GTSI (* FLD (i_src2), 0)) { 633 { 634 USI opval = FLD (i_disp16); 635 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 636 written |= (1 << 2); 637 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 638 } 639} 640 641 abuf->written = written; 642 SEM_BRANCH_FINI (vpc); 643 return vpc; 644#undef FLD 645} 646 647/* blez: blez $src2,$disp16 */ 648 649static SEM_PC 650SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 651{ 652#define FLD(f) abuf->fields.sfmt_beq.f 653 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 654 int UNUSED written = 0; 655 IADDR UNUSED pc = abuf->addr; 656 SEM_BRANCH_INIT 657 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 658 659if (LESI (* FLD (i_src2), 0)) { 660 { 661 USI opval = FLD (i_disp16); 662 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 663 written |= (1 << 2); 664 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 665 } 666} 667 668 abuf->written = written; 669 SEM_BRANCH_FINI (vpc); 670 return vpc; 671#undef FLD 672} 673 674/* bltz: bltz $src2,$disp16 */ 675 676static SEM_PC 677SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 678{ 679#define FLD(f) abuf->fields.sfmt_beq.f 680 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 681 int UNUSED written = 0; 682 IADDR UNUSED pc = abuf->addr; 683 SEM_BRANCH_INIT 684 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 685 686if (LTSI (* FLD (i_src2), 0)) { 687 { 688 USI opval = FLD (i_disp16); 689 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 690 written |= (1 << 2); 691 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 692 } 693} 694 695 abuf->written = written; 696 SEM_BRANCH_FINI (vpc); 697 return vpc; 698#undef FLD 699} 700 701/* bnez: bnez $src2,$disp16 */ 702 703static SEM_PC 704SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 705{ 706#define FLD(f) abuf->fields.sfmt_beq.f 707 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 708 int UNUSED written = 0; 709 IADDR UNUSED pc = abuf->addr; 710 SEM_BRANCH_INIT 711 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 712 713if (NESI (* FLD (i_src2), 0)) { 714 { 715 USI opval = FLD (i_disp16); 716 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 717 written |= (1 << 2); 718 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 719 } 720} 721 722 abuf->written = written; 723 SEM_BRANCH_FINI (vpc); 724 return vpc; 725#undef FLD 726} 727 728/* bl8: bl.s $disp8 */ 729 730static SEM_PC 731SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 732{ 733#define FLD(f) abuf->fields.sfmt_bl8.f 734 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 735 int UNUSED written = 0; 736 IADDR UNUSED pc = abuf->addr; 737 SEM_BRANCH_INIT 738 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 739 740{ 741 { 742 SI opval = ADDSI (ANDSI (pc, -4), 4); 743 CPU (h_gr[((UINT) 14)]) = opval; 744 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 745 } 746 { 747 USI opval = FLD (i_disp8); 748 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 749 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 750 } 751} 752 753 SEM_BRANCH_FINI (vpc); 754 return vpc; 755#undef FLD 756} 757 758/* bl24: bl.l $disp24 */ 759 760static SEM_PC 761SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 762{ 763#define FLD(f) abuf->fields.sfmt_bl24.f 764 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 765 int UNUSED written = 0; 766 IADDR UNUSED pc = abuf->addr; 767 SEM_BRANCH_INIT 768 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 769 770{ 771 { 772 SI opval = ADDSI (pc, 4); 773 CPU (h_gr[((UINT) 14)]) = opval; 774 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 775 } 776 { 777 USI opval = FLD (i_disp24); 778 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 779 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 780 } 781} 782 783 SEM_BRANCH_FINI (vpc); 784 return vpc; 785#undef FLD 786} 787 788/* bnc8: bnc.s $disp8 */ 789 790static SEM_PC 791SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 792{ 793#define FLD(f) abuf->fields.sfmt_bl8.f 794 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 795 int UNUSED written = 0; 796 IADDR UNUSED pc = abuf->addr; 797 SEM_BRANCH_INIT 798 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 799 800if (NOTBI (CPU (h_cond))) { 801 { 802 USI opval = FLD (i_disp8); 803 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 804 written |= (1 << 2); 805 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 806 } 807} 808 809 abuf->written = written; 810 SEM_BRANCH_FINI (vpc); 811 return vpc; 812#undef FLD 813} 814 815/* bnc24: bnc.l $disp24 */ 816 817static SEM_PC 818SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 819{ 820#define FLD(f) abuf->fields.sfmt_bl24.f 821 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 822 int UNUSED written = 0; 823 IADDR UNUSED pc = abuf->addr; 824 SEM_BRANCH_INIT 825 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 826 827if (NOTBI (CPU (h_cond))) { 828 { 829 USI opval = FLD (i_disp24); 830 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 831 written |= (1 << 2); 832 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 833 } 834} 835 836 abuf->written = written; 837 SEM_BRANCH_FINI (vpc); 838 return vpc; 839#undef FLD 840} 841 842/* bne: bne $src1,$src2,$disp16 */ 843 844static SEM_PC 845SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 846{ 847#define FLD(f) abuf->fields.sfmt_beq.f 848 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 849 int UNUSED written = 0; 850 IADDR UNUSED pc = abuf->addr; 851 SEM_BRANCH_INIT 852 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 853 854if (NESI (* FLD (i_src1), * FLD (i_src2))) { 855 { 856 USI opval = FLD (i_disp16); 857 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 858 written |= (1 << 3); 859 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 860 } 861} 862 863 abuf->written = written; 864 SEM_BRANCH_FINI (vpc); 865 return vpc; 866#undef FLD 867} 868 869/* bra8: bra.s $disp8 */ 870 871static SEM_PC 872SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 873{ 874#define FLD(f) abuf->fields.sfmt_bl8.f 875 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 876 int UNUSED written = 0; 877 IADDR UNUSED pc = abuf->addr; 878 SEM_BRANCH_INIT 879 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 880 881 { 882 USI opval = FLD (i_disp8); 883 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 884 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 885 } 886 887 SEM_BRANCH_FINI (vpc); 888 return vpc; 889#undef FLD 890} 891 892/* bra24: bra.l $disp24 */ 893 894static SEM_PC 895SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 896{ 897#define FLD(f) abuf->fields.sfmt_bl24.f 898 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 899 int UNUSED written = 0; 900 IADDR UNUSED pc = abuf->addr; 901 SEM_BRANCH_INIT 902 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 903 904 { 905 USI opval = FLD (i_disp24); 906 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 907 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 908 } 909 910 SEM_BRANCH_FINI (vpc); 911 return vpc; 912#undef FLD 913} 914 915/* cmp: cmp $src1,$src2 */ 916 917static SEM_PC 918SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 919{ 920#define FLD(f) abuf->fields.sfmt_st_plus.f 921 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 922 int UNUSED written = 0; 923 IADDR UNUSED pc = abuf->addr; 924 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 925 926 { 927 BI opval = LTSI (* FLD (i_src1), * FLD (i_src2)); 928 CPU (h_cond) = opval; 929 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 930 } 931 932 return vpc; 933#undef FLD 934} 935 936/* cmpi: cmpi $src2,$simm16 */ 937 938static SEM_PC 939SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 940{ 941#define FLD(f) abuf->fields.sfmt_st_d.f 942 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 943 int UNUSED written = 0; 944 IADDR UNUSED pc = abuf->addr; 945 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 946 947 { 948 BI opval = LTSI (* FLD (i_src2), FLD (f_simm16)); 949 CPU (h_cond) = opval; 950 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 951 } 952 953 return vpc; 954#undef FLD 955} 956 957/* cmpu: cmpu $src1,$src2 */ 958 959static SEM_PC 960SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 961{ 962#define FLD(f) abuf->fields.sfmt_st_plus.f 963 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 964 int UNUSED written = 0; 965 IADDR UNUSED pc = abuf->addr; 966 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 967 968 { 969 BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2)); 970 CPU (h_cond) = opval; 971 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 972 } 973 974 return vpc; 975#undef FLD 976} 977 978/* cmpui: cmpui $src2,$simm16 */ 979 980static SEM_PC 981SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 982{ 983#define FLD(f) abuf->fields.sfmt_st_d.f 984 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 985 int UNUSED written = 0; 986 IADDR UNUSED pc = abuf->addr; 987 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 988 989 { 990 BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16)); 991 CPU (h_cond) = opval; 992 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 993 } 994 995 return vpc; 996#undef FLD 997} 998 999/* div: div $dr,$sr */ 1000 1001static SEM_PC 1002SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1003{ 1004#define FLD(f) abuf->fields.sfmt_add.f 1005 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1006 int UNUSED written = 0; 1007 IADDR UNUSED pc = abuf->addr; 1008 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1009 1010if (NESI (* FLD (i_sr), 0)) { 1011 { 1012 SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr)); 1013 * FLD (i_dr) = opval; 1014 written |= (1 << 2); 1015 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1016 } 1017} 1018 1019 abuf->written = written; 1020 return vpc; 1021#undef FLD 1022} 1023 1024/* divu: divu $dr,$sr */ 1025 1026static SEM_PC 1027SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1028{ 1029#define FLD(f) abuf->fields.sfmt_add.f 1030 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1031 int UNUSED written = 0; 1032 IADDR UNUSED pc = abuf->addr; 1033 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1034 1035if (NESI (* FLD (i_sr), 0)) { 1036 { 1037 SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr)); 1038 * FLD (i_dr) = opval; 1039 written |= (1 << 2); 1040 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1041 } 1042} 1043 1044 abuf->written = written; 1045 return vpc; 1046#undef FLD 1047} 1048 1049/* rem: rem $dr,$sr */ 1050 1051static SEM_PC 1052SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1053{ 1054#define FLD(f) abuf->fields.sfmt_add.f 1055 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1056 int UNUSED written = 0; 1057 IADDR UNUSED pc = abuf->addr; 1058 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1059 1060if (NESI (* FLD (i_sr), 0)) { 1061 { 1062 SI opval = MODSI (* FLD (i_dr), * FLD (i_sr)); 1063 * FLD (i_dr) = opval; 1064 written |= (1 << 2); 1065 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1066 } 1067} 1068 1069 abuf->written = written; 1070 return vpc; 1071#undef FLD 1072} 1073 1074/* remu: remu $dr,$sr */ 1075 1076static SEM_PC 1077SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1078{ 1079#define FLD(f) abuf->fields.sfmt_add.f 1080 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1081 int UNUSED written = 0; 1082 IADDR UNUSED pc = abuf->addr; 1083 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1084 1085if (NESI (* FLD (i_sr), 0)) { 1086 { 1087 SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr)); 1088 * FLD (i_dr) = opval; 1089 written |= (1 << 2); 1090 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1091 } 1092} 1093 1094 abuf->written = written; 1095 return vpc; 1096#undef FLD 1097} 1098 1099/* jl: jl $sr */ 1100 1101static SEM_PC 1102SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1103{ 1104#define FLD(f) abuf->fields.sfmt_jl.f 1105 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1106 int UNUSED written = 0; 1107 IADDR UNUSED pc = abuf->addr; 1108 SEM_BRANCH_INIT 1109 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1110 1111{ 1112 SI temp0;USI temp1; 1113 temp0 = ADDSI (ANDSI (pc, -4), 4); 1114 temp1 = ANDSI (* FLD (i_sr), -4); 1115 { 1116 SI opval = temp0; 1117 CPU (h_gr[((UINT) 14)]) = opval; 1118 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1119 } 1120 { 1121 USI opval = temp1; 1122 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1123 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1124 } 1125} 1126 1127 SEM_BRANCH_FINI (vpc); 1128 return vpc; 1129#undef FLD 1130} 1131 1132/* jmp: jmp $sr */ 1133 1134static SEM_PC 1135SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1136{ 1137#define FLD(f) abuf->fields.sfmt_jl.f 1138 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1139 int UNUSED written = 0; 1140 IADDR UNUSED pc = abuf->addr; 1141 SEM_BRANCH_INIT 1142 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1143 1144 { 1145 USI opval = ANDSI (* FLD (i_sr), -4); 1146 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1147 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1148 } 1149 1150 SEM_BRANCH_FINI (vpc); 1151 return vpc; 1152#undef FLD 1153} 1154 1155/* ld: ld $dr,@$sr */ 1156 1157static SEM_PC 1158SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1159{ 1160#define FLD(f) abuf->fields.sfmt_ld_plus.f 1161 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1162 int UNUSED written = 0; 1163 IADDR UNUSED pc = abuf->addr; 1164 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1165 1166 { 1167 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1168 * FLD (i_dr) = opval; 1169 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1170 } 1171 1172 return vpc; 1173#undef FLD 1174} 1175 1176/* ld-d: ld $dr,@($slo16,$sr) */ 1177 1178static SEM_PC 1179SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1180{ 1181#define FLD(f) abuf->fields.sfmt_add3.f 1182 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1183 int UNUSED written = 0; 1184 IADDR UNUSED pc = abuf->addr; 1185 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1186 1187 { 1188 SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))); 1189 * FLD (i_dr) = opval; 1190 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1191 } 1192 1193 return vpc; 1194#undef FLD 1195} 1196 1197/* ldb: ldb $dr,@$sr */ 1198 1199static SEM_PC 1200SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1201{ 1202#define FLD(f) abuf->fields.sfmt_ld_plus.f 1203 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1204 int UNUSED written = 0; 1205 IADDR UNUSED pc = abuf->addr; 1206 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1207 1208 { 1209 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1210 * FLD (i_dr) = opval; 1211 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1212 } 1213 1214 return vpc; 1215#undef FLD 1216} 1217 1218/* ldb-d: ldb $dr,@($slo16,$sr) */ 1219 1220static SEM_PC 1221SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1222{ 1223#define FLD(f) abuf->fields.sfmt_add3.f 1224 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1225 int UNUSED written = 0; 1226 IADDR UNUSED pc = abuf->addr; 1227 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1228 1229 { 1230 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1231 * FLD (i_dr) = opval; 1232 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1233 } 1234 1235 return vpc; 1236#undef FLD 1237} 1238 1239/* ldh: ldh $dr,@$sr */ 1240 1241static SEM_PC 1242SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1243{ 1244#define FLD(f) abuf->fields.sfmt_ld_plus.f 1245 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1246 int UNUSED written = 0; 1247 IADDR UNUSED pc = abuf->addr; 1248 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1249 1250 { 1251 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1252 * FLD (i_dr) = opval; 1253 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1254 } 1255 1256 return vpc; 1257#undef FLD 1258} 1259 1260/* ldh-d: ldh $dr,@($slo16,$sr) */ 1261 1262static SEM_PC 1263SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1264{ 1265#define FLD(f) abuf->fields.sfmt_add3.f 1266 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1267 int UNUSED written = 0; 1268 IADDR UNUSED pc = abuf->addr; 1269 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1270 1271 { 1272 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1273 * FLD (i_dr) = opval; 1274 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1275 } 1276 1277 return vpc; 1278#undef FLD 1279} 1280 1281/* ldub: ldub $dr,@$sr */ 1282 1283static SEM_PC 1284SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1285{ 1286#define FLD(f) abuf->fields.sfmt_ld_plus.f 1287 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1288 int UNUSED written = 0; 1289 IADDR UNUSED pc = abuf->addr; 1290 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1291 1292 { 1293 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr))); 1294 * FLD (i_dr) = opval; 1295 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1296 } 1297 1298 return vpc; 1299#undef FLD 1300} 1301 1302/* ldub-d: ldub $dr,@($slo16,$sr) */ 1303 1304static SEM_PC 1305SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1306{ 1307#define FLD(f) abuf->fields.sfmt_add3.f 1308 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1309 int UNUSED written = 0; 1310 IADDR UNUSED pc = abuf->addr; 1311 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1312 1313 { 1314 SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1315 * FLD (i_dr) = opval; 1316 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1317 } 1318 1319 return vpc; 1320#undef FLD 1321} 1322 1323/* lduh: lduh $dr,@$sr */ 1324 1325static SEM_PC 1326SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1327{ 1328#define FLD(f) abuf->fields.sfmt_ld_plus.f 1329 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1330 int UNUSED written = 0; 1331 IADDR UNUSED pc = abuf->addr; 1332 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1333 1334 { 1335 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr))); 1336 * FLD (i_dr) = opval; 1337 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1338 } 1339 1340 return vpc; 1341#undef FLD 1342} 1343 1344/* lduh-d: lduh $dr,@($slo16,$sr) */ 1345 1346static SEM_PC 1347SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1348{ 1349#define FLD(f) abuf->fields.sfmt_add3.f 1350 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1351 int UNUSED written = 0; 1352 IADDR UNUSED pc = abuf->addr; 1353 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1354 1355 { 1356 SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)))); 1357 * FLD (i_dr) = opval; 1358 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1359 } 1360 1361 return vpc; 1362#undef FLD 1363} 1364 1365/* ld-plus: ld $dr,@$sr+ */ 1366 1367static SEM_PC 1368SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1369{ 1370#define FLD(f) abuf->fields.sfmt_ld_plus.f 1371 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1372 int UNUSED written = 0; 1373 IADDR UNUSED pc = abuf->addr; 1374 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1375 1376{ 1377 SI temp0;SI temp1; 1378 temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1379 temp1 = ADDSI (* FLD (i_sr), 4); 1380 { 1381 SI opval = temp0; 1382 * FLD (i_dr) = opval; 1383 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1384 } 1385 { 1386 SI opval = temp1; 1387 * FLD (i_sr) = opval; 1388 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1389 } 1390} 1391 1392 return vpc; 1393#undef FLD 1394} 1395 1396/* ld24: ld24 $dr,$uimm24 */ 1397 1398static SEM_PC 1399SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1400{ 1401#define FLD(f) abuf->fields.sfmt_ld24.f 1402 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1403 int UNUSED written = 0; 1404 IADDR UNUSED pc = abuf->addr; 1405 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1406 1407 { 1408 SI opval = FLD (i_uimm24); 1409 * FLD (i_dr) = opval; 1410 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1411 } 1412 1413 return vpc; 1414#undef FLD 1415} 1416 1417/* ldi8: ldi8 $dr,$simm8 */ 1418 1419static SEM_PC 1420SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1421{ 1422#define FLD(f) abuf->fields.sfmt_addi.f 1423 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1424 int UNUSED written = 0; 1425 IADDR UNUSED pc = abuf->addr; 1426 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1427 1428 { 1429 SI opval = FLD (f_simm8); 1430 * FLD (i_dr) = opval; 1431 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1432 } 1433 1434 return vpc; 1435#undef FLD 1436} 1437 1438/* ldi16: ldi16 $dr,$hash$slo16 */ 1439 1440static SEM_PC 1441SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1442{ 1443#define FLD(f) abuf->fields.sfmt_add3.f 1444 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1445 int UNUSED written = 0; 1446 IADDR UNUSED pc = abuf->addr; 1447 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 1448 1449 { 1450 SI opval = FLD (f_simm16); 1451 * FLD (i_dr) = opval; 1452 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1453 } 1454 1455 return vpc; 1456#undef FLD 1457} 1458 1459/* lock: lock $dr,@$sr */ 1460 1461static SEM_PC 1462SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1463{ 1464#define FLD(f) abuf->fields.sfmt_ld_plus.f 1465 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1466 int UNUSED written = 0; 1467 IADDR UNUSED pc = abuf->addr; 1468 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1469 1470{ 1471 { 1472 BI opval = 1; 1473 CPU (h_lock) = opval; 1474 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 1475 } 1476 { 1477 SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr)); 1478 * FLD (i_dr) = opval; 1479 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1480 } 1481} 1482 1483 return vpc; 1484#undef FLD 1485} 1486 1487/* machi: machi $src1,$src2 */ 1488 1489static SEM_PC 1490SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1491{ 1492#define FLD(f) abuf->fields.sfmt_st_plus.f 1493 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1494 int UNUSED written = 0; 1495 IADDR UNUSED pc = abuf->addr; 1496 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1497 1498 { 1499 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 1500 SET_H_ACCUM (opval); 1501 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1502 } 1503 1504 return vpc; 1505#undef FLD 1506} 1507 1508/* maclo: maclo $src1,$src2 */ 1509 1510static SEM_PC 1511SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1512{ 1513#define FLD(f) abuf->fields.sfmt_st_plus.f 1514 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1515 int UNUSED written = 0; 1516 IADDR UNUSED pc = abuf->addr; 1517 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1518 1519 { 1520 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 1521 SET_H_ACCUM (opval); 1522 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1523 } 1524 1525 return vpc; 1526#undef FLD 1527} 1528 1529/* macwhi: macwhi $src1,$src2 */ 1530 1531static SEM_PC 1532SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1533{ 1534#define FLD(f) abuf->fields.sfmt_st_plus.f 1535 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1536 int UNUSED written = 0; 1537 IADDR UNUSED pc = abuf->addr; 1538 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1539 1540 { 1541 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8); 1542 SET_H_ACCUM (opval); 1543 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1544 } 1545 1546 return vpc; 1547#undef FLD 1548} 1549 1550/* macwlo: macwlo $src1,$src2 */ 1551 1552static SEM_PC 1553SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1554{ 1555#define FLD(f) abuf->fields.sfmt_st_plus.f 1556 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1557 int UNUSED written = 0; 1558 IADDR UNUSED pc = abuf->addr; 1559 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1560 1561 { 1562 DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8); 1563 SET_H_ACCUM (opval); 1564 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1565 } 1566 1567 return vpc; 1568#undef FLD 1569} 1570 1571/* mul: mul $dr,$sr */ 1572 1573static SEM_PC 1574SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1575{ 1576#define FLD(f) abuf->fields.sfmt_add.f 1577 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1578 int UNUSED written = 0; 1579 IADDR UNUSED pc = abuf->addr; 1580 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1581 1582 { 1583 SI opval = MULSI (* FLD (i_dr), * FLD (i_sr)); 1584 * FLD (i_dr) = opval; 1585 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1586 } 1587 1588 return vpc; 1589#undef FLD 1590} 1591 1592/* mulhi: mulhi $src1,$src2 */ 1593 1594static SEM_PC 1595SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1596{ 1597#define FLD(f) abuf->fields.sfmt_st_plus.f 1598 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1599 int UNUSED written = 0; 1600 IADDR UNUSED pc = abuf->addr; 1601 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1602 1603 { 1604 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16); 1605 SET_H_ACCUM (opval); 1606 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1607 } 1608 1609 return vpc; 1610#undef FLD 1611} 1612 1613/* mullo: mullo $src1,$src2 */ 1614 1615static SEM_PC 1616SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1617{ 1618#define FLD(f) abuf->fields.sfmt_st_plus.f 1619 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1620 int UNUSED written = 0; 1621 IADDR UNUSED pc = abuf->addr; 1622 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1623 1624 { 1625 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16); 1626 SET_H_ACCUM (opval); 1627 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1628 } 1629 1630 return vpc; 1631#undef FLD 1632} 1633 1634/* mulwhi: mulwhi $src1,$src2 */ 1635 1636static SEM_PC 1637SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1638{ 1639#define FLD(f) abuf->fields.sfmt_st_plus.f 1640 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1641 int UNUSED written = 0; 1642 IADDR UNUSED pc = abuf->addr; 1643 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1644 1645 { 1646 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8); 1647 SET_H_ACCUM (opval); 1648 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1649 } 1650 1651 return vpc; 1652#undef FLD 1653} 1654 1655/* mulwlo: mulwlo $src1,$src2 */ 1656 1657static SEM_PC 1658SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1659{ 1660#define FLD(f) abuf->fields.sfmt_st_plus.f 1661 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1662 int UNUSED written = 0; 1663 IADDR UNUSED pc = abuf->addr; 1664 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1665 1666 { 1667 DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8); 1668 SET_H_ACCUM (opval); 1669 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1670 } 1671 1672 return vpc; 1673#undef FLD 1674} 1675 1676/* mv: mv $dr,$sr */ 1677 1678static SEM_PC 1679SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1680{ 1681#define FLD(f) abuf->fields.sfmt_ld_plus.f 1682 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1683 int UNUSED written = 0; 1684 IADDR UNUSED pc = abuf->addr; 1685 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1686 1687 { 1688 SI opval = * FLD (i_sr); 1689 * FLD (i_dr) = opval; 1690 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1691 } 1692 1693 return vpc; 1694#undef FLD 1695} 1696 1697/* mvfachi: mvfachi $dr */ 1698 1699static SEM_PC 1700SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1701{ 1702#define FLD(f) abuf->fields.sfmt_seth.f 1703 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1704 int UNUSED written = 0; 1705 IADDR UNUSED pc = abuf->addr; 1706 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1707 1708 { 1709 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32)); 1710 * FLD (i_dr) = opval; 1711 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1712 } 1713 1714 return vpc; 1715#undef FLD 1716} 1717 1718/* mvfaclo: mvfaclo $dr */ 1719 1720static SEM_PC 1721SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1722{ 1723#define FLD(f) abuf->fields.sfmt_seth.f 1724 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1725 int UNUSED written = 0; 1726 IADDR UNUSED pc = abuf->addr; 1727 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1728 1729 { 1730 SI opval = TRUNCDISI (GET_H_ACCUM ()); 1731 * FLD (i_dr) = opval; 1732 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1733 } 1734 1735 return vpc; 1736#undef FLD 1737} 1738 1739/* mvfacmi: mvfacmi $dr */ 1740 1741static SEM_PC 1742SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1743{ 1744#define FLD(f) abuf->fields.sfmt_seth.f 1745 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1746 int UNUSED written = 0; 1747 IADDR UNUSED pc = abuf->addr; 1748 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1749 1750 { 1751 SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16)); 1752 * FLD (i_dr) = opval; 1753 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1754 } 1755 1756 return vpc; 1757#undef FLD 1758} 1759 1760/* mvfc: mvfc $dr,$scr */ 1761 1762static SEM_PC 1763SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1764{ 1765#define FLD(f) abuf->fields.sfmt_ld_plus.f 1766 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1767 int UNUSED written = 0; 1768 IADDR UNUSED pc = abuf->addr; 1769 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1770 1771 { 1772 SI opval = GET_H_CR (FLD (f_r2)); 1773 * FLD (i_dr) = opval; 1774 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1775 } 1776 1777 return vpc; 1778#undef FLD 1779} 1780 1781/* mvtachi: mvtachi $src1 */ 1782 1783static SEM_PC 1784SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1785{ 1786#define FLD(f) abuf->fields.sfmt_st_plus.f 1787 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1788 int UNUSED written = 0; 1789 IADDR UNUSED pc = abuf->addr; 1790 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1791 1792 { 1793 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32)); 1794 SET_H_ACCUM (opval); 1795 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1796 } 1797 1798 return vpc; 1799#undef FLD 1800} 1801 1802/* mvtaclo: mvtaclo $src1 */ 1803 1804static SEM_PC 1805SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1806{ 1807#define FLD(f) abuf->fields.sfmt_st_plus.f 1808 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1809 int UNUSED written = 0; 1810 IADDR UNUSED pc = abuf->addr; 1811 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1812 1813 { 1814 DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1))); 1815 SET_H_ACCUM (opval); 1816 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1817 } 1818 1819 return vpc; 1820#undef FLD 1821} 1822 1823/* mvtc: mvtc $sr,$dcr */ 1824 1825static SEM_PC 1826SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1827{ 1828#define FLD(f) abuf->fields.sfmt_ld_plus.f 1829 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1830 int UNUSED written = 0; 1831 IADDR UNUSED pc = abuf->addr; 1832 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1833 1834 { 1835 USI opval = * FLD (i_sr); 1836 SET_H_CR (FLD (f_r1), opval); 1837 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 1838 } 1839 1840 return vpc; 1841#undef FLD 1842} 1843 1844/* neg: neg $dr,$sr */ 1845 1846static SEM_PC 1847SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1848{ 1849#define FLD(f) abuf->fields.sfmt_ld_plus.f 1850 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1851 int UNUSED written = 0; 1852 IADDR UNUSED pc = abuf->addr; 1853 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1854 1855 { 1856 SI opval = NEGSI (* FLD (i_sr)); 1857 * FLD (i_dr) = opval; 1858 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1859 } 1860 1861 return vpc; 1862#undef FLD 1863} 1864 1865/* nop: nop */ 1866 1867static SEM_PC 1868SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1869{ 1870#define FLD(f) abuf->fields.fmt_empty.f 1871 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1872 int UNUSED written = 0; 1873 IADDR UNUSED pc = abuf->addr; 1874 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1875 1876PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr); 1877 1878 return vpc; 1879#undef FLD 1880} 1881 1882/* not: not $dr,$sr */ 1883 1884static SEM_PC 1885SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1886{ 1887#define FLD(f) abuf->fields.sfmt_ld_plus.f 1888 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1889 int UNUSED written = 0; 1890 IADDR UNUSED pc = abuf->addr; 1891 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1892 1893 { 1894 SI opval = INVSI (* FLD (i_sr)); 1895 * FLD (i_dr) = opval; 1896 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 1897 } 1898 1899 return vpc; 1900#undef FLD 1901} 1902 1903/* rac: rac */ 1904 1905static SEM_PC 1906SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1907{ 1908#define FLD(f) abuf->fields.fmt_empty.f 1909 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1910 int UNUSED written = 0; 1911 IADDR UNUSED pc = abuf->addr; 1912 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1913 1914{ 1915 DI tmp_tmp1; 1916 tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1); 1917 tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768)); 1918 { 1919 DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))); 1920 SET_H_ACCUM (opval); 1921 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1922 } 1923} 1924 1925 return vpc; 1926#undef FLD 1927} 1928 1929/* rach: rach */ 1930 1931static SEM_PC 1932SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1933{ 1934#define FLD(f) abuf->fields.fmt_empty.f 1935 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1936 int UNUSED written = 0; 1937 IADDR UNUSED pc = abuf->addr; 1938 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1939 1940{ 1941 DI tmp_tmp1; 1942 tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff)); 1943if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) { 1944 tmp_tmp1 = MAKEDI (16383, 0x80000000); 1945} else { 1946if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) { 1947 tmp_tmp1 = MAKEDI (16760832, 0); 1948} else { 1949 tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000)); 1950} 1951} 1952 tmp_tmp1 = SLLDI (tmp_tmp1, 1); 1953 { 1954 DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7); 1955 SET_H_ACCUM (opval); 1956 TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval); 1957 } 1958} 1959 1960 return vpc; 1961#undef FLD 1962} 1963 1964/* rte: rte */ 1965 1966static SEM_PC 1967SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 1968{ 1969#define FLD(f) abuf->fields.fmt_empty.f 1970 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1971 int UNUSED written = 0; 1972 IADDR UNUSED pc = abuf->addr; 1973 SEM_BRANCH_INIT 1974 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1975 1976{ 1977 { 1978 USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4); 1979 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 1980 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 1981 } 1982 { 1983 USI opval = GET_H_CR (((UINT) 14)); 1984 SET_H_CR (((UINT) 6), opval); 1985 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 1986 } 1987 { 1988 UQI opval = CPU (h_bpsw); 1989 SET_H_PSW (opval); 1990 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 1991 } 1992 { 1993 UQI opval = CPU (h_bbpsw); 1994 CPU (h_bpsw) = opval; 1995 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 1996 } 1997} 1998 1999 SEM_BRANCH_FINI (vpc); 2000 return vpc; 2001#undef FLD 2002} 2003 2004/* seth: seth $dr,$hash$hi16 */ 2005 2006static SEM_PC 2007SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2008{ 2009#define FLD(f) abuf->fields.sfmt_seth.f 2010 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2011 int UNUSED written = 0; 2012 IADDR UNUSED pc = abuf->addr; 2013 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2014 2015 { 2016 SI opval = SLLSI (FLD (f_hi16), 16); 2017 * FLD (i_dr) = opval; 2018 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2019 } 2020 2021 return vpc; 2022#undef FLD 2023} 2024 2025/* sll: sll $dr,$sr */ 2026 2027static SEM_PC 2028SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2029{ 2030#define FLD(f) abuf->fields.sfmt_add.f 2031 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2032 int UNUSED written = 0; 2033 IADDR UNUSED pc = abuf->addr; 2034 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2035 2036 { 2037 SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2038 * FLD (i_dr) = opval; 2039 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2040 } 2041 2042 return vpc; 2043#undef FLD 2044} 2045 2046/* sll3: sll3 $dr,$sr,$simm16 */ 2047 2048static SEM_PC 2049SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2050{ 2051#define FLD(f) abuf->fields.sfmt_add3.f 2052 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2053 int UNUSED written = 0; 2054 IADDR UNUSED pc = abuf->addr; 2055 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2056 2057 { 2058 SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2059 * FLD (i_dr) = opval; 2060 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2061 } 2062 2063 return vpc; 2064#undef FLD 2065} 2066 2067/* slli: slli $dr,$uimm5 */ 2068 2069static SEM_PC 2070SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2071{ 2072#define FLD(f) abuf->fields.sfmt_slli.f 2073 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2074 int UNUSED written = 0; 2075 IADDR UNUSED pc = abuf->addr; 2076 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2077 2078 { 2079 SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5)); 2080 * FLD (i_dr) = opval; 2081 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2082 } 2083 2084 return vpc; 2085#undef FLD 2086} 2087 2088/* sra: sra $dr,$sr */ 2089 2090static SEM_PC 2091SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2092{ 2093#define FLD(f) abuf->fields.sfmt_add.f 2094 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2095 int UNUSED written = 0; 2096 IADDR UNUSED pc = abuf->addr; 2097 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2098 2099 { 2100 SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2101 * FLD (i_dr) = opval; 2102 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2103 } 2104 2105 return vpc; 2106#undef FLD 2107} 2108 2109/* sra3: sra3 $dr,$sr,$simm16 */ 2110 2111static SEM_PC 2112SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2113{ 2114#define FLD(f) abuf->fields.sfmt_add3.f 2115 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2116 int UNUSED written = 0; 2117 IADDR UNUSED pc = abuf->addr; 2118 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2119 2120 { 2121 SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2122 * FLD (i_dr) = opval; 2123 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2124 } 2125 2126 return vpc; 2127#undef FLD 2128} 2129 2130/* srai: srai $dr,$uimm5 */ 2131 2132static SEM_PC 2133SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2134{ 2135#define FLD(f) abuf->fields.sfmt_slli.f 2136 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2137 int UNUSED written = 0; 2138 IADDR UNUSED pc = abuf->addr; 2139 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2140 2141 { 2142 SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5)); 2143 * FLD (i_dr) = opval; 2144 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2145 } 2146 2147 return vpc; 2148#undef FLD 2149} 2150 2151/* srl: srl $dr,$sr */ 2152 2153static SEM_PC 2154SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2155{ 2156#define FLD(f) abuf->fields.sfmt_add.f 2157 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2158 int UNUSED written = 0; 2159 IADDR UNUSED pc = abuf->addr; 2160 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2161 2162 { 2163 SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31)); 2164 * FLD (i_dr) = opval; 2165 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2166 } 2167 2168 return vpc; 2169#undef FLD 2170} 2171 2172/* srl3: srl3 $dr,$sr,$simm16 */ 2173 2174static SEM_PC 2175SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2176{ 2177#define FLD(f) abuf->fields.sfmt_add3.f 2178 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2179 int UNUSED written = 0; 2180 IADDR UNUSED pc = abuf->addr; 2181 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2182 2183 { 2184 SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31)); 2185 * FLD (i_dr) = opval; 2186 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2187 } 2188 2189 return vpc; 2190#undef FLD 2191} 2192 2193/* srli: srli $dr,$uimm5 */ 2194 2195static SEM_PC 2196SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2197{ 2198#define FLD(f) abuf->fields.sfmt_slli.f 2199 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2200 int UNUSED written = 0; 2201 IADDR UNUSED pc = abuf->addr; 2202 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2203 2204 { 2205 SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5)); 2206 * FLD (i_dr) = opval; 2207 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2208 } 2209 2210 return vpc; 2211#undef FLD 2212} 2213 2214/* st: st $src1,@$src2 */ 2215 2216static SEM_PC 2217SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2218{ 2219#define FLD(f) abuf->fields.sfmt_st_plus.f 2220 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2221 int UNUSED written = 0; 2222 IADDR UNUSED pc = abuf->addr; 2223 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2224 2225 { 2226 SI opval = * FLD (i_src1); 2227 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2228 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2229 } 2230 2231 return vpc; 2232#undef FLD 2233} 2234 2235/* st-d: st $src1,@($slo16,$src2) */ 2236 2237static SEM_PC 2238SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2239{ 2240#define FLD(f) abuf->fields.sfmt_st_d.f 2241 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2242 int UNUSED written = 0; 2243 IADDR UNUSED pc = abuf->addr; 2244 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2245 2246 { 2247 SI opval = * FLD (i_src1); 2248 SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2249 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2250 } 2251 2252 return vpc; 2253#undef FLD 2254} 2255 2256/* stb: stb $src1,@$src2 */ 2257 2258static SEM_PC 2259SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2260{ 2261#define FLD(f) abuf->fields.sfmt_st_plus.f 2262 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2263 int UNUSED written = 0; 2264 IADDR UNUSED pc = abuf->addr; 2265 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2266 2267 { 2268 QI opval = * FLD (i_src1); 2269 SETMEMQI (current_cpu, pc, * FLD (i_src2), opval); 2270 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2271 } 2272 2273 return vpc; 2274#undef FLD 2275} 2276 2277/* stb-d: stb $src1,@($slo16,$src2) */ 2278 2279static SEM_PC 2280SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2281{ 2282#define FLD(f) abuf->fields.sfmt_st_d.f 2283 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2284 int UNUSED written = 0; 2285 IADDR UNUSED pc = abuf->addr; 2286 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2287 2288 { 2289 QI opval = * FLD (i_src1); 2290 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2291 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2292 } 2293 2294 return vpc; 2295#undef FLD 2296} 2297 2298/* sth: sth $src1,@$src2 */ 2299 2300static SEM_PC 2301SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2302{ 2303#define FLD(f) abuf->fields.sfmt_st_plus.f 2304 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2305 int UNUSED written = 0; 2306 IADDR UNUSED pc = abuf->addr; 2307 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2308 2309 { 2310 HI opval = * FLD (i_src1); 2311 SETMEMHI (current_cpu, pc, * FLD (i_src2), opval); 2312 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2313 } 2314 2315 return vpc; 2316#undef FLD 2317} 2318 2319/* sth-d: sth $src1,@($slo16,$src2) */ 2320 2321static SEM_PC 2322SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2323{ 2324#define FLD(f) abuf->fields.sfmt_st_d.f 2325 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2326 int UNUSED written = 0; 2327 IADDR UNUSED pc = abuf->addr; 2328 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2329 2330 { 2331 HI opval = * FLD (i_src1); 2332 SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval); 2333 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2334 } 2335 2336 return vpc; 2337#undef FLD 2338} 2339 2340/* st-plus: st $src1,@+$src2 */ 2341 2342static SEM_PC 2343SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2344{ 2345#define FLD(f) abuf->fields.sfmt_st_plus.f 2346 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2347 int UNUSED written = 0; 2348 IADDR UNUSED pc = abuf->addr; 2349 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2350 2351{ 2352 SI tmp_new_src2; 2353 tmp_new_src2 = ADDSI (* FLD (i_src2), 4); 2354 { 2355 SI opval = * FLD (i_src1); 2356 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2357 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2358 } 2359 { 2360 SI opval = tmp_new_src2; 2361 * FLD (i_src2) = opval; 2362 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2363 } 2364} 2365 2366 return vpc; 2367#undef FLD 2368} 2369 2370/* st-minus: st $src1,@-$src2 */ 2371 2372static SEM_PC 2373SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2374{ 2375#define FLD(f) abuf->fields.sfmt_st_plus.f 2376 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2377 int UNUSED written = 0; 2378 IADDR UNUSED pc = abuf->addr; 2379 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2380 2381{ 2382 SI tmp_new_src2; 2383 tmp_new_src2 = SUBSI (* FLD (i_src2), 4); 2384 { 2385 SI opval = * FLD (i_src1); 2386 SETMEMSI (current_cpu, pc, tmp_new_src2, opval); 2387 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2388 } 2389 { 2390 SI opval = tmp_new_src2; 2391 * FLD (i_src2) = opval; 2392 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2393 } 2394} 2395 2396 return vpc; 2397#undef FLD 2398} 2399 2400/* sub: sub $dr,$sr */ 2401 2402static SEM_PC 2403SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2404{ 2405#define FLD(f) abuf->fields.sfmt_add.f 2406 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2407 int UNUSED written = 0; 2408 IADDR UNUSED pc = abuf->addr; 2409 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2410 2411 { 2412 SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr)); 2413 * FLD (i_dr) = opval; 2414 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2415 } 2416 2417 return vpc; 2418#undef FLD 2419} 2420 2421/* subv: subv $dr,$sr */ 2422 2423static SEM_PC 2424SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2425{ 2426#define FLD(f) abuf->fields.sfmt_add.f 2427 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2428 int UNUSED written = 0; 2429 IADDR UNUSED pc = abuf->addr; 2430 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2431 2432{ 2433 SI temp0;BI temp1; 2434 temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr)); 2435 temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0); 2436 { 2437 SI opval = temp0; 2438 * FLD (i_dr) = opval; 2439 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2440 } 2441 { 2442 BI opval = temp1; 2443 CPU (h_cond) = opval; 2444 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2445 } 2446} 2447 2448 return vpc; 2449#undef FLD 2450} 2451 2452/* subx: subx $dr,$sr */ 2453 2454static SEM_PC 2455SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2456{ 2457#define FLD(f) abuf->fields.sfmt_add.f 2458 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2459 int UNUSED written = 0; 2460 IADDR UNUSED pc = abuf->addr; 2461 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2462 2463{ 2464 SI temp0;BI temp1; 2465 temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 2466 temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond)); 2467 { 2468 SI opval = temp0; 2469 * FLD (i_dr) = opval; 2470 TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval); 2471 } 2472 { 2473 BI opval = temp1; 2474 CPU (h_cond) = opval; 2475 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2476 } 2477} 2478 2479 return vpc; 2480#undef FLD 2481} 2482 2483/* trap: trap $uimm4 */ 2484 2485static SEM_PC 2486SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2487{ 2488#define FLD(f) abuf->fields.sfmt_trap.f 2489 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2490 int UNUSED written = 0; 2491 IADDR UNUSED pc = abuf->addr; 2492 SEM_BRANCH_INIT 2493 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2494 2495{ 2496 { 2497 USI opval = GET_H_CR (((UINT) 6)); 2498 SET_H_CR (((UINT) 14), opval); 2499 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2500 } 2501 { 2502 USI opval = ADDSI (pc, 4); 2503 SET_H_CR (((UINT) 6), opval); 2504 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2505 } 2506 { 2507 UQI opval = CPU (h_bpsw); 2508 CPU (h_bbpsw) = opval; 2509 TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval); 2510 } 2511 { 2512 UQI opval = GET_H_PSW (); 2513 CPU (h_bpsw) = opval; 2514 TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval); 2515 } 2516 { 2517 UQI opval = ANDQI (GET_H_PSW (), 128); 2518 SET_H_PSW (opval); 2519 TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval); 2520 } 2521 { 2522 SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4)); 2523 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2524 TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval); 2525 } 2526} 2527 2528 SEM_BRANCH_FINI (vpc); 2529 return vpc; 2530#undef FLD 2531} 2532 2533/* unlock: unlock $src1,@$src2 */ 2534 2535static SEM_PC 2536SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2537{ 2538#define FLD(f) abuf->fields.sfmt_st_plus.f 2539 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2540 int UNUSED written = 0; 2541 IADDR UNUSED pc = abuf->addr; 2542 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2543 2544{ 2545if (CPU (h_lock)) { 2546 { 2547 SI opval = * FLD (i_src1); 2548 SETMEMSI (current_cpu, pc, * FLD (i_src2), opval); 2549 written |= (1 << 4); 2550 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2551 } 2552} 2553 { 2554 BI opval = 0; 2555 CPU (h_lock) = opval; 2556 TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval); 2557 } 2558} 2559 2560 abuf->written = written; 2561 return vpc; 2562#undef FLD 2563} 2564 2565/* clrpsw: clrpsw $uimm8 */ 2566 2567static SEM_PC 2568SEM_FN_NAME (m32rbf,clrpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2569{ 2570#define FLD(f) abuf->fields.sfmt_clrpsw.f 2571 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2572 int UNUSED written = 0; 2573 IADDR UNUSED pc = abuf->addr; 2574 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2575 2576 { 2577 SI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (INVBI (FLD (f_uimm8)), 65280)); 2578 SET_H_CR (((UINT) 0), opval); 2579 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2580 } 2581 2582 return vpc; 2583#undef FLD 2584} 2585 2586/* setpsw: setpsw $uimm8 */ 2587 2588static SEM_PC 2589SEM_FN_NAME (m32rbf,setpsw) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2590{ 2591#define FLD(f) abuf->fields.sfmt_clrpsw.f 2592 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2593 int UNUSED written = 0; 2594 IADDR UNUSED pc = abuf->addr; 2595 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2596 2597 { 2598 SI opval = FLD (f_uimm8); 2599 SET_H_CR (((UINT) 0), opval); 2600 TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval); 2601 } 2602 2603 return vpc; 2604#undef FLD 2605} 2606 2607/* bset: bset $uimm3,@($slo16,$sr) */ 2608 2609static SEM_PC 2610SEM_FN_NAME (m32rbf,bset) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2611{ 2612#define FLD(f) abuf->fields.sfmt_bset.f 2613 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2614 int UNUSED written = 0; 2615 IADDR UNUSED pc = abuf->addr; 2616 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2617 2618 { 2619 QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLSI (1, SUBSI (7, FLD (f_uimm3)))); 2620 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 2621 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2622 } 2623 2624 return vpc; 2625#undef FLD 2626} 2627 2628/* bclr: bclr $uimm3,@($slo16,$sr) */ 2629 2630static SEM_PC 2631SEM_FN_NAME (m32rbf,bclr) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2632{ 2633#define FLD(f) abuf->fields.sfmt_bset.f 2634 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2635 int UNUSED written = 0; 2636 IADDR UNUSED pc = abuf->addr; 2637 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2638 2639 { 2640 QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLSI (1, SUBSI (7, FLD (f_uimm3))))); 2641 SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval); 2642 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2643 } 2644 2645 return vpc; 2646#undef FLD 2647} 2648 2649/* btst: btst $uimm3,$sr */ 2650 2651static SEM_PC 2652SEM_FN_NAME (m32rbf,btst) (SIM_CPU *current_cpu, SEM_ARG sem_arg) 2653{ 2654#define FLD(f) abuf->fields.sfmt_bset.f 2655 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2656 int UNUSED written = 0; 2657 IADDR UNUSED pc = abuf->addr; 2658 SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2659 2660 { 2661 BI opval = ANDQI (SRLSI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1); 2662 CPU (h_cond) = opval; 2663 TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval); 2664 } 2665 2666 return vpc; 2667#undef FLD 2668} 2669 2670/* Table of all semantic fns. */ 2671 2672static const struct sem_fn_desc sem_fns[] = { 2673 { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) }, 2674 { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) }, 2675 { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) }, 2676 { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) }, 2677 { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) }, 2678 { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) }, 2679 { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) }, 2680 { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) }, 2681 { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) }, 2682 { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) }, 2683 { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) }, 2684 { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) }, 2685 { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) }, 2686 { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) }, 2687 { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) }, 2688 { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) }, 2689 { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) }, 2690 { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) }, 2691 { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) }, 2692 { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) }, 2693 { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) }, 2694 { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) }, 2695 { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) }, 2696 { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) }, 2697 { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) }, 2698 { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) }, 2699 { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) }, 2700 { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) }, 2701 { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) }, 2702 { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) }, 2703 { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) }, 2704 { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) }, 2705 { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) }, 2706 { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) }, 2707 { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) }, 2708 { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) }, 2709 { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) }, 2710 { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) }, 2711 { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) }, 2712 { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) }, 2713 { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) }, 2714 { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) }, 2715 { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) }, 2716 { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) }, 2717 { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) }, 2718 { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) }, 2719 { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) }, 2720 { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) }, 2721 { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) }, 2722 { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) }, 2723 { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) }, 2724 { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) }, 2725 { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) }, 2726 { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) }, 2727 { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) }, 2728 { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) }, 2729 { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) }, 2730 { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) }, 2731 { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) }, 2732 { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) }, 2733 { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) }, 2734 { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) }, 2735 { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) }, 2736 { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) }, 2737 { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) }, 2738 { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) }, 2739 { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) }, 2740 { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) }, 2741 { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) }, 2742 { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) }, 2743 { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) }, 2744 { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) }, 2745 { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) }, 2746 { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) }, 2747 { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) }, 2748 { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) }, 2749 { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) }, 2750 { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) }, 2751 { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) }, 2752 { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) }, 2753 { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) }, 2754 { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) }, 2755 { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) }, 2756 { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) }, 2757 { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) }, 2758 { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) }, 2759 { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) }, 2760 { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) }, 2761 { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) }, 2762 { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) }, 2763 { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) }, 2764 { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) }, 2765 { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) }, 2766 { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) }, 2767 { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) }, 2768 { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) }, 2769 { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) }, 2770 { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) }, 2771 { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) }, 2772 { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) }, 2773 { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) }, 2774 { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) }, 2775 { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) }, 2776 { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) }, 2777 { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) }, 2778 { M32RBF_INSN_CLRPSW, SEM_FN_NAME (m32rbf,clrpsw) }, 2779 { M32RBF_INSN_SETPSW, SEM_FN_NAME (m32rbf,setpsw) }, 2780 { M32RBF_INSN_BSET, SEM_FN_NAME (m32rbf,bset) }, 2781 { M32RBF_INSN_BCLR, SEM_FN_NAME (m32rbf,bclr) }, 2782 { M32RBF_INSN_BTST, SEM_FN_NAME (m32rbf,btst) }, 2783 { 0, 0 } 2784}; 2785 2786/* Add the semantic fns to IDESC_TABLE. */ 2787 2788void 2789SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu) 2790{ 2791 IDESC *idesc_table = CPU_IDESC (current_cpu); 2792 const struct sem_fn_desc *sf; 2793 int mach_num = MACH_NUM (CPU_MACH (current_cpu)); 2794 2795 for (sf = &sem_fns[0]; sf->fn != 0; ++sf) 2796 { 2797 const CGEN_INSN *insn = idesc_table[sf->index].idata; 2798 int valid_p = (CGEN_INSN_VIRTUAL_P (insn) 2799 || CGEN_INSN_MACH_HAS_P (insn, mach_num)); 2800#if FAST_P 2801 if (valid_p) 2802 idesc_table[sf->index].sem_fast = sf->fn; 2803 else 2804 idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid); 2805#else 2806 if (valid_p) 2807 idesc_table[sf->index].sem_full = sf->fn; 2808 else 2809 idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid); 2810#endif 2811 } 2812} 2813 2814