1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger. 2 3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 4 2003, 2005, 2006, 2007 Free Software Foundation, Inc. 5 6 This file is part of GDB. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21#include "defs.h" 22#include "doublest.h" 23#include "frame.h" 24#include "frame-unwind.h" 25#include "frame-base.h" 26#include "dwarf2-frame.h" 27#include "inferior.h" 28#include "symtab.h" 29#include "value.h" 30#include "gdbcmd.h" 31#include "gdbcore.h" 32#include "dis-asm.h" 33#include "symfile.h" 34#include "objfiles.h" 35#include "gdb_string.h" 36#include "linespec.h" 37#include "regcache.h" 38#include "reggroups.h" 39#include "arch-utils.h" 40#include "osabi.h" 41#include "block.h" 42#include "infcall.h" 43 44#include "elf-bfd.h" 45 46#include "alpha-tdep.h" 47 48 49/* Return the name of the REGNO register. 50 51 An empty name corresponds to a register number that used to 52 be used for a virtual register. That virtual register has 53 been removed, but the index is still reserved to maintain 54 compatibility with existing remote alpha targets. */ 55 56static const char * 57alpha_register_name (int regno) 58{ 59 static const char * const register_names[] = 60 { 61 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", 62 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", 63 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", 64 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", 65 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", 66 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", 67 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", 68 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", 69 "pc", "", "unique" 70 }; 71 72 if (regno < 0) 73 return NULL; 74 if (regno >= ARRAY_SIZE(register_names)) 75 return NULL; 76 return register_names[regno]; 77} 78 79static int 80alpha_cannot_fetch_register (int regno) 81{ 82 return (regno == ALPHA_ZERO_REGNUM 83 || strlen (alpha_register_name (regno)) == 0); 84} 85 86static int 87alpha_cannot_store_register (int regno) 88{ 89 return (regno == ALPHA_ZERO_REGNUM 90 || strlen (alpha_register_name (regno)) == 0); 91} 92 93static struct type * 94alpha_register_type (struct gdbarch *gdbarch, int regno) 95{ 96 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) 97 return builtin_type_void_data_ptr; 98 if (regno == ALPHA_PC_REGNUM) 99 return builtin_type_void_func_ptr; 100 101 /* Don't need to worry about little vs big endian until 102 some jerk tries to port to alpha-unicosmk. */ 103 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) 104 return builtin_type_ieee_double; 105 106 return builtin_type_int64; 107} 108 109/* Is REGNUM a member of REGGROUP? */ 110 111static int 112alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 113 struct reggroup *group) 114{ 115 /* Filter out any registers eliminated, but whose regnum is 116 reserved for backward compatibility, e.g. the vfp. */ 117 if (gdbarch_register_name (current_gdbarch, regnum) == NULL 118 || *gdbarch_register_name (current_gdbarch, regnum) == '\0') 119 return 0; 120 121 if (group == all_reggroup) 122 return 1; 123 124 /* Zero should not be saved or restored. Technically it is a general 125 register (just as $f31 would be a float if we represented it), but 126 there's no point displaying it during "info regs", so leave it out 127 of all groups except for "all". */ 128 if (regnum == ALPHA_ZERO_REGNUM) 129 return 0; 130 131 /* All other registers are saved and restored. */ 132 if (group == save_reggroup || group == restore_reggroup) 133 return 1; 134 135 /* All other groups are non-overlapping. */ 136 137 /* Since this is really a PALcode memory slot... */ 138 if (regnum == ALPHA_UNIQUE_REGNUM) 139 return group == system_reggroup; 140 141 /* Force the FPCR to be considered part of the floating point state. */ 142 if (regnum == ALPHA_FPCR_REGNUM) 143 return group == float_reggroup; 144 145 if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31) 146 return group == float_reggroup; 147 else 148 return group == general_reggroup; 149} 150 151/* The following represents exactly the conversion performed by 152 the LDS instruction. This applies to both single-precision 153 floating point and 32-bit integers. */ 154 155static void 156alpha_lds (void *out, const void *in) 157{ 158 ULONGEST mem = extract_unsigned_integer (in, 4); 159 ULONGEST frac = (mem >> 0) & 0x7fffff; 160 ULONGEST sign = (mem >> 31) & 1; 161 ULONGEST exp_msb = (mem >> 30) & 1; 162 ULONGEST exp_low = (mem >> 23) & 0x7f; 163 ULONGEST exp, reg; 164 165 exp = (exp_msb << 10) | exp_low; 166 if (exp_msb) 167 { 168 if (exp_low == 0x7f) 169 exp = 0x7ff; 170 } 171 else 172 { 173 if (exp_low != 0x00) 174 exp |= 0x380; 175 } 176 177 reg = (sign << 63) | (exp << 52) | (frac << 29); 178 store_unsigned_integer (out, 8, reg); 179} 180 181/* Similarly, this represents exactly the conversion performed by 182 the STS instruction. */ 183 184static void 185alpha_sts (void *out, const void *in) 186{ 187 ULONGEST reg, mem; 188 189 reg = extract_unsigned_integer (in, 8); 190 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff); 191 store_unsigned_integer (out, 4, mem); 192} 193 194/* The alpha needs a conversion between register and memory format if the 195 register is a floating point register and memory format is float, as the 196 register format must be double or memory format is an integer with 4 197 bytes or less, as the representation of integers in floating point 198 registers is different. */ 199 200static int 201alpha_convert_register_p (int regno, struct type *type) 202{ 203 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31); 204} 205 206static void 207alpha_register_to_value (struct frame_info *frame, int regnum, 208 struct type *valtype, gdb_byte *out) 209{ 210 gdb_byte in[MAX_REGISTER_SIZE]; 211 212 frame_register_read (frame, regnum, in); 213 switch (TYPE_LENGTH (valtype)) 214 { 215 case 4: 216 alpha_sts (out, in); 217 break; 218 case 8: 219 memcpy (out, in, 8); 220 break; 221 default: 222 error (_("Cannot retrieve value from floating point register")); 223 } 224} 225 226static void 227alpha_value_to_register (struct frame_info *frame, int regnum, 228 struct type *valtype, const gdb_byte *in) 229{ 230 gdb_byte out[MAX_REGISTER_SIZE]; 231 232 switch (TYPE_LENGTH (valtype)) 233 { 234 case 4: 235 alpha_lds (out, in); 236 break; 237 case 8: 238 memcpy (out, in, 8); 239 break; 240 default: 241 error (_("Cannot store value in floating point register")); 242 } 243 put_frame_register (frame, regnum, out); 244} 245 246 247/* The alpha passes the first six arguments in the registers, the rest on 248 the stack. The register arguments are stored in ARG_REG_BUFFER, and 249 then moved into the register file; this simplifies the passing of a 250 large struct which extends from the registers to the stack, plus avoids 251 three ptrace invocations per word. 252 253 We don't bother tracking which register values should go in integer 254 regs or fp regs; we load the same values into both. 255 256 If the called function is returning a structure, the address of the 257 structure to be returned is passed as a hidden first argument. */ 258 259static CORE_ADDR 260alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 261 struct regcache *regcache, CORE_ADDR bp_addr, 262 int nargs, struct value **args, CORE_ADDR sp, 263 int struct_return, CORE_ADDR struct_addr) 264{ 265 int i; 266 int accumulate_size = struct_return ? 8 : 0; 267 struct alpha_arg 268 { 269 gdb_byte *contents; 270 int len; 271 int offset; 272 }; 273 struct alpha_arg *alpha_args 274 = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg)); 275 struct alpha_arg *m_arg; 276 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS]; 277 int required_arg_regs; 278 CORE_ADDR func_addr = find_function_addr (function, NULL); 279 280 /* The ABI places the address of the called function in T12. */ 281 regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr); 282 283 /* Set the return address register to point to the entry point 284 of the program, where a breakpoint lies in wait. */ 285 regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr); 286 287 /* Lay out the arguments in memory. */ 288 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++) 289 { 290 struct value *arg = args[i]; 291 struct type *arg_type = check_typedef (value_type (arg)); 292 293 /* Cast argument to long if necessary as the compiler does it too. */ 294 switch (TYPE_CODE (arg_type)) 295 { 296 case TYPE_CODE_INT: 297 case TYPE_CODE_BOOL: 298 case TYPE_CODE_CHAR: 299 case TYPE_CODE_RANGE: 300 case TYPE_CODE_ENUM: 301 if (TYPE_LENGTH (arg_type) == 4) 302 { 303 /* 32-bit values must be sign-extended to 64 bits 304 even if the base data type is unsigned. */ 305 arg_type = builtin_type_int32; 306 arg = value_cast (arg_type, arg); 307 } 308 if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE) 309 { 310 arg_type = builtin_type_int64; 311 arg = value_cast (arg_type, arg); 312 } 313 break; 314 315 case TYPE_CODE_FLT: 316 /* "float" arguments loaded in registers must be passed in 317 register format, aka "double". */ 318 if (accumulate_size < sizeof (arg_reg_buffer) 319 && TYPE_LENGTH (arg_type) == 4) 320 { 321 arg_type = builtin_type_ieee_double; 322 arg = value_cast (arg_type, arg); 323 } 324 /* Tru64 5.1 has a 128-bit long double, and passes this by 325 invisible reference. No one else uses this data type. */ 326 else if (TYPE_LENGTH (arg_type) == 16) 327 { 328 /* Allocate aligned storage. */ 329 sp = (sp & -16) - 16; 330 331 /* Write the real data into the stack. */ 332 write_memory (sp, value_contents (arg), 16); 333 334 /* Construct the indirection. */ 335 arg_type = lookup_pointer_type (arg_type); 336 arg = value_from_pointer (arg_type, sp); 337 } 338 break; 339 340 case TYPE_CODE_COMPLEX: 341 /* ??? The ABI says that complex values are passed as two 342 separate scalar values. This distinction only matters 343 for complex float. However, GCC does not implement this. */ 344 345 /* Tru64 5.1 has a 128-bit long double, and passes this by 346 invisible reference. */ 347 if (TYPE_LENGTH (arg_type) == 32) 348 { 349 /* Allocate aligned storage. */ 350 sp = (sp & -16) - 16; 351 352 /* Write the real data into the stack. */ 353 write_memory (sp, value_contents (arg), 32); 354 355 /* Construct the indirection. */ 356 arg_type = lookup_pointer_type (arg_type); 357 arg = value_from_pointer (arg_type, sp); 358 } 359 break; 360 361 default: 362 break; 363 } 364 m_arg->len = TYPE_LENGTH (arg_type); 365 m_arg->offset = accumulate_size; 366 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7; 367 m_arg->contents = value_contents_writeable (arg); 368 } 369 370 /* Determine required argument register loads, loading an argument register 371 is expensive as it uses three ptrace calls. */ 372 required_arg_regs = accumulate_size / 8; 373 if (required_arg_regs > ALPHA_NUM_ARG_REGS) 374 required_arg_regs = ALPHA_NUM_ARG_REGS; 375 376 /* Make room for the arguments on the stack. */ 377 if (accumulate_size < sizeof(arg_reg_buffer)) 378 accumulate_size = 0; 379 else 380 accumulate_size -= sizeof(arg_reg_buffer); 381 sp -= accumulate_size; 382 383 /* Keep sp aligned to a multiple of 16 as the ABI requires. */ 384 sp &= ~15; 385 386 /* `Push' arguments on the stack. */ 387 for (i = nargs; m_arg--, --i >= 0;) 388 { 389 gdb_byte *contents = m_arg->contents; 390 int offset = m_arg->offset; 391 int len = m_arg->len; 392 393 /* Copy the bytes destined for registers into arg_reg_buffer. */ 394 if (offset < sizeof(arg_reg_buffer)) 395 { 396 if (offset + len <= sizeof(arg_reg_buffer)) 397 { 398 memcpy (arg_reg_buffer + offset, contents, len); 399 continue; 400 } 401 else 402 { 403 int tlen = sizeof(arg_reg_buffer) - offset; 404 memcpy (arg_reg_buffer + offset, contents, tlen); 405 offset += tlen; 406 contents += tlen; 407 len -= tlen; 408 } 409 } 410 411 /* Everything else goes to the stack. */ 412 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len); 413 } 414 if (struct_return) 415 store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr); 416 417 /* Load the argument registers. */ 418 for (i = 0; i < required_arg_regs; i++) 419 { 420 regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i, 421 arg_reg_buffer + i*ALPHA_REGISTER_SIZE); 422 regcache_cooked_write (regcache, ALPHA_FPA0_REGNUM + i, 423 arg_reg_buffer + i*ALPHA_REGISTER_SIZE); 424 } 425 426 /* Finally, update the stack pointer. */ 427 regcache_cooked_write_signed (regcache, ALPHA_SP_REGNUM, sp); 428 429 return sp; 430} 431 432/* Extract from REGCACHE the value about to be returned from a function 433 and copy it into VALBUF. */ 434 435static void 436alpha_extract_return_value (struct type *valtype, struct regcache *regcache, 437 gdb_byte *valbuf) 438{ 439 int length = TYPE_LENGTH (valtype); 440 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; 441 ULONGEST l; 442 443 switch (TYPE_CODE (valtype)) 444 { 445 case TYPE_CODE_FLT: 446 switch (length) 447 { 448 case 4: 449 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer); 450 alpha_sts (valbuf, raw_buffer); 451 break; 452 453 case 8: 454 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 455 break; 456 457 case 16: 458 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); 459 read_memory (l, valbuf, 16); 460 break; 461 462 default: 463 internal_error (__FILE__, __LINE__, _("unknown floating point width")); 464 } 465 break; 466 467 case TYPE_CODE_COMPLEX: 468 switch (length) 469 { 470 case 8: 471 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ 472 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 473 break; 474 475 case 16: 476 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf); 477 regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); 478 break; 479 480 case 32: 481 regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l); 482 read_memory (l, valbuf, 32); 483 break; 484 485 default: 486 internal_error (__FILE__, __LINE__, _("unknown floating point width")); 487 } 488 break; 489 490 default: 491 /* Assume everything else degenerates to an integer. */ 492 regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l); 493 store_unsigned_integer (valbuf, length, l); 494 break; 495 } 496} 497 498/* Insert the given value into REGCACHE as if it was being 499 returned by a function. */ 500 501static void 502alpha_store_return_value (struct type *valtype, struct regcache *regcache, 503 const gdb_byte *valbuf) 504{ 505 int length = TYPE_LENGTH (valtype); 506 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; 507 ULONGEST l; 508 509 switch (TYPE_CODE (valtype)) 510 { 511 case TYPE_CODE_FLT: 512 switch (length) 513 { 514 case 4: 515 alpha_lds (raw_buffer, valbuf); 516 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer); 517 break; 518 519 case 8: 520 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 521 break; 522 523 case 16: 524 /* FIXME: 128-bit long doubles are returned like structures: 525 by writing into indirect storage provided by the caller 526 as the first argument. */ 527 error (_("Cannot set a 128-bit long double return value.")); 528 529 default: 530 internal_error (__FILE__, __LINE__, _("unknown floating point width")); 531 } 532 break; 533 534 case TYPE_CODE_COMPLEX: 535 switch (length) 536 { 537 case 8: 538 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */ 539 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 540 break; 541 542 case 16: 543 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf); 544 regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8); 545 break; 546 547 case 32: 548 /* FIXME: 128-bit long doubles are returned like structures: 549 by writing into indirect storage provided by the caller 550 as the first argument. */ 551 error (_("Cannot set a 128-bit long double return value.")); 552 553 default: 554 internal_error (__FILE__, __LINE__, _("unknown floating point width")); 555 } 556 break; 557 558 default: 559 /* Assume everything else degenerates to an integer. */ 560 /* 32-bit values must be sign-extended to 64 bits 561 even if the base data type is unsigned. */ 562 if (length == 4) 563 valtype = builtin_type_int32; 564 l = unpack_long (valtype, valbuf); 565 regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l); 566 break; 567 } 568} 569 570static enum return_value_convention 571alpha_return_value (struct gdbarch *gdbarch, struct type *type, 572 struct regcache *regcache, gdb_byte *readbuf, 573 const gdb_byte *writebuf) 574{ 575 enum type_code code = TYPE_CODE (type); 576 577 if ((code == TYPE_CODE_STRUCT 578 || code == TYPE_CODE_UNION 579 || code == TYPE_CODE_ARRAY) 580 && gdbarch_tdep (gdbarch)->return_in_memory (type)) 581 { 582 if (readbuf) 583 { 584 ULONGEST addr; 585 regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr); 586 read_memory (addr, readbuf, TYPE_LENGTH (type)); 587 } 588 589 return RETURN_VALUE_ABI_RETURNS_ADDRESS; 590 } 591 592 if (readbuf) 593 alpha_extract_return_value (type, regcache, readbuf); 594 if (writebuf) 595 alpha_store_return_value (type, regcache, writebuf); 596 597 return RETURN_VALUE_REGISTER_CONVENTION; 598} 599 600static int 601alpha_return_in_memory_always (struct type *type) 602{ 603 return 1; 604} 605 606static const gdb_byte * 607alpha_breakpoint_from_pc (CORE_ADDR *pc, int *len) 608{ 609 static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */ 610 611 *len = sizeof(break_insn); 612 return break_insn; 613} 614 615 616/* This returns the PC of the first insn after the prologue. 617 If we can't find the prologue, then return 0. */ 618 619CORE_ADDR 620alpha_after_prologue (CORE_ADDR pc) 621{ 622 struct symtab_and_line sal; 623 CORE_ADDR func_addr, func_end; 624 625 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 626 return 0; 627 628 sal = find_pc_line (func_addr, 0); 629 if (sal.end < func_end) 630 return sal.end; 631 632 /* The line after the prologue is after the end of the function. In this 633 case, tell the caller to find the prologue the hard way. */ 634 return 0; 635} 636 637/* Read an instruction from memory at PC, looking through breakpoints. */ 638 639unsigned int 640alpha_read_insn (CORE_ADDR pc) 641{ 642 gdb_byte buf[ALPHA_INSN_SIZE]; 643 int status; 644 645 status = read_memory_nobpt (pc, buf, sizeof (buf)); 646 if (status) 647 memory_error (status, pc); 648 return extract_unsigned_integer (buf, sizeof (buf)); 649} 650 651/* To skip prologues, I use this predicate. Returns either PC itself 652 if the code at PC does not look like a function prologue; otherwise 653 returns an address that (if we're lucky) follows the prologue. If 654 LENIENT, then we must skip everything which is involved in setting 655 up the frame (it's OK to skip more, just so long as we don't skip 656 anything which might clobber the registers which are being saved. */ 657 658static CORE_ADDR 659alpha_skip_prologue (CORE_ADDR pc) 660{ 661 unsigned long inst; 662 int offset; 663 CORE_ADDR post_prologue_pc; 664 gdb_byte buf[ALPHA_INSN_SIZE]; 665 666 /* Silently return the unaltered pc upon memory errors. 667 This could happen on OSF/1 if decode_line_1 tries to skip the 668 prologue for quickstarted shared library functions when the 669 shared library is not yet mapped in. 670 Reading target memory is slow over serial lines, so we perform 671 this check only if the target has shared libraries (which all 672 Alpha targets do). */ 673 if (target_read_memory (pc, buf, sizeof (buf))) 674 return pc; 675 676 /* See if we can determine the end of the prologue via the symbol table. 677 If so, then return either PC, or the PC after the prologue, whichever 678 is greater. */ 679 680 post_prologue_pc = alpha_after_prologue (pc); 681 if (post_prologue_pc != 0) 682 return max (pc, post_prologue_pc); 683 684 /* Can't determine prologue from the symbol table, need to examine 685 instructions. */ 686 687 /* Skip the typical prologue instructions. These are the stack adjustment 688 instruction and the instructions that save registers on the stack 689 or in the gcc frame. */ 690 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE) 691 { 692 inst = alpha_read_insn (pc + offset); 693 694 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */ 695 continue; 696 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */ 697 continue; 698 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ 699 continue; 700 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */ 701 continue; 702 703 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */ 704 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */ 705 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */ 706 continue; 707 708 if (inst == 0x47de040f) /* bis sp,sp,fp */ 709 continue; 710 if (inst == 0x47fe040f) /* bis zero,sp,fp */ 711 continue; 712 713 break; 714 } 715 return pc + offset; 716} 717 718 719/* Figure out where the longjmp will land. 720 We expect the first arg to be a pointer to the jmp_buf structure from 721 which we extract the PC (JB_PC) that we will land at. The PC is copied 722 into the "pc". This routine returns true on success. */ 723 724static int 725alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc) 726{ 727 struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); 728 CORE_ADDR jb_addr; 729 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE]; 730 731 jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM); 732 733 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size), 734 raw_buffer, tdep->jb_elt_size)) 735 return 0; 736 737 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size); 738 return 1; 739} 740 741 742/* Frame unwinder for signal trampolines. We use alpha tdep bits that 743 describe the location and shape of the sigcontext structure. After 744 that, all registers are in memory, so it's easy. */ 745/* ??? Shouldn't we be able to do this generically, rather than with 746 OSABI data specific to Alpha? */ 747 748struct alpha_sigtramp_unwind_cache 749{ 750 CORE_ADDR sigcontext_addr; 751}; 752 753static struct alpha_sigtramp_unwind_cache * 754alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame, 755 void **this_prologue_cache) 756{ 757 struct alpha_sigtramp_unwind_cache *info; 758 struct gdbarch_tdep *tdep; 759 760 if (*this_prologue_cache) 761 return *this_prologue_cache; 762 763 info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache); 764 *this_prologue_cache = info; 765 766 tdep = gdbarch_tdep (current_gdbarch); 767 info->sigcontext_addr = tdep->sigcontext_addr (next_frame); 768 769 return info; 770} 771 772/* Return the address of REGNUM in a sigtramp frame. Since this is 773 all arithmetic, it doesn't seem worthwhile to cache it. */ 774 775static CORE_ADDR 776alpha_sigtramp_register_address (CORE_ADDR sigcontext_addr, int regnum) 777{ 778 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 779 780 if (regnum >= 0 && regnum < 32) 781 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8; 782 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32) 783 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8; 784 else if (regnum == ALPHA_PC_REGNUM) 785 return sigcontext_addr + tdep->sc_pc_offset; 786 787 return 0; 788} 789 790/* Given a GDB frame, determine the address of the calling function's 791 frame. This will be used to create a new GDB frame struct. */ 792 793static void 794alpha_sigtramp_frame_this_id (struct frame_info *next_frame, 795 void **this_prologue_cache, 796 struct frame_id *this_id) 797{ 798 struct alpha_sigtramp_unwind_cache *info 799 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); 800 struct gdbarch_tdep *tdep; 801 CORE_ADDR stack_addr, code_addr; 802 803 /* If the OSABI couldn't locate the sigcontext, give up. */ 804 if (info->sigcontext_addr == 0) 805 return; 806 807 /* If we have dynamic signal trampolines, find their start. 808 If we do not, then we must assume there is a symbol record 809 that can provide the start address. */ 810 tdep = gdbarch_tdep (current_gdbarch); 811 if (tdep->dynamic_sigtramp_offset) 812 { 813 int offset; 814 code_addr = frame_pc_unwind (next_frame); 815 offset = tdep->dynamic_sigtramp_offset (code_addr); 816 if (offset >= 0) 817 code_addr -= offset; 818 else 819 code_addr = 0; 820 } 821 else 822 code_addr = frame_func_unwind (next_frame, SIGTRAMP_FRAME); 823 824 /* The stack address is trivially read from the sigcontext. */ 825 stack_addr = alpha_sigtramp_register_address (info->sigcontext_addr, 826 ALPHA_SP_REGNUM); 827 stack_addr = get_frame_memory_unsigned (next_frame, stack_addr, 828 ALPHA_REGISTER_SIZE); 829 830 *this_id = frame_id_build (stack_addr, code_addr); 831} 832 833/* Retrieve the value of REGNUM in FRAME. Don't give up! */ 834 835static void 836alpha_sigtramp_frame_prev_register (struct frame_info *next_frame, 837 void **this_prologue_cache, 838 int regnum, int *optimizedp, 839 enum lval_type *lvalp, CORE_ADDR *addrp, 840 int *realnump, gdb_byte *bufferp) 841{ 842 struct alpha_sigtramp_unwind_cache *info 843 = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache); 844 CORE_ADDR addr; 845 846 if (info->sigcontext_addr != 0) 847 { 848 /* All integer and fp registers are stored in memory. */ 849 addr = alpha_sigtramp_register_address (info->sigcontext_addr, regnum); 850 if (addr != 0) 851 { 852 *optimizedp = 0; 853 *lvalp = lval_memory; 854 *addrp = addr; 855 *realnump = -1; 856 if (bufferp != NULL) 857 get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE); 858 return; 859 } 860 } 861 862 /* This extra register may actually be in the sigcontext, but our 863 current description of it in alpha_sigtramp_frame_unwind_cache 864 doesn't include it. Too bad. Fall back on whatever's in the 865 outer frame. */ 866 *optimizedp = 0; 867 *lvalp = lval_register; 868 *addrp = 0; 869 *realnump = regnum; 870 if (bufferp) 871 frame_unwind_register (next_frame, *realnump, bufferp); 872} 873 874static const struct frame_unwind alpha_sigtramp_frame_unwind = { 875 SIGTRAMP_FRAME, 876 alpha_sigtramp_frame_this_id, 877 alpha_sigtramp_frame_prev_register 878}; 879 880static const struct frame_unwind * 881alpha_sigtramp_frame_sniffer (struct frame_info *next_frame) 882{ 883 CORE_ADDR pc = frame_pc_unwind (next_frame); 884 char *name; 885 886 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead 887 look at tramp-frame.h and other simplier per-architecture 888 sigtramp unwinders. */ 889 890 /* We shouldn't even bother to try if the OSABI didn't register a 891 sigcontext_addr handler or pc_in_sigtramp hander. */ 892 if (gdbarch_tdep (current_gdbarch)->sigcontext_addr == NULL) 893 return NULL; 894 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp == NULL) 895 return NULL; 896 897 /* Otherwise we should be in a signal frame. */ 898 find_pc_partial_function (pc, &name, NULL, NULL); 899 if (gdbarch_tdep (current_gdbarch)->pc_in_sigtramp (pc, name)) 900 return &alpha_sigtramp_frame_unwind; 901 902 return NULL; 903} 904 905/* Fallback alpha frame unwinder. Uses instruction scanning and knows 906 something about the traditional layout of alpha stack frames. */ 907 908struct alpha_heuristic_unwind_cache 909{ 910 CORE_ADDR *saved_regs; 911 CORE_ADDR vfp; 912 CORE_ADDR start_pc; 913 int return_reg; 914}; 915 916/* Heuristic_proc_start may hunt through the text section for a long 917 time across a 2400 baud serial line. Allows the user to limit this 918 search. */ 919static unsigned int heuristic_fence_post = 0; 920 921/* Attempt to locate the start of the function containing PC. We assume that 922 the previous function ends with an about_to_return insn. Not foolproof by 923 any means, since gcc is happy to put the epilogue in the middle of a 924 function. But we're guessing anyway... */ 925 926static CORE_ADDR 927alpha_heuristic_proc_start (CORE_ADDR pc) 928{ 929 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); 930 CORE_ADDR last_non_nop = pc; 931 CORE_ADDR fence = pc - heuristic_fence_post; 932 CORE_ADDR orig_pc = pc; 933 CORE_ADDR func; 934 935 if (pc == 0) 936 return 0; 937 938 /* First see if we can find the start of the function from minimal 939 symbol information. This can succeed with a binary that doesn't 940 have debug info, but hasn't been stripped. */ 941 func = get_pc_function_start (pc); 942 if (func) 943 return func; 944 945 if (heuristic_fence_post == UINT_MAX 946 || fence < tdep->vm_min_address) 947 fence = tdep->vm_min_address; 948 949 /* Search back for previous return; also stop at a 0, which might be 950 seen for instance before the start of a code section. Don't include 951 nops, since this usually indicates padding between functions. */ 952 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE) 953 { 954 unsigned int insn = alpha_read_insn (pc); 955 switch (insn) 956 { 957 case 0: /* invalid insn */ 958 case 0x6bfa8001: /* ret $31,($26),1 */ 959 return last_non_nop; 960 961 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */ 962 case 0x47ff041f: /* nop: bis $31,$31,$31 */ 963 break; 964 965 default: 966 last_non_nop = pc; 967 break; 968 } 969 } 970 971 /* It's not clear to me why we reach this point when stopping quietly, 972 but with this test, at least we don't print out warnings for every 973 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */ 974 if (stop_soon == NO_STOP_QUIETLY) 975 { 976 static int blurb_printed = 0; 977 978 if (fence == tdep->vm_min_address) 979 warning (_("Hit beginning of text section without finding \ 980enclosing function for address 0x%s"), paddr_nz (orig_pc)); 981 else 982 warning (_("Hit heuristic-fence-post without finding \ 983enclosing function for address 0x%s"), paddr_nz (orig_pc)); 984 985 if (!blurb_printed) 986 { 987 printf_filtered (_("\ 988This warning occurs if you are debugging a function without any symbols\n\ 989(for example, in a stripped executable). In that case, you may wish to\n\ 990increase the size of the search with the `set heuristic-fence-post' command.\n\ 991\n\ 992Otherwise, you told GDB there was a function where there isn't one, or\n\ 993(more likely) you have encountered a bug in GDB.\n")); 994 blurb_printed = 1; 995 } 996 } 997 998 return 0; 999} 1000 1001static struct alpha_heuristic_unwind_cache * 1002alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame, 1003 void **this_prologue_cache, 1004 CORE_ADDR start_pc) 1005{ 1006 struct alpha_heuristic_unwind_cache *info; 1007 ULONGEST val; 1008 CORE_ADDR limit_pc, cur_pc; 1009 int frame_reg, frame_size, return_reg, reg; 1010 1011 if (*this_prologue_cache) 1012 return *this_prologue_cache; 1013 1014 info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache); 1015 *this_prologue_cache = info; 1016 info->saved_regs = frame_obstack_zalloc (SIZEOF_FRAME_SAVED_REGS); 1017 1018 limit_pc = frame_pc_unwind (next_frame); 1019 if (start_pc == 0) 1020 start_pc = alpha_heuristic_proc_start (limit_pc); 1021 info->start_pc = start_pc; 1022 1023 frame_reg = ALPHA_SP_REGNUM; 1024 frame_size = 0; 1025 return_reg = -1; 1026 1027 /* If we've identified a likely place to start, do code scanning. */ 1028 if (start_pc != 0) 1029 { 1030 /* Limit the forward search to 50 instructions. */ 1031 if (start_pc + 200 < limit_pc) 1032 limit_pc = start_pc + 200; 1033 1034 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE) 1035 { 1036 unsigned int word = alpha_read_insn (cur_pc); 1037 1038 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */ 1039 { 1040 if (word & 0x8000) 1041 { 1042 /* Consider only the first stack allocation instruction 1043 to contain the static size of the frame. */ 1044 if (frame_size == 0) 1045 frame_size = (-word) & 0xffff; 1046 } 1047 else 1048 { 1049 /* Exit loop if a positive stack adjustment is found, which 1050 usually means that the stack cleanup code in the function 1051 epilogue is reached. */ 1052 break; 1053 } 1054 } 1055 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ 1056 { 1057 reg = (word & 0x03e00000) >> 21; 1058 1059 /* Ignore this instruction if we have already encountered 1060 an instruction saving the same register earlier in the 1061 function code. The current instruction does not tell 1062 us where the original value upon function entry is saved. 1063 All it says is that the function we are scanning reused 1064 that register for some computation of its own, and is now 1065 saving its result. */ 1066 if (info->saved_regs[reg]) 1067 continue; 1068 1069 if (reg == 31) 1070 continue; 1071 1072 /* Do not compute the address where the register was saved yet, 1073 because we don't know yet if the offset will need to be 1074 relative to $sp or $fp (we can not compute the address 1075 relative to $sp if $sp is updated during the execution of 1076 the current subroutine, for instance when doing some alloca). 1077 So just store the offset for the moment, and compute the 1078 address later when we know whether this frame has a frame 1079 pointer or not. */ 1080 /* Hack: temporarily add one, so that the offset is non-zero 1081 and we can tell which registers have save offsets below. */ 1082 info->saved_regs[reg] = (word & 0xffff) + 1; 1083 1084 /* Starting with OSF/1-3.2C, the system libraries are shipped 1085 without local symbols, but they still contain procedure 1086 descriptors without a symbol reference. GDB is currently 1087 unable to find these procedure descriptors and uses 1088 heuristic_proc_desc instead. 1089 As some low level compiler support routines (__div*, __add*) 1090 use a non-standard return address register, we have to 1091 add some heuristics to determine the return address register, 1092 or stepping over these routines will fail. 1093 Usually the return address register is the first register 1094 saved on the stack, but assembler optimization might 1095 rearrange the register saves. 1096 So we recognize only a few registers (t7, t9, ra) within 1097 the procedure prologue as valid return address registers. 1098 If we encounter a return instruction, we extract the 1099 the return address register from it. 1100 1101 FIXME: Rewriting GDB to access the procedure descriptors, 1102 e.g. via the minimal symbol table, might obviate this hack. */ 1103 if (return_reg == -1 1104 && cur_pc < (start_pc + 80) 1105 && (reg == ALPHA_T7_REGNUM 1106 || reg == ALPHA_T9_REGNUM 1107 || reg == ALPHA_RA_REGNUM)) 1108 return_reg = reg; 1109 } 1110 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ 1111 return_reg = (word >> 16) & 0x1f; 1112 else if (word == 0x47de040f) /* bis sp,sp,fp */ 1113 frame_reg = ALPHA_GCC_FP_REGNUM; 1114 else if (word == 0x47fe040f) /* bis zero,sp,fp */ 1115 frame_reg = ALPHA_GCC_FP_REGNUM; 1116 } 1117 1118 /* If we haven't found a valid return address register yet, keep 1119 searching in the procedure prologue. */ 1120 if (return_reg == -1) 1121 { 1122 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80)) 1123 { 1124 unsigned int word = alpha_read_insn (cur_pc); 1125 1126 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */ 1127 { 1128 reg = (word & 0x03e00000) >> 21; 1129 if (reg == ALPHA_T7_REGNUM 1130 || reg == ALPHA_T9_REGNUM 1131 || reg == ALPHA_RA_REGNUM) 1132 { 1133 return_reg = reg; 1134 break; 1135 } 1136 } 1137 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */ 1138 { 1139 return_reg = (word >> 16) & 0x1f; 1140 break; 1141 } 1142 1143 cur_pc += ALPHA_INSN_SIZE; 1144 } 1145 } 1146 } 1147 1148 /* Failing that, do default to the customary RA. */ 1149 if (return_reg == -1) 1150 return_reg = ALPHA_RA_REGNUM; 1151 info->return_reg = return_reg; 1152 1153 frame_unwind_unsigned_register (next_frame, frame_reg, &val); 1154 info->vfp = val + frame_size; 1155 1156 /* Convert offsets to absolute addresses. See above about adding 1157 one to the offsets to make all detected offsets non-zero. */ 1158 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg) 1159 if (info->saved_regs[reg]) 1160 info->saved_regs[reg] += val - 1; 1161 1162 return info; 1163} 1164 1165/* Given a GDB frame, determine the address of the calling function's 1166 frame. This will be used to create a new GDB frame struct. */ 1167 1168static void 1169alpha_heuristic_frame_this_id (struct frame_info *next_frame, 1170 void **this_prologue_cache, 1171 struct frame_id *this_id) 1172{ 1173 struct alpha_heuristic_unwind_cache *info 1174 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); 1175 1176 *this_id = frame_id_build (info->vfp, info->start_pc); 1177} 1178 1179/* Retrieve the value of REGNUM in FRAME. Don't give up! */ 1180 1181static void 1182alpha_heuristic_frame_prev_register (struct frame_info *next_frame, 1183 void **this_prologue_cache, 1184 int regnum, int *optimizedp, 1185 enum lval_type *lvalp, CORE_ADDR *addrp, 1186 int *realnump, gdb_byte *bufferp) 1187{ 1188 struct alpha_heuristic_unwind_cache *info 1189 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); 1190 1191 /* The PC of the previous frame is stored in the link register of 1192 the current frame. Frob regnum so that we pull the value from 1193 the correct place. */ 1194 if (regnum == ALPHA_PC_REGNUM) 1195 regnum = info->return_reg; 1196 1197 /* For all registers known to be saved in the current frame, 1198 do the obvious and pull the value out. */ 1199 if (info->saved_regs[regnum]) 1200 { 1201 *optimizedp = 0; 1202 *lvalp = lval_memory; 1203 *addrp = info->saved_regs[regnum]; 1204 *realnump = -1; 1205 if (bufferp != NULL) 1206 get_frame_memory (next_frame, *addrp, bufferp, ALPHA_REGISTER_SIZE); 1207 return; 1208 } 1209 1210 /* The stack pointer of the previous frame is computed by popping 1211 the current stack frame. */ 1212 if (regnum == ALPHA_SP_REGNUM) 1213 { 1214 *optimizedp = 0; 1215 *lvalp = not_lval; 1216 *addrp = 0; 1217 *realnump = -1; 1218 if (bufferp != NULL) 1219 store_unsigned_integer (bufferp, ALPHA_REGISTER_SIZE, info->vfp); 1220 return; 1221 } 1222 1223 /* Otherwise assume the next frame has the same register value. */ 1224 *optimizedp = 0; 1225 *lvalp = lval_register; 1226 *addrp = 0; 1227 *realnump = regnum; 1228 if (bufferp) 1229 frame_unwind_register (next_frame, *realnump, bufferp); 1230} 1231 1232static const struct frame_unwind alpha_heuristic_frame_unwind = { 1233 NORMAL_FRAME, 1234 alpha_heuristic_frame_this_id, 1235 alpha_heuristic_frame_prev_register 1236}; 1237 1238static const struct frame_unwind * 1239alpha_heuristic_frame_sniffer (struct frame_info *next_frame) 1240{ 1241 return &alpha_heuristic_frame_unwind; 1242} 1243 1244static CORE_ADDR 1245alpha_heuristic_frame_base_address (struct frame_info *next_frame, 1246 void **this_prologue_cache) 1247{ 1248 struct alpha_heuristic_unwind_cache *info 1249 = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0); 1250 1251 return info->vfp; 1252} 1253 1254static const struct frame_base alpha_heuristic_frame_base = { 1255 &alpha_heuristic_frame_unwind, 1256 alpha_heuristic_frame_base_address, 1257 alpha_heuristic_frame_base_address, 1258 alpha_heuristic_frame_base_address 1259}; 1260 1261/* Just like reinit_frame_cache, but with the right arguments to be 1262 callable as an sfunc. Used by the "set heuristic-fence-post" command. */ 1263 1264static void 1265reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c) 1266{ 1267 reinit_frame_cache (); 1268} 1269 1270 1271/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that 1272 dummy frame. The frame ID's base needs to match the TOS value 1273 saved by save_dummy_frame_tos(), and the PC match the dummy frame's 1274 breakpoint. */ 1275 1276static struct frame_id 1277alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) 1278{ 1279 ULONGEST base; 1280 frame_unwind_unsigned_register (next_frame, ALPHA_SP_REGNUM, &base); 1281 return frame_id_build (base, frame_pc_unwind (next_frame)); 1282} 1283 1284static CORE_ADDR 1285alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 1286{ 1287 ULONGEST pc; 1288 frame_unwind_unsigned_register (next_frame, ALPHA_PC_REGNUM, &pc); 1289 return pc; 1290} 1291 1292 1293/* Helper routines for alpha*-nat.c files to move register sets to and 1294 from core files. The UNIQUE pointer is allowed to be NULL, as most 1295 targets don't supply this value in their core files. */ 1296 1297void 1298alpha_supply_int_regs (struct regcache *regcache, int regno, 1299 const void *r0_r30, const void *pc, const void *unique) 1300{ 1301 const gdb_byte *regs = r0_r30; 1302 int i; 1303 1304 for (i = 0; i < 31; ++i) 1305 if (regno == i || regno == -1) 1306 regcache_raw_supply (regcache, i, regs + i * 8); 1307 1308 if (regno == ALPHA_ZERO_REGNUM || regno == -1) 1309 regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL); 1310 1311 if (regno == ALPHA_PC_REGNUM || regno == -1) 1312 regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc); 1313 1314 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1) 1315 regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique); 1316} 1317 1318void 1319alpha_fill_int_regs (const struct regcache *regcache, 1320 int regno, void *r0_r30, void *pc, void *unique) 1321{ 1322 gdb_byte *regs = r0_r30; 1323 int i; 1324 1325 for (i = 0; i < 31; ++i) 1326 if (regno == i || regno == -1) 1327 regcache_raw_collect (regcache, i, regs + i * 8); 1328 1329 if (regno == ALPHA_PC_REGNUM || regno == -1) 1330 regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc); 1331 1332 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1)) 1333 regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique); 1334} 1335 1336void 1337alpha_supply_fp_regs (struct regcache *regcache, int regno, 1338 const void *f0_f30, const void *fpcr) 1339{ 1340 const gdb_byte *regs = f0_f30; 1341 int i; 1342 1343 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) 1344 if (regno == i || regno == -1) 1345 regcache_raw_supply (regcache, i, 1346 regs + (i - ALPHA_FP0_REGNUM) * 8); 1347 1348 if (regno == ALPHA_FPCR_REGNUM || regno == -1) 1349 regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr); 1350} 1351 1352void 1353alpha_fill_fp_regs (const struct regcache *regcache, 1354 int regno, void *f0_f30, void *fpcr) 1355{ 1356 gdb_byte *regs = f0_f30; 1357 int i; 1358 1359 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i) 1360 if (regno == i || regno == -1) 1361 regcache_raw_collect (regcache, i, 1362 regs + (i - ALPHA_FP0_REGNUM) * 8); 1363 1364 if (regno == ALPHA_FPCR_REGNUM || regno == -1) 1365 regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr); 1366} 1367 1368 1369 1370/* Return nonzero if the G_floating register value in REG is equal to 1371 zero for FP control instructions. */ 1372 1373static int 1374fp_register_zero_p (LONGEST reg) 1375{ 1376 /* Check that all bits except the sign bit are zero. */ 1377 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1; 1378 1379 return ((reg & zero_mask) == 0); 1380} 1381 1382/* Return the value of the sign bit for the G_floating register 1383 value held in REG. */ 1384 1385static int 1386fp_register_sign_bit (LONGEST reg) 1387{ 1388 const LONGEST sign_mask = (LONGEST) 1 << 63; 1389 1390 return ((reg & sign_mask) != 0); 1391} 1392 1393/* alpha_software_single_step() is called just before we want to resume 1394 the inferior, if we want to single-step it but there is no hardware 1395 or kernel single-step support (NetBSD on Alpha, for example). We find 1396 the target of the coming instruction and breakpoint it. */ 1397 1398static CORE_ADDR 1399alpha_next_pc (struct frame_info *frame, CORE_ADDR pc) 1400{ 1401 unsigned int insn; 1402 unsigned int op; 1403 int regno; 1404 int offset; 1405 LONGEST rav; 1406 1407 insn = alpha_read_insn (pc); 1408 1409 /* Opcode is top 6 bits. */ 1410 op = (insn >> 26) & 0x3f; 1411 1412 if (op == 0x1a) 1413 { 1414 /* Jump format: target PC is: 1415 RB & ~3 */ 1416 return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3); 1417 } 1418 1419 if ((op & 0x30) == 0x30) 1420 { 1421 /* Branch format: target PC is: 1422 (new PC) + (4 * sext(displacement)) */ 1423 if (op == 0x30 || /* BR */ 1424 op == 0x34) /* BSR */ 1425 { 1426 branch_taken: 1427 offset = (insn & 0x001fffff); 1428 if (offset & 0x00100000) 1429 offset |= 0xffe00000; 1430 offset *= ALPHA_INSN_SIZE; 1431 return (pc + ALPHA_INSN_SIZE + offset); 1432 } 1433 1434 /* Need to determine if branch is taken; read RA. */ 1435 regno = (insn >> 21) & 0x1f; 1436 switch (op) 1437 { 1438 case 0x31: /* FBEQ */ 1439 case 0x36: /* FBGE */ 1440 case 0x37: /* FBGT */ 1441 case 0x33: /* FBLE */ 1442 case 0x32: /* FBLT */ 1443 case 0x35: /* FBNE */ 1444 regno += gdbarch_fp0_regnum (current_gdbarch); 1445 } 1446 1447 rav = get_frame_register_signed (frame, regno); 1448 1449 switch (op) 1450 { 1451 case 0x38: /* BLBC */ 1452 if ((rav & 1) == 0) 1453 goto branch_taken; 1454 break; 1455 case 0x3c: /* BLBS */ 1456 if (rav & 1) 1457 goto branch_taken; 1458 break; 1459 case 0x39: /* BEQ */ 1460 if (rav == 0) 1461 goto branch_taken; 1462 break; 1463 case 0x3d: /* BNE */ 1464 if (rav != 0) 1465 goto branch_taken; 1466 break; 1467 case 0x3a: /* BLT */ 1468 if (rav < 0) 1469 goto branch_taken; 1470 break; 1471 case 0x3b: /* BLE */ 1472 if (rav <= 0) 1473 goto branch_taken; 1474 break; 1475 case 0x3f: /* BGT */ 1476 if (rav > 0) 1477 goto branch_taken; 1478 break; 1479 case 0x3e: /* BGE */ 1480 if (rav >= 0) 1481 goto branch_taken; 1482 break; 1483 1484 /* Floating point branches. */ 1485 1486 case 0x31: /* FBEQ */ 1487 if (fp_register_zero_p (rav)) 1488 goto branch_taken; 1489 break; 1490 case 0x36: /* FBGE */ 1491 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav)) 1492 goto branch_taken; 1493 break; 1494 case 0x37: /* FBGT */ 1495 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav)) 1496 goto branch_taken; 1497 break; 1498 case 0x33: /* FBLE */ 1499 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav)) 1500 goto branch_taken; 1501 break; 1502 case 0x32: /* FBLT */ 1503 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav)) 1504 goto branch_taken; 1505 break; 1506 case 0x35: /* FBNE */ 1507 if (! fp_register_zero_p (rav)) 1508 goto branch_taken; 1509 break; 1510 } 1511 } 1512 1513 /* Not a branch or branch not taken; target PC is: 1514 pc + 4 */ 1515 return (pc + ALPHA_INSN_SIZE); 1516} 1517 1518int 1519alpha_software_single_step (struct frame_info *frame) 1520{ 1521 CORE_ADDR pc, next_pc; 1522 1523 pc = get_frame_pc (frame); 1524 next_pc = alpha_next_pc (frame, pc); 1525 1526 insert_single_step_breakpoint (next_pc); 1527 return 1; 1528} 1529 1530 1531/* Initialize the current architecture based on INFO. If possible, re-use an 1532 architecture from ARCHES, which is a list of architectures already created 1533 during this debugging session. 1534 1535 Called e.g. at program startup, when reading a core file, and when reading 1536 a binary file. */ 1537 1538static struct gdbarch * 1539alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 1540{ 1541 struct gdbarch_tdep *tdep; 1542 struct gdbarch *gdbarch; 1543 1544 /* Try to determine the ABI of the object we are loading. */ 1545 if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN) 1546 { 1547 /* If it's an ECOFF file, assume it's OSF/1. */ 1548 if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour) 1549 info.osabi = GDB_OSABI_OSF1; 1550 } 1551 1552 /* Find a candidate among extant architectures. */ 1553 arches = gdbarch_list_lookup_by_info (arches, &info); 1554 if (arches != NULL) 1555 return arches->gdbarch; 1556 1557 tdep = xmalloc (sizeof (struct gdbarch_tdep)); 1558 gdbarch = gdbarch_alloc (&info, tdep); 1559 1560 /* Lowest text address. This is used by heuristic_proc_start() 1561 to decide when to stop looking. */ 1562 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL; 1563 1564 tdep->dynamic_sigtramp_offset = NULL; 1565 tdep->sigcontext_addr = NULL; 1566 tdep->sc_pc_offset = 2 * 8; 1567 tdep->sc_regs_offset = 4 * 8; 1568 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8; 1569 1570 tdep->jb_pc = -1; /* longjmp support not enabled by default */ 1571 1572 tdep->return_in_memory = alpha_return_in_memory_always; 1573 1574 /* Type sizes */ 1575 set_gdbarch_short_bit (gdbarch, 16); 1576 set_gdbarch_int_bit (gdbarch, 32); 1577 set_gdbarch_long_bit (gdbarch, 64); 1578 set_gdbarch_long_long_bit (gdbarch, 64); 1579 set_gdbarch_float_bit (gdbarch, 32); 1580 set_gdbarch_double_bit (gdbarch, 64); 1581 set_gdbarch_long_double_bit (gdbarch, 64); 1582 set_gdbarch_ptr_bit (gdbarch, 64); 1583 1584 /* Register info */ 1585 set_gdbarch_num_regs (gdbarch, ALPHA_NUM_REGS); 1586 set_gdbarch_sp_regnum (gdbarch, ALPHA_SP_REGNUM); 1587 set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); 1588 set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); 1589 1590 set_gdbarch_register_name (gdbarch, alpha_register_name); 1591 set_gdbarch_register_type (gdbarch, alpha_register_type); 1592 1593 set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); 1594 set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); 1595 1596 set_gdbarch_convert_register_p (gdbarch, alpha_convert_register_p); 1597 set_gdbarch_register_to_value (gdbarch, alpha_register_to_value); 1598 set_gdbarch_value_to_register (gdbarch, alpha_value_to_register); 1599 1600 set_gdbarch_register_reggroup_p (gdbarch, alpha_register_reggroup_p); 1601 1602 /* Prologue heuristics. */ 1603 set_gdbarch_skip_prologue (gdbarch, alpha_skip_prologue); 1604 1605 /* Disassembler. */ 1606 set_gdbarch_print_insn (gdbarch, print_insn_alpha); 1607 1608 /* Call info. */ 1609 1610 set_gdbarch_return_value (gdbarch, alpha_return_value); 1611 1612 /* Settings for calling functions in the inferior. */ 1613 set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call); 1614 1615 /* Methods for saving / extracting a dummy frame's ID. */ 1616 set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id); 1617 1618 /* Return the unwound PC value. */ 1619 set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc); 1620 1621 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1622 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); 1623 1624 set_gdbarch_breakpoint_from_pc (gdbarch, alpha_breakpoint_from_pc); 1625 set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE); 1626 set_gdbarch_cannot_step_breakpoint (gdbarch, 1); 1627 1628 /* Hook in ABI-specific overrides, if they have been registered. */ 1629 gdbarch_init_osabi (info, gdbarch); 1630 1631 /* Now that we have tuned the configuration, set a few final things 1632 based on what the OS ABI has told us. */ 1633 1634 if (tdep->jb_pc >= 0) 1635 set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target); 1636 1637 frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer); 1638 frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer); 1639 1640 frame_base_set_default (gdbarch, &alpha_heuristic_frame_base); 1641 1642 return gdbarch; 1643} 1644 1645void 1646alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch) 1647{ 1648 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); 1649 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); 1650} 1651 1652extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */ 1653 1654void 1655_initialize_alpha_tdep (void) 1656{ 1657 struct cmd_list_element *c; 1658 1659 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); 1660 1661 /* Let the user set the fence post for heuristic_proc_start. */ 1662 1663 /* We really would like to have both "0" and "unlimited" work, but 1664 command.c doesn't deal with that. So make it a var_zinteger 1665 because the user can always use "999999" or some such for unlimited. */ 1666 /* We need to throw away the frame cache when we set this, since it 1667 might change our ability to get backtraces. */ 1668 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support, 1669 &heuristic_fence_post, _("\ 1670Set the distance searched for the start of a function."), _("\ 1671Show the distance searched for the start of a function."), _("\ 1672If you are debugging a stripped executable, GDB needs to search through the\n\ 1673program for the start of a function. This command sets the distance of the\n\ 1674search. The only need to set it is when debugging a stripped executable."), 1675 reinit_frame_cache_sfunc, 1676 NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */ 1677 &setlist, &showlist); 1678} 1679