1# sh testcase for fdiv
2# mach: sh
3# as(sh):	-defsym sim_cpu=0
4
5	.include "testutils.inc"
6
7	start
8fdiv_single:
9	# Single test
10	set_grs_a5a5
11	set_fprs_a5a5
12	single_prec
13	# 1.0 / 0.0 should be INF
14	# (and not crash the sim).
15	fldi0	fr0
16	fldi1	fr1
17	fdiv	fr0, fr1
18	assert_fpreg_x	0x7f800000, fr1
19
20	# 0.0 / 1.0 == 0.0.
21	fldi0	fr0
22	fldi1	fr1
23	fdiv	fr1, fr0
24	assert_fpreg_x	0, fr0
25
26	# 2.0 / 1.0 == 2.0.
27	fldi1	fr1
28	fldi1	fr2
29	fadd	fr2, fr2
30	fdiv	fr1, fr2
31	assert_fpreg_i	2, fr2
32
33	# (1.0 / 2.0) + (1.0 / 2.0) == 1.0.
34	fldi1	fr1
35	fldi1	fr2
36	fadd	fr2, fr2
37	fdiv	fr2, fr1
38	# fr1 should contain 0.5.
39	fadd	fr1, fr1
40	assert_fpreg_i	1, fr1
41	test_grs_a5a5
42	assert_fpreg_i	2, fr2
43	test_fpr_a5a5	fr3
44	test_fpr_a5a5	fr4
45	test_fpr_a5a5	fr5
46	test_fpr_a5a5	fr6
47	test_fpr_a5a5	fr7
48	test_fpr_a5a5	fr8
49	test_fpr_a5a5	fr9
50	test_fpr_a5a5	fr10
51	test_fpr_a5a5	fr11
52	test_fpr_a5a5	fr12
53	test_fpr_a5a5	fr13
54	test_fpr_a5a5	fr14
55	test_fpr_a5a5	fr15
56
57fdiv_double:
58	# Double test
59	set_grs_a5a5
60	set_fprs_a5a5
61	# (1.0 / 2.0) + (1.0 / 2.0) == 1.0.
62	fldi1	fr1
63	fldi1	fr2
64	# This add must be in single precision.  The rest must be in double.
65	fadd	fr2, fr2
66	double_prec
67	_s2d	fr1, dr0
68	_s2d	fr2, dr2
69	fdiv	dr2, dr0
70	# dr0 should contain 0.5.
71	# double it, expect 1.0.
72	fadd	dr0, dr0
73	assert_dpreg_i	1, dr0
74	assert_dpreg_i	2, dr2
75	test_grs_a5a5
76	test_fpr_a5a5	fr4
77	test_fpr_a5a5	fr5
78	test_fpr_a5a5	fr6
79	test_fpr_a5a5	fr7
80	test_fpr_a5a5	fr8
81	test_fpr_a5a5	fr9
82	test_fpr_a5a5	fr10
83	test_fpr_a5a5	fr11
84	test_fpr_a5a5	fr12
85	test_fpr_a5a5	fr13
86	test_fpr_a5a5	fr14
87	test_fpr_a5a5	fr15
88
89	pass
90	exit 0
91
92