1/* SH64 target configuration file.  -*- C -*- */
2
3/* Define this if the simulator can vary the size of memory.
4   See the xxx simulator for an example.
5   This enables the `-m size' option.
6   The memory size is stored in STATE_MEM_SIZE.  */
7/* Not used for SH64 since we use the memory module. TODO -- check this  */
8/* #define SIM_HAVE_MEM_SIZE */
9
10/* See sim-hload.c.  We properly handle LMA. -- TODO: check this */
11#define SIM_HANDLES_LMA 1
12
13/* For MSPR support.  FIXME: revisit.  */
14#define WITH_DEVICES 0
15
16/* FIXME: Revisit.  */
17#ifdef HAVE_DV_SOCKSER
18MODULE_INSTALL_FN dv_sockser_install;
19#define MODULE_LIST dv_sockser_install,
20#endif
21
22#if 0
23/* Enable watchpoints.  */
24#define WITH_WATCHPOINTS 1
25#endif
26
27/* ??? Temporary hack until model support unified.  */
28#define SIM_HAVE_MODEL
29
30/* Define this to enable the intrinsic breakpoint mechanism. */
31/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially
32   duplicates ifdef SIM_BREAKPOINT (right?) */
33#if 1
34#define SIM_HAVE_BREAKPOINTS
35#define SIM_BREAKPOINT { 0, 0, 0, 0xD }
36#define SIM_BREAKPOINT_SIZE 4
37#endif
38
39/* This is a global setting.  Different cpu families can't mix-n-match -scache
40   and -pbb.  However some cpu families may use -simple while others use
41   one of -scache/-pbb. ???? */
42#define WITH_SCACHE_PBB 1
43
44/* Define this if the target cpu is bi-endian and the simulator supports it.  */
45#define SIM_HAVE_BIENDIAN
46