1/* Simulator instruction semantics for sh64. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996-2005 Free Software Foundation, Inc. 6 7This file is part of the GNU simulators. 8 9This program is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 3 of the License, or 12(at your option) any later version. 13 14This program is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with this program. If not, see <http://www.gnu.org/licenses/>. 21 22*/ 23 24#ifdef DEFINE_LABELS 25 26 /* The labels have the case they have because the enum of insn types 27 is all uppercase and in the non-stdc case the insn symbol is built 28 into the enum name. */ 29 30 static struct { 31 int index; 32 void *label; 33 } labels[] = { 34 { SH64_COMPACT_INSN_X_INVALID, && case_sem_INSN_X_INVALID }, 35 { SH64_COMPACT_INSN_X_AFTER, && case_sem_INSN_X_AFTER }, 36 { SH64_COMPACT_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE }, 37 { SH64_COMPACT_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN }, 38 { SH64_COMPACT_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN }, 39 { SH64_COMPACT_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN }, 40 { SH64_COMPACT_INSN_ADD_COMPACT, && case_sem_INSN_ADD_COMPACT }, 41 { SH64_COMPACT_INSN_ADDI_COMPACT, && case_sem_INSN_ADDI_COMPACT }, 42 { SH64_COMPACT_INSN_ADDC_COMPACT, && case_sem_INSN_ADDC_COMPACT }, 43 { SH64_COMPACT_INSN_ADDV_COMPACT, && case_sem_INSN_ADDV_COMPACT }, 44 { SH64_COMPACT_INSN_AND_COMPACT, && case_sem_INSN_AND_COMPACT }, 45 { SH64_COMPACT_INSN_ANDI_COMPACT, && case_sem_INSN_ANDI_COMPACT }, 46 { SH64_COMPACT_INSN_ANDB_COMPACT, && case_sem_INSN_ANDB_COMPACT }, 47 { SH64_COMPACT_INSN_BF_COMPACT, && case_sem_INSN_BF_COMPACT }, 48 { SH64_COMPACT_INSN_BFS_COMPACT, && case_sem_INSN_BFS_COMPACT }, 49 { SH64_COMPACT_INSN_BRA_COMPACT, && case_sem_INSN_BRA_COMPACT }, 50 { SH64_COMPACT_INSN_BRAF_COMPACT, && case_sem_INSN_BRAF_COMPACT }, 51 { SH64_COMPACT_INSN_BRK_COMPACT, && case_sem_INSN_BRK_COMPACT }, 52 { SH64_COMPACT_INSN_BSR_COMPACT, && case_sem_INSN_BSR_COMPACT }, 53 { SH64_COMPACT_INSN_BSRF_COMPACT, && case_sem_INSN_BSRF_COMPACT }, 54 { SH64_COMPACT_INSN_BT_COMPACT, && case_sem_INSN_BT_COMPACT }, 55 { SH64_COMPACT_INSN_BTS_COMPACT, && case_sem_INSN_BTS_COMPACT }, 56 { SH64_COMPACT_INSN_CLRMAC_COMPACT, && case_sem_INSN_CLRMAC_COMPACT }, 57 { SH64_COMPACT_INSN_CLRS_COMPACT, && case_sem_INSN_CLRS_COMPACT }, 58 { SH64_COMPACT_INSN_CLRT_COMPACT, && case_sem_INSN_CLRT_COMPACT }, 59 { SH64_COMPACT_INSN_CMPEQ_COMPACT, && case_sem_INSN_CMPEQ_COMPACT }, 60 { SH64_COMPACT_INSN_CMPEQI_COMPACT, && case_sem_INSN_CMPEQI_COMPACT }, 61 { SH64_COMPACT_INSN_CMPGE_COMPACT, && case_sem_INSN_CMPGE_COMPACT }, 62 { SH64_COMPACT_INSN_CMPGT_COMPACT, && case_sem_INSN_CMPGT_COMPACT }, 63 { SH64_COMPACT_INSN_CMPHI_COMPACT, && case_sem_INSN_CMPHI_COMPACT }, 64 { SH64_COMPACT_INSN_CMPHS_COMPACT, && case_sem_INSN_CMPHS_COMPACT }, 65 { SH64_COMPACT_INSN_CMPPL_COMPACT, && case_sem_INSN_CMPPL_COMPACT }, 66 { SH64_COMPACT_INSN_CMPPZ_COMPACT, && case_sem_INSN_CMPPZ_COMPACT }, 67 { SH64_COMPACT_INSN_CMPSTR_COMPACT, && case_sem_INSN_CMPSTR_COMPACT }, 68 { SH64_COMPACT_INSN_DIV0S_COMPACT, && case_sem_INSN_DIV0S_COMPACT }, 69 { SH64_COMPACT_INSN_DIV0U_COMPACT, && case_sem_INSN_DIV0U_COMPACT }, 70 { SH64_COMPACT_INSN_DIV1_COMPACT, && case_sem_INSN_DIV1_COMPACT }, 71 { SH64_COMPACT_INSN_DIVU_COMPACT, && case_sem_INSN_DIVU_COMPACT }, 72 { SH64_COMPACT_INSN_MULR_COMPACT, && case_sem_INSN_MULR_COMPACT }, 73 { SH64_COMPACT_INSN_DMULSL_COMPACT, && case_sem_INSN_DMULSL_COMPACT }, 74 { SH64_COMPACT_INSN_DMULUL_COMPACT, && case_sem_INSN_DMULUL_COMPACT }, 75 { SH64_COMPACT_INSN_DT_COMPACT, && case_sem_INSN_DT_COMPACT }, 76 { SH64_COMPACT_INSN_EXTSB_COMPACT, && case_sem_INSN_EXTSB_COMPACT }, 77 { SH64_COMPACT_INSN_EXTSW_COMPACT, && case_sem_INSN_EXTSW_COMPACT }, 78 { SH64_COMPACT_INSN_EXTUB_COMPACT, && case_sem_INSN_EXTUB_COMPACT }, 79 { SH64_COMPACT_INSN_EXTUW_COMPACT, && case_sem_INSN_EXTUW_COMPACT }, 80 { SH64_COMPACT_INSN_FABS_COMPACT, && case_sem_INSN_FABS_COMPACT }, 81 { SH64_COMPACT_INSN_FADD_COMPACT, && case_sem_INSN_FADD_COMPACT }, 82 { SH64_COMPACT_INSN_FCMPEQ_COMPACT, && case_sem_INSN_FCMPEQ_COMPACT }, 83 { SH64_COMPACT_INSN_FCMPGT_COMPACT, && case_sem_INSN_FCMPGT_COMPACT }, 84 { SH64_COMPACT_INSN_FCNVDS_COMPACT, && case_sem_INSN_FCNVDS_COMPACT }, 85 { SH64_COMPACT_INSN_FCNVSD_COMPACT, && case_sem_INSN_FCNVSD_COMPACT }, 86 { SH64_COMPACT_INSN_FDIV_COMPACT, && case_sem_INSN_FDIV_COMPACT }, 87 { SH64_COMPACT_INSN_FIPR_COMPACT, && case_sem_INSN_FIPR_COMPACT }, 88 { SH64_COMPACT_INSN_FLDS_COMPACT, && case_sem_INSN_FLDS_COMPACT }, 89 { SH64_COMPACT_INSN_FLDI0_COMPACT, && case_sem_INSN_FLDI0_COMPACT }, 90 { SH64_COMPACT_INSN_FLDI1_COMPACT, && case_sem_INSN_FLDI1_COMPACT }, 91 { SH64_COMPACT_INSN_FLOAT_COMPACT, && case_sem_INSN_FLOAT_COMPACT }, 92 { SH64_COMPACT_INSN_FMAC_COMPACT, && case_sem_INSN_FMAC_COMPACT }, 93 { SH64_COMPACT_INSN_FMOV1_COMPACT, && case_sem_INSN_FMOV1_COMPACT }, 94 { SH64_COMPACT_INSN_FMOV2_COMPACT, && case_sem_INSN_FMOV2_COMPACT }, 95 { SH64_COMPACT_INSN_FMOV3_COMPACT, && case_sem_INSN_FMOV3_COMPACT }, 96 { SH64_COMPACT_INSN_FMOV4_COMPACT, && case_sem_INSN_FMOV4_COMPACT }, 97 { SH64_COMPACT_INSN_FMOV5_COMPACT, && case_sem_INSN_FMOV5_COMPACT }, 98 { SH64_COMPACT_INSN_FMOV6_COMPACT, && case_sem_INSN_FMOV6_COMPACT }, 99 { SH64_COMPACT_INSN_FMOV7_COMPACT, && case_sem_INSN_FMOV7_COMPACT }, 100 { SH64_COMPACT_INSN_FMOV8_COMPACT, && case_sem_INSN_FMOV8_COMPACT }, 101 { SH64_COMPACT_INSN_FMOV9_COMPACT, && case_sem_INSN_FMOV9_COMPACT }, 102 { SH64_COMPACT_INSN_FMUL_COMPACT, && case_sem_INSN_FMUL_COMPACT }, 103 { SH64_COMPACT_INSN_FNEG_COMPACT, && case_sem_INSN_FNEG_COMPACT }, 104 { SH64_COMPACT_INSN_FRCHG_COMPACT, && case_sem_INSN_FRCHG_COMPACT }, 105 { SH64_COMPACT_INSN_FSCHG_COMPACT, && case_sem_INSN_FSCHG_COMPACT }, 106 { SH64_COMPACT_INSN_FSQRT_COMPACT, && case_sem_INSN_FSQRT_COMPACT }, 107 { SH64_COMPACT_INSN_FSTS_COMPACT, && case_sem_INSN_FSTS_COMPACT }, 108 { SH64_COMPACT_INSN_FSUB_COMPACT, && case_sem_INSN_FSUB_COMPACT }, 109 { SH64_COMPACT_INSN_FTRC_COMPACT, && case_sem_INSN_FTRC_COMPACT }, 110 { SH64_COMPACT_INSN_FTRV_COMPACT, && case_sem_INSN_FTRV_COMPACT }, 111 { SH64_COMPACT_INSN_JMP_COMPACT, && case_sem_INSN_JMP_COMPACT }, 112 { SH64_COMPACT_INSN_JSR_COMPACT, && case_sem_INSN_JSR_COMPACT }, 113 { SH64_COMPACT_INSN_LDC_GBR_COMPACT, && case_sem_INSN_LDC_GBR_COMPACT }, 114 { SH64_COMPACT_INSN_LDC_VBR_COMPACT, && case_sem_INSN_LDC_VBR_COMPACT }, 115 { SH64_COMPACT_INSN_LDC_SR_COMPACT, && case_sem_INSN_LDC_SR_COMPACT }, 116 { SH64_COMPACT_INSN_LDCL_GBR_COMPACT, && case_sem_INSN_LDCL_GBR_COMPACT }, 117 { SH64_COMPACT_INSN_LDCL_VBR_COMPACT, && case_sem_INSN_LDCL_VBR_COMPACT }, 118 { SH64_COMPACT_INSN_LDS_FPSCR_COMPACT, && case_sem_INSN_LDS_FPSCR_COMPACT }, 119 { SH64_COMPACT_INSN_LDSL_FPSCR_COMPACT, && case_sem_INSN_LDSL_FPSCR_COMPACT }, 120 { SH64_COMPACT_INSN_LDS_FPUL_COMPACT, && case_sem_INSN_LDS_FPUL_COMPACT }, 121 { SH64_COMPACT_INSN_LDSL_FPUL_COMPACT, && case_sem_INSN_LDSL_FPUL_COMPACT }, 122 { SH64_COMPACT_INSN_LDS_MACH_COMPACT, && case_sem_INSN_LDS_MACH_COMPACT }, 123 { SH64_COMPACT_INSN_LDSL_MACH_COMPACT, && case_sem_INSN_LDSL_MACH_COMPACT }, 124 { SH64_COMPACT_INSN_LDS_MACL_COMPACT, && case_sem_INSN_LDS_MACL_COMPACT }, 125 { SH64_COMPACT_INSN_LDSL_MACL_COMPACT, && case_sem_INSN_LDSL_MACL_COMPACT }, 126 { SH64_COMPACT_INSN_LDS_PR_COMPACT, && case_sem_INSN_LDS_PR_COMPACT }, 127 { SH64_COMPACT_INSN_LDSL_PR_COMPACT, && case_sem_INSN_LDSL_PR_COMPACT }, 128 { SH64_COMPACT_INSN_MACL_COMPACT, && case_sem_INSN_MACL_COMPACT }, 129 { SH64_COMPACT_INSN_MACW_COMPACT, && case_sem_INSN_MACW_COMPACT }, 130 { SH64_COMPACT_INSN_MOV_COMPACT, && case_sem_INSN_MOV_COMPACT }, 131 { SH64_COMPACT_INSN_MOVI_COMPACT, && case_sem_INSN_MOVI_COMPACT }, 132 { SH64_COMPACT_INSN_MOVI20_COMPACT, && case_sem_INSN_MOVI20_COMPACT }, 133 { SH64_COMPACT_INSN_MOVB1_COMPACT, && case_sem_INSN_MOVB1_COMPACT }, 134 { SH64_COMPACT_INSN_MOVB2_COMPACT, && case_sem_INSN_MOVB2_COMPACT }, 135 { SH64_COMPACT_INSN_MOVB3_COMPACT, && case_sem_INSN_MOVB3_COMPACT }, 136 { SH64_COMPACT_INSN_MOVB4_COMPACT, && case_sem_INSN_MOVB4_COMPACT }, 137 { SH64_COMPACT_INSN_MOVB5_COMPACT, && case_sem_INSN_MOVB5_COMPACT }, 138 { SH64_COMPACT_INSN_MOVB6_COMPACT, && case_sem_INSN_MOVB6_COMPACT }, 139 { SH64_COMPACT_INSN_MOVB7_COMPACT, && case_sem_INSN_MOVB7_COMPACT }, 140 { SH64_COMPACT_INSN_MOVB8_COMPACT, && case_sem_INSN_MOVB8_COMPACT }, 141 { SH64_COMPACT_INSN_MOVB9_COMPACT, && case_sem_INSN_MOVB9_COMPACT }, 142 { SH64_COMPACT_INSN_MOVB10_COMPACT, && case_sem_INSN_MOVB10_COMPACT }, 143 { SH64_COMPACT_INSN_MOVL1_COMPACT, && case_sem_INSN_MOVL1_COMPACT }, 144 { SH64_COMPACT_INSN_MOVL2_COMPACT, && case_sem_INSN_MOVL2_COMPACT }, 145 { SH64_COMPACT_INSN_MOVL3_COMPACT, && case_sem_INSN_MOVL3_COMPACT }, 146 { SH64_COMPACT_INSN_MOVL4_COMPACT, && case_sem_INSN_MOVL4_COMPACT }, 147 { SH64_COMPACT_INSN_MOVL5_COMPACT, && case_sem_INSN_MOVL5_COMPACT }, 148 { SH64_COMPACT_INSN_MOVL6_COMPACT, && case_sem_INSN_MOVL6_COMPACT }, 149 { SH64_COMPACT_INSN_MOVL7_COMPACT, && case_sem_INSN_MOVL7_COMPACT }, 150 { SH64_COMPACT_INSN_MOVL8_COMPACT, && case_sem_INSN_MOVL8_COMPACT }, 151 { SH64_COMPACT_INSN_MOVL9_COMPACT, && case_sem_INSN_MOVL9_COMPACT }, 152 { SH64_COMPACT_INSN_MOVL10_COMPACT, && case_sem_INSN_MOVL10_COMPACT }, 153 { SH64_COMPACT_INSN_MOVL11_COMPACT, && case_sem_INSN_MOVL11_COMPACT }, 154 { SH64_COMPACT_INSN_MOVL12_COMPACT, && case_sem_INSN_MOVL12_COMPACT }, 155 { SH64_COMPACT_INSN_MOVL13_COMPACT, && case_sem_INSN_MOVL13_COMPACT }, 156 { SH64_COMPACT_INSN_MOVW1_COMPACT, && case_sem_INSN_MOVW1_COMPACT }, 157 { SH64_COMPACT_INSN_MOVW2_COMPACT, && case_sem_INSN_MOVW2_COMPACT }, 158 { SH64_COMPACT_INSN_MOVW3_COMPACT, && case_sem_INSN_MOVW3_COMPACT }, 159 { SH64_COMPACT_INSN_MOVW4_COMPACT, && case_sem_INSN_MOVW4_COMPACT }, 160 { SH64_COMPACT_INSN_MOVW5_COMPACT, && case_sem_INSN_MOVW5_COMPACT }, 161 { SH64_COMPACT_INSN_MOVW6_COMPACT, && case_sem_INSN_MOVW6_COMPACT }, 162 { SH64_COMPACT_INSN_MOVW7_COMPACT, && case_sem_INSN_MOVW7_COMPACT }, 163 { SH64_COMPACT_INSN_MOVW8_COMPACT, && case_sem_INSN_MOVW8_COMPACT }, 164 { SH64_COMPACT_INSN_MOVW9_COMPACT, && case_sem_INSN_MOVW9_COMPACT }, 165 { SH64_COMPACT_INSN_MOVW10_COMPACT, && case_sem_INSN_MOVW10_COMPACT }, 166 { SH64_COMPACT_INSN_MOVW11_COMPACT, && case_sem_INSN_MOVW11_COMPACT }, 167 { SH64_COMPACT_INSN_MOVA_COMPACT, && case_sem_INSN_MOVA_COMPACT }, 168 { SH64_COMPACT_INSN_MOVCAL_COMPACT, && case_sem_INSN_MOVCAL_COMPACT }, 169 { SH64_COMPACT_INSN_MOVCOL_COMPACT, && case_sem_INSN_MOVCOL_COMPACT }, 170 { SH64_COMPACT_INSN_MOVT_COMPACT, && case_sem_INSN_MOVT_COMPACT }, 171 { SH64_COMPACT_INSN_MOVUAL_COMPACT, && case_sem_INSN_MOVUAL_COMPACT }, 172 { SH64_COMPACT_INSN_MOVUAL2_COMPACT, && case_sem_INSN_MOVUAL2_COMPACT }, 173 { SH64_COMPACT_INSN_MULL_COMPACT, && case_sem_INSN_MULL_COMPACT }, 174 { SH64_COMPACT_INSN_MULSW_COMPACT, && case_sem_INSN_MULSW_COMPACT }, 175 { SH64_COMPACT_INSN_MULUW_COMPACT, && case_sem_INSN_MULUW_COMPACT }, 176 { SH64_COMPACT_INSN_NEG_COMPACT, && case_sem_INSN_NEG_COMPACT }, 177 { SH64_COMPACT_INSN_NEGC_COMPACT, && case_sem_INSN_NEGC_COMPACT }, 178 { SH64_COMPACT_INSN_NOP_COMPACT, && case_sem_INSN_NOP_COMPACT }, 179 { SH64_COMPACT_INSN_NOT_COMPACT, && case_sem_INSN_NOT_COMPACT }, 180 { SH64_COMPACT_INSN_OCBI_COMPACT, && case_sem_INSN_OCBI_COMPACT }, 181 { SH64_COMPACT_INSN_OCBP_COMPACT, && case_sem_INSN_OCBP_COMPACT }, 182 { SH64_COMPACT_INSN_OCBWB_COMPACT, && case_sem_INSN_OCBWB_COMPACT }, 183 { SH64_COMPACT_INSN_OR_COMPACT, && case_sem_INSN_OR_COMPACT }, 184 { SH64_COMPACT_INSN_ORI_COMPACT, && case_sem_INSN_ORI_COMPACT }, 185 { SH64_COMPACT_INSN_ORB_COMPACT, && case_sem_INSN_ORB_COMPACT }, 186 { SH64_COMPACT_INSN_PREF_COMPACT, && case_sem_INSN_PREF_COMPACT }, 187 { SH64_COMPACT_INSN_ROTCL_COMPACT, && case_sem_INSN_ROTCL_COMPACT }, 188 { SH64_COMPACT_INSN_ROTCR_COMPACT, && case_sem_INSN_ROTCR_COMPACT }, 189 { SH64_COMPACT_INSN_ROTL_COMPACT, && case_sem_INSN_ROTL_COMPACT }, 190 { SH64_COMPACT_INSN_ROTR_COMPACT, && case_sem_INSN_ROTR_COMPACT }, 191 { SH64_COMPACT_INSN_RTS_COMPACT, && case_sem_INSN_RTS_COMPACT }, 192 { SH64_COMPACT_INSN_SETS_COMPACT, && case_sem_INSN_SETS_COMPACT }, 193 { SH64_COMPACT_INSN_SETT_COMPACT, && case_sem_INSN_SETT_COMPACT }, 194 { SH64_COMPACT_INSN_SHAD_COMPACT, && case_sem_INSN_SHAD_COMPACT }, 195 { SH64_COMPACT_INSN_SHAL_COMPACT, && case_sem_INSN_SHAL_COMPACT }, 196 { SH64_COMPACT_INSN_SHAR_COMPACT, && case_sem_INSN_SHAR_COMPACT }, 197 { SH64_COMPACT_INSN_SHLD_COMPACT, && case_sem_INSN_SHLD_COMPACT }, 198 { SH64_COMPACT_INSN_SHLL_COMPACT, && case_sem_INSN_SHLL_COMPACT }, 199 { SH64_COMPACT_INSN_SHLL2_COMPACT, && case_sem_INSN_SHLL2_COMPACT }, 200 { SH64_COMPACT_INSN_SHLL8_COMPACT, && case_sem_INSN_SHLL8_COMPACT }, 201 { SH64_COMPACT_INSN_SHLL16_COMPACT, && case_sem_INSN_SHLL16_COMPACT }, 202 { SH64_COMPACT_INSN_SHLR_COMPACT, && case_sem_INSN_SHLR_COMPACT }, 203 { SH64_COMPACT_INSN_SHLR2_COMPACT, && case_sem_INSN_SHLR2_COMPACT }, 204 { SH64_COMPACT_INSN_SHLR8_COMPACT, && case_sem_INSN_SHLR8_COMPACT }, 205 { SH64_COMPACT_INSN_SHLR16_COMPACT, && case_sem_INSN_SHLR16_COMPACT }, 206 { SH64_COMPACT_INSN_STC_GBR_COMPACT, && case_sem_INSN_STC_GBR_COMPACT }, 207 { SH64_COMPACT_INSN_STC_VBR_COMPACT, && case_sem_INSN_STC_VBR_COMPACT }, 208 { SH64_COMPACT_INSN_STCL_GBR_COMPACT, && case_sem_INSN_STCL_GBR_COMPACT }, 209 { SH64_COMPACT_INSN_STCL_VBR_COMPACT, && case_sem_INSN_STCL_VBR_COMPACT }, 210 { SH64_COMPACT_INSN_STS_FPSCR_COMPACT, && case_sem_INSN_STS_FPSCR_COMPACT }, 211 { SH64_COMPACT_INSN_STSL_FPSCR_COMPACT, && case_sem_INSN_STSL_FPSCR_COMPACT }, 212 { SH64_COMPACT_INSN_STS_FPUL_COMPACT, && case_sem_INSN_STS_FPUL_COMPACT }, 213 { SH64_COMPACT_INSN_STSL_FPUL_COMPACT, && case_sem_INSN_STSL_FPUL_COMPACT }, 214 { SH64_COMPACT_INSN_STS_MACH_COMPACT, && case_sem_INSN_STS_MACH_COMPACT }, 215 { SH64_COMPACT_INSN_STSL_MACH_COMPACT, && case_sem_INSN_STSL_MACH_COMPACT }, 216 { SH64_COMPACT_INSN_STS_MACL_COMPACT, && case_sem_INSN_STS_MACL_COMPACT }, 217 { SH64_COMPACT_INSN_STSL_MACL_COMPACT, && case_sem_INSN_STSL_MACL_COMPACT }, 218 { SH64_COMPACT_INSN_STS_PR_COMPACT, && case_sem_INSN_STS_PR_COMPACT }, 219 { SH64_COMPACT_INSN_STSL_PR_COMPACT, && case_sem_INSN_STSL_PR_COMPACT }, 220 { SH64_COMPACT_INSN_SUB_COMPACT, && case_sem_INSN_SUB_COMPACT }, 221 { SH64_COMPACT_INSN_SUBC_COMPACT, && case_sem_INSN_SUBC_COMPACT }, 222 { SH64_COMPACT_INSN_SUBV_COMPACT, && case_sem_INSN_SUBV_COMPACT }, 223 { SH64_COMPACT_INSN_SWAPB_COMPACT, && case_sem_INSN_SWAPB_COMPACT }, 224 { SH64_COMPACT_INSN_SWAPW_COMPACT, && case_sem_INSN_SWAPW_COMPACT }, 225 { SH64_COMPACT_INSN_TASB_COMPACT, && case_sem_INSN_TASB_COMPACT }, 226 { SH64_COMPACT_INSN_TRAPA_COMPACT, && case_sem_INSN_TRAPA_COMPACT }, 227 { SH64_COMPACT_INSN_TST_COMPACT, && case_sem_INSN_TST_COMPACT }, 228 { SH64_COMPACT_INSN_TSTI_COMPACT, && case_sem_INSN_TSTI_COMPACT }, 229 { SH64_COMPACT_INSN_TSTB_COMPACT, && case_sem_INSN_TSTB_COMPACT }, 230 { SH64_COMPACT_INSN_XOR_COMPACT, && case_sem_INSN_XOR_COMPACT }, 231 { SH64_COMPACT_INSN_XORI_COMPACT, && case_sem_INSN_XORI_COMPACT }, 232 { SH64_COMPACT_INSN_XORB_COMPACT, && case_sem_INSN_XORB_COMPACT }, 233 { SH64_COMPACT_INSN_XTRCT_COMPACT, && case_sem_INSN_XTRCT_COMPACT }, 234 { 0, 0 } 235 }; 236 int i; 237 238 for (i = 0; labels[i].label != 0; ++i) 239 { 240#if FAST_P 241 CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label; 242#else 243 CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label; 244#endif 245 } 246 247#undef DEFINE_LABELS 248#endif /* DEFINE_LABELS */ 249 250#ifdef DEFINE_SWITCH 251 252/* If hyper-fast [well not unnecessarily slow] execution is selected, turn 253 off frills like tracing and profiling. */ 254/* FIXME: A better way would be to have TRACE_RESULT check for something 255 that can cause it to be optimized out. Another way would be to emit 256 special handlers into the instruction "stream". */ 257 258#if FAST_P 259#undef TRACE_RESULT 260#define TRACE_RESULT(cpu, abuf, name, type, val) 261#endif 262 263#undef GET_ATTR 264#if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE) 265#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr) 266#else 267#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr) 268#endif 269 270{ 271 272#if WITH_SCACHE_PBB 273 274/* Branch to next handler without going around main loop. */ 275#define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case 276SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case) 277 278#else /* ! WITH_SCACHE_PBB */ 279 280#define NEXT(vpc) BREAK (sem) 281#ifdef __GNUC__ 282#if FAST_P 283 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab) 284#else 285 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab) 286#endif 287#else 288 SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num) 289#endif 290 291#endif /* ! WITH_SCACHE_PBB */ 292 293 { 294 295 CASE (sem, INSN_X_INVALID) : /* --invalid-- */ 296{ 297 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 298 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 299#define FLD(f) abuf->fields.fmt_empty.f 300 int UNUSED written = 0; 301 IADDR UNUSED pc = abuf->addr; 302 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 303 304 { 305 /* Update the recorded pc in the cpu state struct. 306 Only necessary for WITH_SCACHE case, but to avoid the 307 conditional compilation .... */ 308 SET_H_PC (pc); 309 /* Virtual insns have zero size. Overwrite vpc with address of next insn 310 using the default-insn-bitsize spec. When executing insns in parallel 311 we may want to queue the fault and continue execution. */ 312 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 313 vpc = sim_engine_invalid_insn (current_cpu, pc, vpc); 314 } 315 316#undef FLD 317} 318 NEXT (vpc); 319 320 CASE (sem, INSN_X_AFTER) : /* --after-- */ 321{ 322 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 323 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 324#define FLD(f) abuf->fields.fmt_empty.f 325 int UNUSED written = 0; 326 IADDR UNUSED pc = abuf->addr; 327 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 328 329 { 330#if WITH_SCACHE_PBB_SH64_COMPACT 331 sh64_compact_pbb_after (current_cpu, sem_arg); 332#endif 333 } 334 335#undef FLD 336} 337 NEXT (vpc); 338 339 CASE (sem, INSN_X_BEFORE) : /* --before-- */ 340{ 341 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 342 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 343#define FLD(f) abuf->fields.fmt_empty.f 344 int UNUSED written = 0; 345 IADDR UNUSED pc = abuf->addr; 346 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 347 348 { 349#if WITH_SCACHE_PBB_SH64_COMPACT 350 sh64_compact_pbb_before (current_cpu, sem_arg); 351#endif 352 } 353 354#undef FLD 355} 356 NEXT (vpc); 357 358 CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */ 359{ 360 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 361 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 362#define FLD(f) abuf->fields.fmt_empty.f 363 int UNUSED written = 0; 364 IADDR UNUSED pc = abuf->addr; 365 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 366 367 { 368#if WITH_SCACHE_PBB_SH64_COMPACT 369#ifdef DEFINE_SWITCH 370 vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, 371 pbb_br_type, pbb_br_npc); 372 BREAK (sem); 373#else 374 /* FIXME: Allow provision of explicit ifmt spec in insn spec. */ 375 vpc = sh64_compact_pbb_cti_chain (current_cpu, sem_arg, 376 CPU_PBB_BR_TYPE (current_cpu), 377 CPU_PBB_BR_NPC (current_cpu)); 378#endif 379#endif 380 } 381 382#undef FLD 383} 384 NEXT (vpc); 385 386 CASE (sem, INSN_X_CHAIN) : /* --chain-- */ 387{ 388 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 389 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 390#define FLD(f) abuf->fields.fmt_empty.f 391 int UNUSED written = 0; 392 IADDR UNUSED pc = abuf->addr; 393 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 394 395 { 396#if WITH_SCACHE_PBB_SH64_COMPACT 397 vpc = sh64_compact_pbb_chain (current_cpu, sem_arg); 398#ifdef DEFINE_SWITCH 399 BREAK (sem); 400#endif 401#endif 402 } 403 404#undef FLD 405} 406 NEXT (vpc); 407 408 CASE (sem, INSN_X_BEGIN) : /* --begin-- */ 409{ 410 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 411 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 412#define FLD(f) abuf->fields.fmt_empty.f 413 int UNUSED written = 0; 414 IADDR UNUSED pc = abuf->addr; 415 vpc = SEM_NEXT_VPC (sem_arg, pc, 0); 416 417 { 418#if WITH_SCACHE_PBB_SH64_COMPACT 419#if defined DEFINE_SWITCH || defined FAST_P 420 /* In the switch case FAST_P is a constant, allowing several optimizations 421 in any called inline functions. */ 422 vpc = sh64_compact_pbb_begin (current_cpu, FAST_P); 423#else 424#if 0 /* cgen engine can't handle dynamic fast/full switching yet. */ 425 vpc = sh64_compact_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu))); 426#else 427 vpc = sh64_compact_pbb_begin (current_cpu, 0); 428#endif 429#endif 430#endif 431 } 432 433#undef FLD 434} 435 NEXT (vpc); 436 437 CASE (sem, INSN_ADD_COMPACT) : /* add $rm, $rn */ 438{ 439 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 440 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 441#define FLD(f) abuf->fields.sfmt_movl12_compact.f 442 int UNUSED written = 0; 443 IADDR UNUSED pc = abuf->addr; 444 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 445 446 { 447 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 448 SET_H_GRC (FLD (f_rn), opval); 449 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 450 } 451 452#undef FLD 453} 454 NEXT (vpc); 455 456 CASE (sem, INSN_ADDI_COMPACT) : /* add #$imm8, $rn */ 457{ 458 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 459 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 460#define FLD(f) abuf->fields.sfmt_addi_compact.f 461 int UNUSED written = 0; 462 IADDR UNUSED pc = abuf->addr; 463 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 464 465 { 466 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), EXTQISI (ANDQI (FLD (f_imm8), 255))); 467 SET_H_GRC (FLD (f_rn), opval); 468 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 469 } 470 471#undef FLD 472} 473 NEXT (vpc); 474 475 CASE (sem, INSN_ADDC_COMPACT) : /* addc $rm, $rn */ 476{ 477 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 478 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 479#define FLD(f) abuf->fields.sfmt_movl12_compact.f 480 int UNUSED written = 0; 481 IADDR UNUSED pc = abuf->addr; 482 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 483 484{ 485 BI tmp_flag; 486 tmp_flag = ADDCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); 487 { 488 SI opval = ADDCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); 489 SET_H_GRC (FLD (f_rn), opval); 490 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 491 } 492 { 493 BI opval = tmp_flag; 494 SET_H_TBIT (opval); 495 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 496 } 497} 498 499#undef FLD 500} 501 NEXT (vpc); 502 503 CASE (sem, INSN_ADDV_COMPACT) : /* addv $rm, $rn */ 504{ 505 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 506 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 507#define FLD(f) abuf->fields.sfmt_movl12_compact.f 508 int UNUSED written = 0; 509 IADDR UNUSED pc = abuf->addr; 510 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 511 512{ 513 BI tmp_t; 514 tmp_t = ADDOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); 515 { 516 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 517 SET_H_GRC (FLD (f_rn), opval); 518 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 519 } 520 { 521 BI opval = tmp_t; 522 SET_H_TBIT (opval); 523 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 524 } 525} 526 527#undef FLD 528} 529 NEXT (vpc); 530 531 CASE (sem, INSN_AND_COMPACT) : /* and $rm64, $rn64 */ 532{ 533 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 534 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 535#define FLD(f) abuf->fields.sfmt_movl12_compact.f 536 int UNUSED written = 0; 537 IADDR UNUSED pc = abuf->addr; 538 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 539 540 { 541 DI opval = ANDDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); 542 SET_H_GR (FLD (f_rn), opval); 543 TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); 544 } 545 546#undef FLD 547} 548 NEXT (vpc); 549 550 CASE (sem, INSN_ANDI_COMPACT) : /* and #$uimm8, r0 */ 551{ 552 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 553 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 554#define FLD(f) abuf->fields.sfmt_addi_compact.f 555 int UNUSED written = 0; 556 IADDR UNUSED pc = abuf->addr; 557 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 558 559 { 560 SI opval = ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); 561 SET_H_GRC (((UINT) 0), opval); 562 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 563 } 564 565#undef FLD 566} 567 NEXT (vpc); 568 569 CASE (sem, INSN_ANDB_COMPACT) : /* and.b #$imm8, @(r0, gbr) */ 570{ 571 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 572 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 573#define FLD(f) abuf->fields.sfmt_addi_compact.f 574 int UNUSED written = 0; 575 IADDR UNUSED pc = abuf->addr; 576 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 577 578{ 579 DI tmp_addr; 580 UQI tmp_data; 581 tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); 582 tmp_data = ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); 583 { 584 UQI opval = tmp_data; 585 SETMEMUQI (current_cpu, pc, tmp_addr, opval); 586 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 587 } 588} 589 590#undef FLD 591} 592 NEXT (vpc); 593 594 CASE (sem, INSN_BF_COMPACT) : /* bf $disp8 */ 595{ 596 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 597 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 598#define FLD(f) abuf->fields.sfmt_bf_compact.f 599 int UNUSED written = 0; 600 IADDR UNUSED pc = abuf->addr; 601 SEM_BRANCH_INIT 602 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 603 604if (NOTBI (GET_H_TBIT ())) { 605 { 606 UDI opval = FLD (i_disp8); 607 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 608 written |= (1 << 2); 609 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 610 } 611} 612 613 abuf->written = written; 614 SEM_BRANCH_FINI (vpc); 615#undef FLD 616} 617 NEXT (vpc); 618 619 CASE (sem, INSN_BFS_COMPACT) : /* bf/s $disp8 */ 620{ 621 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 622 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 623#define FLD(f) abuf->fields.sfmt_bf_compact.f 624 int UNUSED written = 0; 625 IADDR UNUSED pc = abuf->addr; 626 SEM_BRANCH_INIT 627 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 628 629if (NOTBI (GET_H_TBIT ())) { 630{ 631 { 632 UDI opval = ADDDI (pc, 2); 633 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 634 written |= (1 << 3); 635 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 636 } 637((void) 0); /*nop*/ 638{ 639 { 640 UDI opval = FLD (i_disp8); 641 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 642 written |= (1 << 3); 643 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 644 } 645} 646} 647} 648 649 abuf->written = written; 650 SEM_BRANCH_FINI (vpc); 651#undef FLD 652} 653 NEXT (vpc); 654 655 CASE (sem, INSN_BRA_COMPACT) : /* bra $disp12 */ 656{ 657 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 658 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 659#define FLD(f) abuf->fields.sfmt_bra_compact.f 660 int UNUSED written = 0; 661 IADDR UNUSED pc = abuf->addr; 662 SEM_BRANCH_INIT 663 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 664 665{ 666 { 667 UDI opval = ADDDI (pc, 2); 668 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 669 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 670 } 671((void) 0); /*nop*/ 672{ 673 { 674 UDI opval = FLD (i_disp12); 675 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 676 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 677 } 678} 679} 680 681 SEM_BRANCH_FINI (vpc); 682#undef FLD 683} 684 NEXT (vpc); 685 686 CASE (sem, INSN_BRAF_COMPACT) : /* braf $rn */ 687{ 688 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 689 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 690#define FLD(f) abuf->fields.sfmt_movw10_compact.f 691 int UNUSED written = 0; 692 IADDR UNUSED pc = abuf->addr; 693 SEM_BRANCH_INIT 694 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 695 696{ 697 { 698 UDI opval = ADDDI (pc, 2); 699 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 700 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 701 } 702((void) 0); /*nop*/ 703{ 704 { 705 UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); 706 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 707 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 708 } 709} 710} 711 712 SEM_BRANCH_FINI (vpc); 713#undef FLD 714} 715 NEXT (vpc); 716 717 CASE (sem, INSN_BRK_COMPACT) : /* brk */ 718{ 719 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 720 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 721#define FLD(f) abuf->fields.fmt_empty.f 722 int UNUSED written = 0; 723 IADDR UNUSED pc = abuf->addr; 724 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 725 726sh64_break (current_cpu, pc); 727 728#undef FLD 729} 730 NEXT (vpc); 731 732 CASE (sem, INSN_BSR_COMPACT) : /* bsr $disp12 */ 733{ 734 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 735 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 736#define FLD(f) abuf->fields.sfmt_bra_compact.f 737 int UNUSED written = 0; 738 IADDR UNUSED pc = abuf->addr; 739 SEM_BRANCH_INIT 740 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 741 742{ 743{ 744 { 745 SI opval = ADDDI (pc, 4); 746 SET_H_PR (opval); 747 TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); 748 } 749} 750 { 751 UDI opval = ADDDI (pc, 2); 752 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 753 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 754 } 755((void) 0); /*nop*/ 756{ 757 { 758 UDI opval = FLD (i_disp12); 759 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 760 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 761 } 762} 763} 764 765 SEM_BRANCH_FINI (vpc); 766#undef FLD 767} 768 NEXT (vpc); 769 770 CASE (sem, INSN_BSRF_COMPACT) : /* bsrf $rn */ 771{ 772 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 773 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 774#define FLD(f) abuf->fields.sfmt_movw10_compact.f 775 int UNUSED written = 0; 776 IADDR UNUSED pc = abuf->addr; 777 SEM_BRANCH_INIT 778 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 779 780{ 781{ 782 { 783 SI opval = ADDDI (pc, 4); 784 SET_H_PR (opval); 785 TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); 786 } 787} 788 { 789 UDI opval = ADDDI (pc, 2); 790 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 791 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 792 } 793((void) 0); /*nop*/ 794{ 795 { 796 UDI opval = ADDDI (EXTSIDI (GET_H_GRC (FLD (f_rn))), ADDDI (pc, 4)); 797 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 798 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 799 } 800} 801} 802 803 SEM_BRANCH_FINI (vpc); 804#undef FLD 805} 806 NEXT (vpc); 807 808 CASE (sem, INSN_BT_COMPACT) : /* bt $disp8 */ 809{ 810 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 811 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 812#define FLD(f) abuf->fields.sfmt_bf_compact.f 813 int UNUSED written = 0; 814 IADDR UNUSED pc = abuf->addr; 815 SEM_BRANCH_INIT 816 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 817 818if (GET_H_TBIT ()) { 819 { 820 UDI opval = FLD (i_disp8); 821 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 822 written |= (1 << 2); 823 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 824 } 825} 826 827 abuf->written = written; 828 SEM_BRANCH_FINI (vpc); 829#undef FLD 830} 831 NEXT (vpc); 832 833 CASE (sem, INSN_BTS_COMPACT) : /* bt/s $disp8 */ 834{ 835 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 836 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 837#define FLD(f) abuf->fields.sfmt_bf_compact.f 838 int UNUSED written = 0; 839 IADDR UNUSED pc = abuf->addr; 840 SEM_BRANCH_INIT 841 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 842 843if (GET_H_TBIT ()) { 844{ 845 { 846 UDI opval = ADDDI (pc, 2); 847 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 848 written |= (1 << 3); 849 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 850 } 851((void) 0); /*nop*/ 852{ 853 { 854 UDI opval = FLD (i_disp8); 855 SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc); 856 written |= (1 << 3); 857 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 858 } 859} 860} 861} 862 863 abuf->written = written; 864 SEM_BRANCH_FINI (vpc); 865#undef FLD 866} 867 NEXT (vpc); 868 869 CASE (sem, INSN_CLRMAC_COMPACT) : /* clrmac */ 870{ 871 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 872 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 873#define FLD(f) abuf->fields.fmt_empty.f 874 int UNUSED written = 0; 875 IADDR UNUSED pc = abuf->addr; 876 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 877 878{ 879 { 880 SI opval = 0; 881 SET_H_MACL (opval); 882 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 883 } 884 { 885 SI opval = 0; 886 SET_H_MACH (opval); 887 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 888 } 889} 890 891#undef FLD 892} 893 NEXT (vpc); 894 895 CASE (sem, INSN_CLRS_COMPACT) : /* clrs */ 896{ 897 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 898 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 899#define FLD(f) abuf->fields.fmt_empty.f 900 int UNUSED written = 0; 901 IADDR UNUSED pc = abuf->addr; 902 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 903 904 { 905 BI opval = 0; 906 SET_H_SBIT (opval); 907 TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); 908 } 909 910#undef FLD 911} 912 NEXT (vpc); 913 914 CASE (sem, INSN_CLRT_COMPACT) : /* clrt */ 915{ 916 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 917 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 918#define FLD(f) abuf->fields.fmt_empty.f 919 int UNUSED written = 0; 920 IADDR UNUSED pc = abuf->addr; 921 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 922 923 { 924 BI opval = 0; 925 SET_H_TBIT (opval); 926 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 927 } 928 929#undef FLD 930} 931 NEXT (vpc); 932 933 CASE (sem, INSN_CMPEQ_COMPACT) : /* cmp/eq $rm, $rn */ 934{ 935 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 936 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 937#define FLD(f) abuf->fields.sfmt_movl12_compact.f 938 int UNUSED written = 0; 939 IADDR UNUSED pc = abuf->addr; 940 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 941 942 { 943 BI opval = EQSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); 944 SET_H_TBIT (opval); 945 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 946 } 947 948#undef FLD 949} 950 NEXT (vpc); 951 952 CASE (sem, INSN_CMPEQI_COMPACT) : /* cmp/eq #$imm8, r0 */ 953{ 954 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 955 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 956#define FLD(f) abuf->fields.sfmt_addi_compact.f 957 int UNUSED written = 0; 958 IADDR UNUSED pc = abuf->addr; 959 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 960 961 { 962 BI opval = EQSI (GET_H_GRC (((UINT) 0)), EXTQISI (ANDQI (FLD (f_imm8), 255))); 963 SET_H_TBIT (opval); 964 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 965 } 966 967#undef FLD 968} 969 NEXT (vpc); 970 971 CASE (sem, INSN_CMPGE_COMPACT) : /* cmp/ge $rm, $rn */ 972{ 973 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 974 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 975#define FLD(f) abuf->fields.sfmt_movl12_compact.f 976 int UNUSED written = 0; 977 IADDR UNUSED pc = abuf->addr; 978 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 979 980 { 981 BI opval = GESI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 982 SET_H_TBIT (opval); 983 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 984 } 985 986#undef FLD 987} 988 NEXT (vpc); 989 990 CASE (sem, INSN_CMPGT_COMPACT) : /* cmp/gt $rm, $rn */ 991{ 992 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 993 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 994#define FLD(f) abuf->fields.sfmt_movl12_compact.f 995 int UNUSED written = 0; 996 IADDR UNUSED pc = abuf->addr; 997 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 998 999 { 1000 BI opval = GTSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 1001 SET_H_TBIT (opval); 1002 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1003 } 1004 1005#undef FLD 1006} 1007 NEXT (vpc); 1008 1009 CASE (sem, INSN_CMPHI_COMPACT) : /* cmp/hi $rm, $rn */ 1010{ 1011 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1012 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1013#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1014 int UNUSED written = 0; 1015 IADDR UNUSED pc = abuf->addr; 1016 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1017 1018 { 1019 BI opval = GTUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 1020 SET_H_TBIT (opval); 1021 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1022 } 1023 1024#undef FLD 1025} 1026 NEXT (vpc); 1027 1028 CASE (sem, INSN_CMPHS_COMPACT) : /* cmp/hs $rm, $rn */ 1029{ 1030 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1031 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1032#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1033 int UNUSED written = 0; 1034 IADDR UNUSED pc = abuf->addr; 1035 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1036 1037 { 1038 BI opval = GEUSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 1039 SET_H_TBIT (opval); 1040 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1041 } 1042 1043#undef FLD 1044} 1045 NEXT (vpc); 1046 1047 CASE (sem, INSN_CMPPL_COMPACT) : /* cmp/pl $rn */ 1048{ 1049 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1050 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1051#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1052 int UNUSED written = 0; 1053 IADDR UNUSED pc = abuf->addr; 1054 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1055 1056 { 1057 BI opval = GTSI (GET_H_GRC (FLD (f_rn)), 0); 1058 SET_H_TBIT (opval); 1059 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1060 } 1061 1062#undef FLD 1063} 1064 NEXT (vpc); 1065 1066 CASE (sem, INSN_CMPPZ_COMPACT) : /* cmp/pz $rn */ 1067{ 1068 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1069 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1070#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1071 int UNUSED written = 0; 1072 IADDR UNUSED pc = abuf->addr; 1073 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1074 1075 { 1076 BI opval = GESI (GET_H_GRC (FLD (f_rn)), 0); 1077 SET_H_TBIT (opval); 1078 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1079 } 1080 1081#undef FLD 1082} 1083 NEXT (vpc); 1084 1085 CASE (sem, INSN_CMPSTR_COMPACT) : /* cmp/str $rm, $rn */ 1086{ 1087 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1088 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1089#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1090 int UNUSED written = 0; 1091 IADDR UNUSED pc = abuf->addr; 1092 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1093 1094{ 1095 BI tmp_t; 1096 SI tmp_temp; 1097 tmp_temp = XORSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); 1098 tmp_t = EQSI (ANDSI (tmp_temp, 0xff000000), 0); 1099 tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 16711680), 0), tmp_t); 1100 tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 65280), 0), tmp_t); 1101 tmp_t = ORBI (EQSI (ANDSI (tmp_temp, 255), 0), tmp_t); 1102 { 1103 BI opval = ((GTUBI (tmp_t, 0)) ? (1) : (0)); 1104 SET_H_TBIT (opval); 1105 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1106 } 1107} 1108 1109#undef FLD 1110} 1111 NEXT (vpc); 1112 1113 CASE (sem, INSN_DIV0S_COMPACT) : /* div0s $rm, $rn */ 1114{ 1115 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1116 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1117#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1118 int UNUSED written = 0; 1119 IADDR UNUSED pc = abuf->addr; 1120 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1121 1122{ 1123 { 1124 BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); 1125 SET_H_QBIT (opval); 1126 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1127 } 1128 { 1129 BI opval = SRLSI (GET_H_GRC (FLD (f_rm)), 31); 1130 SET_H_MBIT (opval); 1131 TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); 1132 } 1133 { 1134 BI opval = ((EQSI (SRLSI (GET_H_GRC (FLD (f_rm)), 31), SRLSI (GET_H_GRC (FLD (f_rn)), 31))) ? (0) : (1)); 1135 SET_H_TBIT (opval); 1136 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1137 } 1138} 1139 1140#undef FLD 1141} 1142 NEXT (vpc); 1143 1144 CASE (sem, INSN_DIV0U_COMPACT) : /* div0u */ 1145{ 1146 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1147 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1148#define FLD(f) abuf->fields.fmt_empty.f 1149 int UNUSED written = 0; 1150 IADDR UNUSED pc = abuf->addr; 1151 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1152 1153{ 1154 { 1155 BI opval = 0; 1156 SET_H_TBIT (opval); 1157 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1158 } 1159 { 1160 BI opval = 0; 1161 SET_H_QBIT (opval); 1162 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1163 } 1164 { 1165 BI opval = 0; 1166 SET_H_MBIT (opval); 1167 TRACE_RESULT (current_cpu, abuf, "mbit", 'x', opval); 1168 } 1169} 1170 1171#undef FLD 1172} 1173 NEXT (vpc); 1174 1175 CASE (sem, INSN_DIV1_COMPACT) : /* div1 $rm, $rn */ 1176{ 1177 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1178 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1179#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1180 int UNUSED written = 0; 1181 IADDR UNUSED pc = abuf->addr; 1182 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1183 1184{ 1185 BI tmp_oldq; 1186 SI tmp_tmp0; 1187 UQI tmp_tmp1; 1188 tmp_oldq = GET_H_QBIT (); 1189 { 1190 BI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 31); 1191 SET_H_QBIT (opval); 1192 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1193 } 1194 { 1195 SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), ZEXTBISI (GET_H_TBIT ())); 1196 SET_H_GRC (FLD (f_rn), opval); 1197 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1198 } 1199if (NOTBI (tmp_oldq)) { 1200if (NOTBI (GET_H_MBIT ())) { 1201{ 1202 tmp_tmp0 = GET_H_GRC (FLD (f_rn)); 1203 { 1204 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 1205 SET_H_GRC (FLD (f_rn), opval); 1206 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1207 } 1208 tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); 1209if (NOTBI (GET_H_QBIT ())) { 1210 { 1211 BI opval = ((tmp_tmp1) ? (1) : (0)); 1212 SET_H_QBIT (opval); 1213 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1214 } 1215} else { 1216 { 1217 BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); 1218 SET_H_QBIT (opval); 1219 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1220 } 1221} 1222} 1223} else { 1224{ 1225 tmp_tmp0 = GET_H_GRC (FLD (f_rn)); 1226 { 1227 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 1228 SET_H_GRC (FLD (f_rn), opval); 1229 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1230 } 1231 tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); 1232if (NOTBI (GET_H_QBIT ())) { 1233 { 1234 BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); 1235 SET_H_QBIT (opval); 1236 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1237 } 1238} else { 1239 { 1240 BI opval = ((tmp_tmp1) ? (1) : (0)); 1241 SET_H_QBIT (opval); 1242 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1243 } 1244} 1245} 1246} 1247} else { 1248if (NOTBI (GET_H_MBIT ())) { 1249{ 1250 tmp_tmp0 = GET_H_GRC (FLD (f_rn)); 1251 { 1252 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); 1253 SET_H_GRC (FLD (f_rn), opval); 1254 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1255 } 1256 tmp_tmp1 = LTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); 1257if (NOTBI (GET_H_QBIT ())) { 1258 { 1259 BI opval = ((tmp_tmp1) ? (1) : (0)); 1260 SET_H_QBIT (opval); 1261 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1262 } 1263} else { 1264 { 1265 BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); 1266 SET_H_QBIT (opval); 1267 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1268 } 1269} 1270} 1271} else { 1272{ 1273 tmp_tmp0 = GET_H_GRC (FLD (f_rn)); 1274 { 1275 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 1276 SET_H_GRC (FLD (f_rn), opval); 1277 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1278 } 1279 tmp_tmp1 = GTUSI (GET_H_GRC (FLD (f_rn)), tmp_tmp0); 1280if (NOTBI (GET_H_QBIT ())) { 1281 { 1282 BI opval = ((EQQI (tmp_tmp1, 0)) ? (1) : (0)); 1283 SET_H_QBIT (opval); 1284 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1285 } 1286} else { 1287 { 1288 BI opval = ((tmp_tmp1) ? (1) : (0)); 1289 SET_H_QBIT (opval); 1290 TRACE_RESULT (current_cpu, abuf, "qbit", 'x', opval); 1291 } 1292} 1293} 1294} 1295} 1296 { 1297 BI opval = ((EQBI (GET_H_QBIT (), GET_H_MBIT ())) ? (1) : (0)); 1298 SET_H_TBIT (opval); 1299 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1300 } 1301} 1302 1303#undef FLD 1304} 1305 NEXT (vpc); 1306 1307 CASE (sem, INSN_DIVU_COMPACT) : /* divu r0, $rn */ 1308{ 1309 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1310 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1311#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1312 int UNUSED written = 0; 1313 IADDR UNUSED pc = abuf->addr; 1314 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1315 1316 { 1317 SI opval = UDIVSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (((UINT) 0))); 1318 SET_H_GRC (FLD (f_rn), opval); 1319 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1320 } 1321 1322#undef FLD 1323} 1324 NEXT (vpc); 1325 1326 CASE (sem, INSN_MULR_COMPACT) : /* mulr r0, $rn */ 1327{ 1328 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1329 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1330#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1331 int UNUSED written = 0; 1332 IADDR UNUSED pc = abuf->addr; 1333 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1334 1335 { 1336 SI opval = MULSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (((UINT) 0))); 1337 SET_H_GRC (FLD (f_rn), opval); 1338 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1339 } 1340 1341#undef FLD 1342} 1343 NEXT (vpc); 1344 1345 CASE (sem, INSN_DMULSL_COMPACT) : /* dmuls.l $rm, $rn */ 1346{ 1347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1348 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1349#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1350 int UNUSED written = 0; 1351 IADDR UNUSED pc = abuf->addr; 1352 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1353 1354{ 1355 DI tmp_result; 1356 tmp_result = MULDI (EXTSIDI (GET_H_GRC (FLD (f_rm))), EXTSIDI (GET_H_GRC (FLD (f_rn)))); 1357 { 1358 SI opval = SUBWORDDISI (tmp_result, 0); 1359 SET_H_MACH (opval); 1360 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 1361 } 1362 { 1363 SI opval = SUBWORDDISI (tmp_result, 1); 1364 SET_H_MACL (opval); 1365 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 1366 } 1367} 1368 1369#undef FLD 1370} 1371 NEXT (vpc); 1372 1373 CASE (sem, INSN_DMULUL_COMPACT) : /* dmulu.l $rm, $rn */ 1374{ 1375 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1376 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1377#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1378 int UNUSED written = 0; 1379 IADDR UNUSED pc = abuf->addr; 1380 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1381 1382{ 1383 DI tmp_result; 1384 tmp_result = MULDI (ZEXTSIDI (GET_H_GRC (FLD (f_rm))), ZEXTSIDI (GET_H_GRC (FLD (f_rn)))); 1385 { 1386 SI opval = SUBWORDDISI (tmp_result, 0); 1387 SET_H_MACH (opval); 1388 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 1389 } 1390 { 1391 SI opval = SUBWORDDISI (tmp_result, 1); 1392 SET_H_MACL (opval); 1393 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 1394 } 1395} 1396 1397#undef FLD 1398} 1399 NEXT (vpc); 1400 1401 CASE (sem, INSN_DT_COMPACT) : /* dt $rn */ 1402{ 1403 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1404 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1405#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1406 int UNUSED written = 0; 1407 IADDR UNUSED pc = abuf->addr; 1408 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1409 1410{ 1411 { 1412 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 1); 1413 SET_H_GRC (FLD (f_rn), opval); 1414 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1415 } 1416 { 1417 BI opval = EQSI (GET_H_GRC (FLD (f_rn)), 0); 1418 SET_H_TBIT (opval); 1419 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1420 } 1421} 1422 1423#undef FLD 1424} 1425 NEXT (vpc); 1426 1427 CASE (sem, INSN_EXTSB_COMPACT) : /* exts.b $rm, $rn */ 1428{ 1429 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1430 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1431#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1432 int UNUSED written = 0; 1433 IADDR UNUSED pc = abuf->addr; 1434 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1435 1436 { 1437 SI opval = EXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); 1438 SET_H_GRC (FLD (f_rn), opval); 1439 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1440 } 1441 1442#undef FLD 1443} 1444 NEXT (vpc); 1445 1446 CASE (sem, INSN_EXTSW_COMPACT) : /* exts.w $rm, $rn */ 1447{ 1448 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1449 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1450#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1451 int UNUSED written = 0; 1452 IADDR UNUSED pc = abuf->addr; 1453 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1454 1455 { 1456 SI opval = EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); 1457 SET_H_GRC (FLD (f_rn), opval); 1458 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1459 } 1460 1461#undef FLD 1462} 1463 NEXT (vpc); 1464 1465 CASE (sem, INSN_EXTUB_COMPACT) : /* extu.b $rm, $rn */ 1466{ 1467 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1468 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1469#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1470 int UNUSED written = 0; 1471 IADDR UNUSED pc = abuf->addr; 1472 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1473 1474 { 1475 SI opval = ZEXTQISI (SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3)); 1476 SET_H_GRC (FLD (f_rn), opval); 1477 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1478 } 1479 1480#undef FLD 1481} 1482 NEXT (vpc); 1483 1484 CASE (sem, INSN_EXTUW_COMPACT) : /* extu.w $rm, $rn */ 1485{ 1486 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1487 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1488#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1489 int UNUSED written = 0; 1490 IADDR UNUSED pc = abuf->addr; 1491 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1492 1493 { 1494 SI opval = ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)); 1495 SET_H_GRC (FLD (f_rn), opval); 1496 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1497 } 1498 1499#undef FLD 1500} 1501 NEXT (vpc); 1502 1503 CASE (sem, INSN_FABS_COMPACT) : /* fabs $fsdn */ 1504{ 1505 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1506 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1507#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1508 int UNUSED written = 0; 1509 IADDR UNUSED pc = abuf->addr; 1510 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1511 1512if (GET_H_PRBIT ()) { 1513 { 1514 DF opval = sh64_fabsd (current_cpu, GET_H_FSD (FLD (f_rn))); 1515 SET_H_FSD (FLD (f_rn), opval); 1516 written |= (1 << 2); 1517 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1518 } 1519} else { 1520 { 1521 DF opval = sh64_fabss (current_cpu, GET_H_FSD (FLD (f_rn))); 1522 SET_H_FSD (FLD (f_rn), opval); 1523 written |= (1 << 2); 1524 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1525 } 1526} 1527 1528 abuf->written = written; 1529#undef FLD 1530} 1531 NEXT (vpc); 1532 1533 CASE (sem, INSN_FADD_COMPACT) : /* fadd $fsdm, $fsdn */ 1534{ 1535 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1536 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1537#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1538 int UNUSED written = 0; 1539 IADDR UNUSED pc = abuf->addr; 1540 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1541 1542if (GET_H_PRBIT ()) { 1543 { 1544 DF opval = sh64_faddd (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); 1545 SET_H_FSD (FLD (f_rn), opval); 1546 written |= (1 << 3); 1547 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1548 } 1549} else { 1550 { 1551 DF opval = sh64_fadds (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); 1552 SET_H_FSD (FLD (f_rn), opval); 1553 written |= (1 << 3); 1554 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1555 } 1556} 1557 1558 abuf->written = written; 1559#undef FLD 1560} 1561 NEXT (vpc); 1562 1563 CASE (sem, INSN_FCMPEQ_COMPACT) : /* fcmp/eq $fsdm, $fsdn */ 1564{ 1565 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1566 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1567#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1568 int UNUSED written = 0; 1569 IADDR UNUSED pc = abuf->addr; 1570 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1571 1572if (GET_H_PRBIT ()) { 1573 { 1574 BI opval = sh64_fcmpeqd (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); 1575 SET_H_TBIT (opval); 1576 written |= (1 << 3); 1577 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1578 } 1579} else { 1580 { 1581 BI opval = sh64_fcmpeqs (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); 1582 SET_H_TBIT (opval); 1583 written |= (1 << 3); 1584 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1585 } 1586} 1587 1588 abuf->written = written; 1589#undef FLD 1590} 1591 NEXT (vpc); 1592 1593 CASE (sem, INSN_FCMPGT_COMPACT) : /* fcmp/gt $fsdm, $fsdn */ 1594{ 1595 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1596 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1597#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1598 int UNUSED written = 0; 1599 IADDR UNUSED pc = abuf->addr; 1600 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1601 1602if (GET_H_PRBIT ()) { 1603 { 1604 BI opval = sh64_fcmpgtd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); 1605 SET_H_TBIT (opval); 1606 written |= (1 << 3); 1607 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1608 } 1609} else { 1610 { 1611 BI opval = sh64_fcmpgts (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); 1612 SET_H_TBIT (opval); 1613 written |= (1 << 3); 1614 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 1615 } 1616} 1617 1618 abuf->written = written; 1619#undef FLD 1620} 1621 NEXT (vpc); 1622 1623 CASE (sem, INSN_FCNVDS_COMPACT) : /* fcnvds $drn, fpul */ 1624{ 1625 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1626 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1627#define FLD(f) abuf->fields.sfmt_fmov8_compact.f 1628 int UNUSED written = 0; 1629 IADDR UNUSED pc = abuf->addr; 1630 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1631 1632 { 1633 SF opval = sh64_fcnvds (current_cpu, GET_H_DRC (FLD (f_dn))); 1634 CPU (h_fr[((UINT) 32)]) = opval; 1635 TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); 1636 } 1637 1638#undef FLD 1639} 1640 NEXT (vpc); 1641 1642 CASE (sem, INSN_FCNVSD_COMPACT) : /* fcnvsd fpul, $drn */ 1643{ 1644 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1645 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1646#define FLD(f) abuf->fields.sfmt_fmov8_compact.f 1647 int UNUSED written = 0; 1648 IADDR UNUSED pc = abuf->addr; 1649 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1650 1651 { 1652 DF opval = sh64_fcnvsd (current_cpu, CPU (h_fr[((UINT) 32)])); 1653 SET_H_DRC (FLD (f_dn), opval); 1654 TRACE_RESULT (current_cpu, abuf, "drc", 'f', opval); 1655 } 1656 1657#undef FLD 1658} 1659 NEXT (vpc); 1660 1661 CASE (sem, INSN_FDIV_COMPACT) : /* fdiv $fsdm, $fsdn */ 1662{ 1663 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1664 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1665#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1666 int UNUSED written = 0; 1667 IADDR UNUSED pc = abuf->addr; 1668 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1669 1670if (GET_H_PRBIT ()) { 1671 { 1672 DF opval = sh64_fdivd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); 1673 SET_H_FSD (FLD (f_rn), opval); 1674 written |= (1 << 3); 1675 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1676 } 1677} else { 1678 { 1679 DF opval = sh64_fdivs (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); 1680 SET_H_FSD (FLD (f_rn), opval); 1681 written |= (1 << 3); 1682 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1683 } 1684} 1685 1686 abuf->written = written; 1687#undef FLD 1688} 1689 NEXT (vpc); 1690 1691 CASE (sem, INSN_FIPR_COMPACT) : /* fipr $fvm, $fvn */ 1692{ 1693 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1694 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1695#define FLD(f) abuf->fields.sfmt_fipr_compact.f 1696 int UNUSED written = 0; 1697 IADDR UNUSED pc = abuf->addr; 1698 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1699 1700sh64_fipr (current_cpu, FLD (f_vm), FLD (f_vn)); 1701 1702#undef FLD 1703} 1704 NEXT (vpc); 1705 1706 CASE (sem, INSN_FLDS_COMPACT) : /* flds $frn, fpul */ 1707{ 1708 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1709 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1710#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1711 int UNUSED written = 0; 1712 IADDR UNUSED pc = abuf->addr; 1713 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1714 1715 { 1716 SF opval = GET_H_FRC (FLD (f_rn)); 1717 CPU (h_fr[((UINT) 32)]) = opval; 1718 TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); 1719 } 1720 1721#undef FLD 1722} 1723 NEXT (vpc); 1724 1725 CASE (sem, INSN_FLDI0_COMPACT) : /* fldi0 $frn */ 1726{ 1727 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1728 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1729#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1730 int UNUSED written = 0; 1731 IADDR UNUSED pc = abuf->addr; 1732 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1733 1734 { 1735 SF opval = sh64_fldi0 (current_cpu); 1736 SET_H_FRC (FLD (f_rn), opval); 1737 TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); 1738 } 1739 1740#undef FLD 1741} 1742 NEXT (vpc); 1743 1744 CASE (sem, INSN_FLDI1_COMPACT) : /* fldi1 $frn */ 1745{ 1746 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1747 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1748#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1749 int UNUSED written = 0; 1750 IADDR UNUSED pc = abuf->addr; 1751 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1752 1753 { 1754 SF opval = sh64_fldi1 (current_cpu); 1755 SET_H_FRC (FLD (f_rn), opval); 1756 TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); 1757 } 1758 1759#undef FLD 1760} 1761 NEXT (vpc); 1762 1763 CASE (sem, INSN_FLOAT_COMPACT) : /* float fpul, $fsdn */ 1764{ 1765 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1766 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1767#define FLD(f) abuf->fields.sfmt_movw10_compact.f 1768 int UNUSED written = 0; 1769 IADDR UNUSED pc = abuf->addr; 1770 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1771 1772if (GET_H_PRBIT ()) { 1773 { 1774 DF opval = sh64_floatld (current_cpu, CPU (h_fr[((UINT) 32)])); 1775 SET_H_FSD (FLD (f_rn), opval); 1776 written |= (1 << 2); 1777 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1778 } 1779} else { 1780 { 1781 DF opval = sh64_floatls (current_cpu, CPU (h_fr[((UINT) 32)])); 1782 SET_H_FSD (FLD (f_rn), opval); 1783 written |= (1 << 2); 1784 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 1785 } 1786} 1787 1788 abuf->written = written; 1789#undef FLD 1790} 1791 NEXT (vpc); 1792 1793 CASE (sem, INSN_FMAC_COMPACT) : /* fmac fr0, $frm, $frn */ 1794{ 1795 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1796 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1797#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1798 int UNUSED written = 0; 1799 IADDR UNUSED pc = abuf->addr; 1800 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1801 1802 { 1803 SF opval = sh64_fmacs (current_cpu, GET_H_FRC (((UINT) 0)), GET_H_FRC (FLD (f_rm)), GET_H_FRC (FLD (f_rn))); 1804 SET_H_FRC (FLD (f_rn), opval); 1805 TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); 1806 } 1807 1808#undef FLD 1809} 1810 NEXT (vpc); 1811 1812 CASE (sem, INSN_FMOV1_COMPACT) : /* fmov $fmovm, $fmovn */ 1813{ 1814 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1815 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1816#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1817 int UNUSED written = 0; 1818 IADDR UNUSED pc = abuf->addr; 1819 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1820 1821 { 1822 DF opval = GET_H_FMOV (FLD (f_rm)); 1823 SET_H_FMOV (FLD (f_rn), opval); 1824 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1825 } 1826 1827#undef FLD 1828} 1829 NEXT (vpc); 1830 1831 CASE (sem, INSN_FMOV2_COMPACT) : /* fmov @$rm, $fmovn */ 1832{ 1833 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1834 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1835#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1836 int UNUSED written = 0; 1837 IADDR UNUSED pc = abuf->addr; 1838 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1839 1840if (NOTBI (GET_H_SZBIT ())) { 1841 { 1842 DF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 1843 SET_H_FMOV (FLD (f_rn), opval); 1844 written |= (1 << 4); 1845 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1846 } 1847} else { 1848 { 1849 DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 1850 SET_H_FMOV (FLD (f_rn), opval); 1851 written |= (1 << 4); 1852 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1853 } 1854} 1855 1856 abuf->written = written; 1857#undef FLD 1858} 1859 NEXT (vpc); 1860 1861 CASE (sem, INSN_FMOV3_COMPACT) : /* fmov @${rm}+, fmovn */ 1862{ 1863 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1864 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1865#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1866 int UNUSED written = 0; 1867 IADDR UNUSED pc = abuf->addr; 1868 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1869 1870if (NOTBI (GET_H_SZBIT ())) { 1871{ 1872 { 1873 DF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 1874 SET_H_FMOV (FLD (f_rn), opval); 1875 written |= (1 << 4); 1876 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1877 } 1878 { 1879 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); 1880 SET_H_GRC (FLD (f_rm), opval); 1881 written |= (1 << 5); 1882 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1883 } 1884} 1885} else { 1886{ 1887 { 1888 DF opval = GETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 1889 SET_H_FMOV (FLD (f_rn), opval); 1890 written |= (1 << 4); 1891 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1892 } 1893 { 1894 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 8); 1895 SET_H_GRC (FLD (f_rm), opval); 1896 written |= (1 << 5); 1897 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1898 } 1899} 1900} 1901 1902 abuf->written = written; 1903#undef FLD 1904} 1905 NEXT (vpc); 1906 1907 CASE (sem, INSN_FMOV4_COMPACT) : /* fmov @(r0, $rm), $fmovn */ 1908{ 1909 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1910 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1911#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1912 int UNUSED written = 0; 1913 IADDR UNUSED pc = abuf->addr; 1914 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1915 1916if (NOTBI (GET_H_SZBIT ())) { 1917 { 1918 DF opval = GETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); 1919 SET_H_FMOV (FLD (f_rn), opval); 1920 written |= (1 << 5); 1921 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1922 } 1923} else { 1924 { 1925 DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); 1926 SET_H_FMOV (FLD (f_rn), opval); 1927 written |= (1 << 5); 1928 TRACE_RESULT (current_cpu, abuf, "fmov", 'f', opval); 1929 } 1930} 1931 1932 abuf->written = written; 1933#undef FLD 1934} 1935 NEXT (vpc); 1936 1937 CASE (sem, INSN_FMOV5_COMPACT) : /* fmov $fmovm, @$rn */ 1938{ 1939 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1940 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1941#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1942 int UNUSED written = 0; 1943 IADDR UNUSED pc = abuf->addr; 1944 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1945 1946if (NOTBI (GET_H_SZBIT ())) { 1947 { 1948 SF opval = GET_H_FMOV (FLD (f_rm)); 1949 SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 1950 written |= (1 << 4); 1951 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 1952 } 1953} else { 1954 { 1955 DF opval = GET_H_FMOV (FLD (f_rm)); 1956 SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 1957 written |= (1 << 3); 1958 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 1959 } 1960} 1961 1962 abuf->written = written; 1963#undef FLD 1964} 1965 NEXT (vpc); 1966 1967 CASE (sem, INSN_FMOV6_COMPACT) : /* fmov $fmovm, @-$rn */ 1968{ 1969 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 1970 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 1971#define FLD(f) abuf->fields.sfmt_movl12_compact.f 1972 int UNUSED written = 0; 1973 IADDR UNUSED pc = abuf->addr; 1974 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 1975 1976if (NOTBI (GET_H_SZBIT ())) { 1977{ 1978 { 1979 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 1980 SET_H_GRC (FLD (f_rn), opval); 1981 written |= (1 << 5); 1982 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1983 } 1984 { 1985 SF opval = GET_H_FMOV (FLD (f_rm)); 1986 SETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 1987 written |= (1 << 4); 1988 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 1989 } 1990} 1991} else { 1992{ 1993 { 1994 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), 8); 1995 SET_H_GRC (FLD (f_rn), opval); 1996 written |= (1 << 5); 1997 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 1998 } 1999 { 2000 DF opval = GET_H_FMOV (FLD (f_rm)); 2001 SETMEMDF (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 2002 written |= (1 << 3); 2003 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 2004 } 2005} 2006} 2007 2008 abuf->written = written; 2009#undef FLD 2010} 2011 NEXT (vpc); 2012 2013 CASE (sem, INSN_FMOV7_COMPACT) : /* fmov $fmovm, @(r0, $rn) */ 2014{ 2015 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2016 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2017#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2018 int UNUSED written = 0; 2019 IADDR UNUSED pc = abuf->addr; 2020 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2021 2022if (NOTBI (GET_H_SZBIT ())) { 2023 { 2024 SF opval = GET_H_FMOV (FLD (f_rm)); 2025 SETMEMSF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); 2026 written |= (1 << 5); 2027 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 2028 } 2029} else { 2030 { 2031 DF opval = GET_H_FMOV (FLD (f_rm)); 2032 SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); 2033 written |= (1 << 4); 2034 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 2035 } 2036} 2037 2038 abuf->written = written; 2039#undef FLD 2040} 2041 NEXT (vpc); 2042 2043 CASE (sem, INSN_FMOV8_COMPACT) : /* fmov.d @($imm12x8, $rm), $drn */ 2044{ 2045 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2046 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2047#define FLD(f) abuf->fields.sfmt_fmov8_compact.f 2048 int UNUSED written = 0; 2049 IADDR UNUSED pc = abuf->addr; 2050 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2051 2052 { 2053 DF opval = GETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm12x8))); 2054 SET_H_DRC (FLD (f_dn), opval); 2055 TRACE_RESULT (current_cpu, abuf, "drc", 'f', opval); 2056 } 2057 2058#undef FLD 2059} 2060 NEXT (vpc); 2061 2062 CASE (sem, INSN_FMOV9_COMPACT) : /* mov.l $drm, @($imm12x8, $rn) */ 2063{ 2064 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2065 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2066#define FLD(f) abuf->fields.sfmt_fmov9_compact.f 2067 int UNUSED written = 0; 2068 IADDR UNUSED pc = abuf->addr; 2069 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2070 2071 { 2072 DF opval = GET_H_DRC (FLD (f_dm)); 2073 SETMEMDF (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm12x8)), opval); 2074 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 2075 } 2076 2077#undef FLD 2078} 2079 NEXT (vpc); 2080 2081 CASE (sem, INSN_FMUL_COMPACT) : /* fmul $fsdm, $fsdn */ 2082{ 2083 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2084 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2085#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2086 int UNUSED written = 0; 2087 IADDR UNUSED pc = abuf->addr; 2088 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2089 2090if (GET_H_PRBIT ()) { 2091 { 2092 DF opval = sh64_fmuld (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); 2093 SET_H_FSD (FLD (f_rn), opval); 2094 written |= (1 << 3); 2095 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2096 } 2097} else { 2098 { 2099 DF opval = sh64_fmuls (current_cpu, GET_H_FSD (FLD (f_rm)), GET_H_FSD (FLD (f_rn))); 2100 SET_H_FSD (FLD (f_rn), opval); 2101 written |= (1 << 3); 2102 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2103 } 2104} 2105 2106 abuf->written = written; 2107#undef FLD 2108} 2109 NEXT (vpc); 2110 2111 CASE (sem, INSN_FNEG_COMPACT) : /* fneg $fsdn */ 2112{ 2113 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2114 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2115#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2116 int UNUSED written = 0; 2117 IADDR UNUSED pc = abuf->addr; 2118 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2119 2120if (GET_H_PRBIT ()) { 2121 { 2122 DF opval = sh64_fnegd (current_cpu, GET_H_FSD (FLD (f_rn))); 2123 SET_H_FSD (FLD (f_rn), opval); 2124 written |= (1 << 2); 2125 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2126 } 2127} else { 2128 { 2129 DF opval = sh64_fnegs (current_cpu, GET_H_FSD (FLD (f_rn))); 2130 SET_H_FSD (FLD (f_rn), opval); 2131 written |= (1 << 2); 2132 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2133 } 2134} 2135 2136 abuf->written = written; 2137#undef FLD 2138} 2139 NEXT (vpc); 2140 2141 CASE (sem, INSN_FRCHG_COMPACT) : /* frchg */ 2142{ 2143 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2144 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2145#define FLD(f) abuf->fields.fmt_empty.f 2146 int UNUSED written = 0; 2147 IADDR UNUSED pc = abuf->addr; 2148 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2149 2150 { 2151 BI opval = NOTBI (GET_H_FRBIT ()); 2152 SET_H_FRBIT (opval); 2153 TRACE_RESULT (current_cpu, abuf, "frbit", 'x', opval); 2154 } 2155 2156#undef FLD 2157} 2158 NEXT (vpc); 2159 2160 CASE (sem, INSN_FSCHG_COMPACT) : /* fschg */ 2161{ 2162 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2163 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2164#define FLD(f) abuf->fields.fmt_empty.f 2165 int UNUSED written = 0; 2166 IADDR UNUSED pc = abuf->addr; 2167 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2168 2169 { 2170 BI opval = NOTBI (GET_H_SZBIT ()); 2171 SET_H_SZBIT (opval); 2172 TRACE_RESULT (current_cpu, abuf, "szbit", 'x', opval); 2173 } 2174 2175#undef FLD 2176} 2177 NEXT (vpc); 2178 2179 CASE (sem, INSN_FSQRT_COMPACT) : /* fsqrt $fsdn */ 2180{ 2181 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2182 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2183#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2184 int UNUSED written = 0; 2185 IADDR UNUSED pc = abuf->addr; 2186 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2187 2188if (GET_H_PRBIT ()) { 2189 { 2190 DF opval = sh64_fsqrtd (current_cpu, GET_H_FSD (FLD (f_rn))); 2191 SET_H_FSD (FLD (f_rn), opval); 2192 written |= (1 << 2); 2193 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2194 } 2195} else { 2196 { 2197 DF opval = sh64_fsqrts (current_cpu, GET_H_FSD (FLD (f_rn))); 2198 SET_H_FSD (FLD (f_rn), opval); 2199 written |= (1 << 2); 2200 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2201 } 2202} 2203 2204 abuf->written = written; 2205#undef FLD 2206} 2207 NEXT (vpc); 2208 2209 CASE (sem, INSN_FSTS_COMPACT) : /* fsts fpul, $frn */ 2210{ 2211 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2212 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2213#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2214 int UNUSED written = 0; 2215 IADDR UNUSED pc = abuf->addr; 2216 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2217 2218 { 2219 SF opval = CPU (h_fr[((UINT) 32)]); 2220 SET_H_FRC (FLD (f_rn), opval); 2221 TRACE_RESULT (current_cpu, abuf, "frc", 'f', opval); 2222 } 2223 2224#undef FLD 2225} 2226 NEXT (vpc); 2227 2228 CASE (sem, INSN_FSUB_COMPACT) : /* fsub $fsdm, $fsdn */ 2229{ 2230 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2231 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2232#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2233 int UNUSED written = 0; 2234 IADDR UNUSED pc = abuf->addr; 2235 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2236 2237if (GET_H_PRBIT ()) { 2238 { 2239 DF opval = sh64_fsubd (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); 2240 SET_H_FSD (FLD (f_rn), opval); 2241 written |= (1 << 3); 2242 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2243 } 2244} else { 2245 { 2246 DF opval = sh64_fsubs (current_cpu, GET_H_FSD (FLD (f_rn)), GET_H_FSD (FLD (f_rm))); 2247 SET_H_FSD (FLD (f_rn), opval); 2248 written |= (1 << 3); 2249 TRACE_RESULT (current_cpu, abuf, "fsd", 'f', opval); 2250 } 2251} 2252 2253 abuf->written = written; 2254#undef FLD 2255} 2256 NEXT (vpc); 2257 2258 CASE (sem, INSN_FTRC_COMPACT) : /* ftrc $fsdn, fpul */ 2259{ 2260 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2261 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2262#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2263 int UNUSED written = 0; 2264 IADDR UNUSED pc = abuf->addr; 2265 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2266 2267 { 2268 SF opval = ((GET_H_PRBIT ()) ? (sh64_ftrcdl (current_cpu, GET_H_FSD (FLD (f_rn)))) : (sh64_ftrcsl (current_cpu, GET_H_FSD (FLD (f_rn))))); 2269 CPU (h_fr[((UINT) 32)]) = opval; 2270 TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); 2271 } 2272 2273#undef FLD 2274} 2275 NEXT (vpc); 2276 2277 CASE (sem, INSN_FTRV_COMPACT) : /* ftrv xmtrx, $fvn */ 2278{ 2279 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2280 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2281#define FLD(f) abuf->fields.sfmt_fipr_compact.f 2282 int UNUSED written = 0; 2283 IADDR UNUSED pc = abuf->addr; 2284 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2285 2286sh64_ftrv (current_cpu, FLD (f_vn)); 2287 2288#undef FLD 2289} 2290 NEXT (vpc); 2291 2292 CASE (sem, INSN_JMP_COMPACT) : /* jmp @$rn */ 2293{ 2294 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2295 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2296#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2297 int UNUSED written = 0; 2298 IADDR UNUSED pc = abuf->addr; 2299 SEM_BRANCH_INIT 2300 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2301 2302{ 2303 { 2304 UDI opval = ADDDI (pc, 2); 2305 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2306 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 2307 } 2308((void) 0); /*nop*/ 2309{ 2310 { 2311 UDI opval = GET_H_GRC (FLD (f_rn)); 2312 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2313 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 2314 } 2315} 2316((void) 0); /*nop*/ 2317} 2318 2319 SEM_BRANCH_FINI (vpc); 2320#undef FLD 2321} 2322 NEXT (vpc); 2323 2324 CASE (sem, INSN_JSR_COMPACT) : /* jsr @$rn */ 2325{ 2326 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2327 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2328#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2329 int UNUSED written = 0; 2330 IADDR UNUSED pc = abuf->addr; 2331 SEM_BRANCH_INIT 2332 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2333 2334{ 2335{ 2336 { 2337 SI opval = ADDDI (pc, 4); 2338 SET_H_PR (opval); 2339 TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); 2340 } 2341} 2342 { 2343 UDI opval = ADDDI (pc, 2); 2344 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2345 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 2346 } 2347((void) 0); /*nop*/ 2348{ 2349 { 2350 UDI opval = GET_H_GRC (FLD (f_rn)); 2351 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 2352 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 2353 } 2354} 2355((void) 0); /*nop*/ 2356} 2357 2358 SEM_BRANCH_FINI (vpc); 2359#undef FLD 2360} 2361 NEXT (vpc); 2362 2363 CASE (sem, INSN_LDC_GBR_COMPACT) : /* ldc $rn, gbr */ 2364{ 2365 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2366 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2367#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2368 int UNUSED written = 0; 2369 IADDR UNUSED pc = abuf->addr; 2370 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2371 2372 { 2373 SI opval = GET_H_GRC (FLD (f_rn)); 2374 SET_H_GBR (opval); 2375 TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); 2376 } 2377 2378#undef FLD 2379} 2380 NEXT (vpc); 2381 2382 CASE (sem, INSN_LDC_VBR_COMPACT) : /* ldc $rn, vbr */ 2383{ 2384 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2385 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2386#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2387 int UNUSED written = 0; 2388 IADDR UNUSED pc = abuf->addr; 2389 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2390 2391 { 2392 SI opval = GET_H_GRC (FLD (f_rn)); 2393 SET_H_VBR (opval); 2394 TRACE_RESULT (current_cpu, abuf, "vbr", 'x', opval); 2395 } 2396 2397#undef FLD 2398} 2399 NEXT (vpc); 2400 2401 CASE (sem, INSN_LDC_SR_COMPACT) : /* ldc $rn, sr */ 2402{ 2403 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2404 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2405#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2406 int UNUSED written = 0; 2407 IADDR UNUSED pc = abuf->addr; 2408 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2409 2410 { 2411 SI opval = GET_H_GRC (FLD (f_rn)); 2412 CPU (h_sr) = opval; 2413 TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval); 2414 } 2415 2416#undef FLD 2417} 2418 NEXT (vpc); 2419 2420 CASE (sem, INSN_LDCL_GBR_COMPACT) : /* ldc.l @${rn}+, gbr */ 2421{ 2422 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2423 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2424#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2425 int UNUSED written = 0; 2426 IADDR UNUSED pc = abuf->addr; 2427 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2428 2429{ 2430 { 2431 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2432 SET_H_GBR (opval); 2433 TRACE_RESULT (current_cpu, abuf, "gbr", 'x', opval); 2434 } 2435 { 2436 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2437 SET_H_GRC (FLD (f_rn), opval); 2438 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2439 } 2440} 2441 2442#undef FLD 2443} 2444 NEXT (vpc); 2445 2446 CASE (sem, INSN_LDCL_VBR_COMPACT) : /* ldc.l @${rn}+, vbr */ 2447{ 2448 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2449 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2450#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2451 int UNUSED written = 0; 2452 IADDR UNUSED pc = abuf->addr; 2453 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2454 2455{ 2456 { 2457 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2458 SET_H_VBR (opval); 2459 TRACE_RESULT (current_cpu, abuf, "vbr", 'x', opval); 2460 } 2461 { 2462 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2463 SET_H_GRC (FLD (f_rn), opval); 2464 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2465 } 2466} 2467 2468#undef FLD 2469} 2470 NEXT (vpc); 2471 2472 CASE (sem, INSN_LDS_FPSCR_COMPACT) : /* lds $rn, fpscr */ 2473{ 2474 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2475 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2476#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2477 int UNUSED written = 0; 2478 IADDR UNUSED pc = abuf->addr; 2479 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2480 2481 { 2482 SI opval = GET_H_GRC (FLD (f_rn)); 2483 CPU (h_fpscr) = opval; 2484 TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); 2485 } 2486 2487#undef FLD 2488} 2489 NEXT (vpc); 2490 2491 CASE (sem, INSN_LDSL_FPSCR_COMPACT) : /* lds.l @${rn}+, fpscr */ 2492{ 2493 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2494 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2495#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2496 int UNUSED written = 0; 2497 IADDR UNUSED pc = abuf->addr; 2498 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2499 2500{ 2501 { 2502 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2503 CPU (h_fpscr) = opval; 2504 TRACE_RESULT (current_cpu, abuf, "fpscr", 'x', opval); 2505 } 2506 { 2507 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2508 SET_H_GRC (FLD (f_rn), opval); 2509 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2510 } 2511} 2512 2513#undef FLD 2514} 2515 NEXT (vpc); 2516 2517 CASE (sem, INSN_LDS_FPUL_COMPACT) : /* lds $rn, fpul */ 2518{ 2519 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2520 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2521#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2522 int UNUSED written = 0; 2523 IADDR UNUSED pc = abuf->addr; 2524 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2525 2526 { 2527 SF opval = SUBWORDSISF (GET_H_GRC (FLD (f_rn))); 2528 CPU (h_fr[((UINT) 32)]) = opval; 2529 TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); 2530 } 2531 2532#undef FLD 2533} 2534 NEXT (vpc); 2535 2536 CASE (sem, INSN_LDSL_FPUL_COMPACT) : /* lds.l @${rn}+, fpul */ 2537{ 2538 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2539 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2540#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2541 int UNUSED written = 0; 2542 IADDR UNUSED pc = abuf->addr; 2543 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2544 2545{ 2546 { 2547 SF opval = GETMEMSF (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2548 CPU (h_fr[((UINT) 32)]) = opval; 2549 TRACE_RESULT (current_cpu, abuf, "fr", 'f', opval); 2550 } 2551 { 2552 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2553 SET_H_GRC (FLD (f_rn), opval); 2554 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2555 } 2556} 2557 2558#undef FLD 2559} 2560 NEXT (vpc); 2561 2562 CASE (sem, INSN_LDS_MACH_COMPACT) : /* lds $rn, mach */ 2563{ 2564 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2565 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2566#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2567 int UNUSED written = 0; 2568 IADDR UNUSED pc = abuf->addr; 2569 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2570 2571 { 2572 SI opval = GET_H_GRC (FLD (f_rn)); 2573 SET_H_MACH (opval); 2574 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 2575 } 2576 2577#undef FLD 2578} 2579 NEXT (vpc); 2580 2581 CASE (sem, INSN_LDSL_MACH_COMPACT) : /* lds.l @${rn}+, mach */ 2582{ 2583 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2584 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2585#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2586 int UNUSED written = 0; 2587 IADDR UNUSED pc = abuf->addr; 2588 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2589 2590{ 2591 { 2592 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2593 SET_H_MACH (opval); 2594 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 2595 } 2596 { 2597 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2598 SET_H_GRC (FLD (f_rn), opval); 2599 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2600 } 2601} 2602 2603#undef FLD 2604} 2605 NEXT (vpc); 2606 2607 CASE (sem, INSN_LDS_MACL_COMPACT) : /* lds $rn, macl */ 2608{ 2609 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2610 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2611#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2612 int UNUSED written = 0; 2613 IADDR UNUSED pc = abuf->addr; 2614 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2615 2616 { 2617 SI opval = GET_H_GRC (FLD (f_rn)); 2618 SET_H_MACL (opval); 2619 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 2620 } 2621 2622#undef FLD 2623} 2624 NEXT (vpc); 2625 2626 CASE (sem, INSN_LDSL_MACL_COMPACT) : /* lds.l @${rn}+, macl */ 2627{ 2628 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2629 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2630#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2631 int UNUSED written = 0; 2632 IADDR UNUSED pc = abuf->addr; 2633 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2634 2635{ 2636 { 2637 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2638 SET_H_MACL (opval); 2639 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 2640 } 2641 { 2642 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2643 SET_H_GRC (FLD (f_rn), opval); 2644 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2645 } 2646} 2647 2648#undef FLD 2649} 2650 NEXT (vpc); 2651 2652 CASE (sem, INSN_LDS_PR_COMPACT) : /* lds $rn, pr */ 2653{ 2654 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2655 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2656#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2657 int UNUSED written = 0; 2658 IADDR UNUSED pc = abuf->addr; 2659 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2660 2661 { 2662 SI opval = GET_H_GRC (FLD (f_rn)); 2663 SET_H_PR (opval); 2664 TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); 2665 } 2666 2667#undef FLD 2668} 2669 NEXT (vpc); 2670 2671 CASE (sem, INSN_LDSL_PR_COMPACT) : /* lds.l @${rn}+, pr */ 2672{ 2673 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2674 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2675#define FLD(f) abuf->fields.sfmt_movw10_compact.f 2676 int UNUSED written = 0; 2677 IADDR UNUSED pc = abuf->addr; 2678 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2679 2680{ 2681 { 2682 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2683 SET_H_PR (opval); 2684 TRACE_RESULT (current_cpu, abuf, "pr", 'x', opval); 2685 } 2686 { 2687 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2688 SET_H_GRC (FLD (f_rn), opval); 2689 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2690 } 2691} 2692 2693#undef FLD 2694} 2695 NEXT (vpc); 2696 2697 CASE (sem, INSN_MACL_COMPACT) : /* mac.l @${rm}+, @${rn}+ */ 2698{ 2699 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2700 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2701#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2702 int UNUSED written = 0; 2703 IADDR UNUSED pc = abuf->addr; 2704 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2705 2706{ 2707 DI tmp_tmpry; 2708 DI tmp_mac; 2709 DI tmp_result; 2710 SI tmp_x; 2711 SI tmp_y; 2712 tmp_x = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2713 { 2714 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2715 SET_H_GRC (FLD (f_rn), opval); 2716 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2717 } 2718if (EQSI (FLD (f_rn), FLD (f_rm))) { 2719{ 2720 { 2721 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 2722 SET_H_GRC (FLD (f_rn), opval); 2723 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2724 } 2725 { 2726 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); 2727 SET_H_GRC (FLD (f_rm), opval); 2728 written |= (1 << 11); 2729 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2730 } 2731} 2732} 2733 tmp_y = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 2734 { 2735 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); 2736 SET_H_GRC (FLD (f_rm), opval); 2737 written |= (1 << 11); 2738 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2739 } 2740 tmp_tmpry = MULDI (ZEXTSIDI (tmp_x), ZEXTSIDI (tmp_y)); 2741 tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); 2742 tmp_result = ADDDI (tmp_mac, tmp_tmpry); 2743{ 2744if (GET_H_SBIT ()) { 2745{ 2746 SI tmp_min; 2747 SI tmp_max; 2748 tmp_max = SRLDI (INVDI (0), 16); 2749 tmp_min = SRLDI (INVDI (0), 15); 2750if (GTDI (tmp_result, tmp_max)) { 2751 tmp_result = tmp_max; 2752} else { 2753if (LTDI (tmp_result, tmp_min)) { 2754 tmp_result = tmp_min; 2755} 2756} 2757} 2758} 2759 { 2760 SI opval = SUBWORDDISI (tmp_result, 0); 2761 SET_H_MACH (opval); 2762 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 2763 } 2764 { 2765 SI opval = SUBWORDDISI (tmp_result, 1); 2766 SET_H_MACL (opval); 2767 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 2768 } 2769} 2770} 2771 2772 abuf->written = written; 2773#undef FLD 2774} 2775 NEXT (vpc); 2776 2777 CASE (sem, INSN_MACW_COMPACT) : /* mac.w @${rm}+, @${rn}+ */ 2778{ 2779 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2780 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2781#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2782 int UNUSED written = 0; 2783 IADDR UNUSED pc = abuf->addr; 2784 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2785 2786{ 2787 SI tmp_tmpry; 2788 DI tmp_mac; 2789 DI tmp_result; 2790 HI tmp_x; 2791 HI tmp_y; 2792 tmp_x = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 2793 { 2794 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); 2795 SET_H_GRC (FLD (f_rn), opval); 2796 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2797 } 2798if (EQSI (FLD (f_rn), FLD (f_rm))) { 2799{ 2800 { 2801 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 2); 2802 SET_H_GRC (FLD (f_rn), opval); 2803 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2804 } 2805 { 2806 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); 2807 SET_H_GRC (FLD (f_rm), opval); 2808 written |= (1 << 11); 2809 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2810 } 2811} 2812} 2813 tmp_y = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 2814 { 2815 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); 2816 SET_H_GRC (FLD (f_rm), opval); 2817 written |= (1 << 11); 2818 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2819 } 2820 tmp_tmpry = MULSI (ZEXTHISI (tmp_x), ZEXTHISI (tmp_y)); 2821if (GET_H_SBIT ()) { 2822{ 2823if (ADDOFSI (tmp_tmpry, GET_H_MACL (), 0)) { 2824 { 2825 SI opval = 1; 2826 SET_H_MACH (opval); 2827 written |= (1 << 9); 2828 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 2829 } 2830} 2831 { 2832 SI opval = ADDSI (tmp_tmpry, GET_H_MACL ()); 2833 SET_H_MACL (opval); 2834 written |= (1 << 10); 2835 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 2836 } 2837} 2838} else { 2839{ 2840 tmp_mac = ORDI (SLLDI (ZEXTSIDI (GET_H_MACH ()), 32), ZEXTSIDI (GET_H_MACL ())); 2841 tmp_result = ADDDI (tmp_mac, EXTSIDI (tmp_tmpry)); 2842 { 2843 SI opval = SUBWORDDISI (tmp_result, 0); 2844 SET_H_MACH (opval); 2845 written |= (1 << 9); 2846 TRACE_RESULT (current_cpu, abuf, "mach", 'x', opval); 2847 } 2848 { 2849 SI opval = SUBWORDDISI (tmp_result, 1); 2850 SET_H_MACL (opval); 2851 written |= (1 << 10); 2852 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 2853 } 2854} 2855} 2856} 2857 2858 abuf->written = written; 2859#undef FLD 2860} 2861 NEXT (vpc); 2862 2863 CASE (sem, INSN_MOV_COMPACT) : /* mov $rm64, $rn64 */ 2864{ 2865 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2866 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2867#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2868 int UNUSED written = 0; 2869 IADDR UNUSED pc = abuf->addr; 2870 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2871 2872 { 2873 DI opval = GET_H_GR (FLD (f_rm)); 2874 SET_H_GR (FLD (f_rn), opval); 2875 TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); 2876 } 2877 2878#undef FLD 2879} 2880 NEXT (vpc); 2881 2882 CASE (sem, INSN_MOVI_COMPACT) : /* mov #$imm8, $rn */ 2883{ 2884 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2885 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2886#define FLD(f) abuf->fields.sfmt_addi_compact.f 2887 int UNUSED written = 0; 2888 IADDR UNUSED pc = abuf->addr; 2889 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2890 2891 { 2892 SI opval = EXTQIDI (ANDQI (FLD (f_imm8), 255)); 2893 SET_H_GRC (FLD (f_rn), opval); 2894 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2895 } 2896 2897#undef FLD 2898} 2899 NEXT (vpc); 2900 2901 CASE (sem, INSN_MOVI20_COMPACT) : /* movi20 #$imm20, $rn */ 2902{ 2903 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2904 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2905#define FLD(f) abuf->fields.sfmt_movi20_compact.f 2906 int UNUSED written = 0; 2907 IADDR UNUSED pc = abuf->addr; 2908 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 2909 2910 { 2911 SI opval = FLD (f_imm20); 2912 SET_H_GRC (FLD (f_rn), opval); 2913 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2914 } 2915 2916#undef FLD 2917} 2918 NEXT (vpc); 2919 2920 CASE (sem, INSN_MOVB1_COMPACT) : /* mov.b $rm, @$rn */ 2921{ 2922 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2923 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2924#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2925 int UNUSED written = 0; 2926 IADDR UNUSED pc = abuf->addr; 2927 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2928 2929 { 2930 UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); 2931 SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 2932 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2933 } 2934 2935#undef FLD 2936} 2937 NEXT (vpc); 2938 2939 CASE (sem, INSN_MOVB2_COMPACT) : /* mov.b $rm, @-$rn */ 2940{ 2941 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2942 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2943#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2944 int UNUSED written = 0; 2945 IADDR UNUSED pc = abuf->addr; 2946 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2947 2948{ 2949 DI tmp_addr; 2950 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 1); 2951 { 2952 UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); 2953 SETMEMUQI (current_cpu, pc, tmp_addr, opval); 2954 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2955 } 2956 { 2957 SI opval = tmp_addr; 2958 SET_H_GRC (FLD (f_rn), opval); 2959 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 2960 } 2961} 2962 2963#undef FLD 2964} 2965 NEXT (vpc); 2966 2967 CASE (sem, INSN_MOVB3_COMPACT) : /* mov.b $rm, @(r0,$rn) */ 2968{ 2969 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2970 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2971#define FLD(f) abuf->fields.sfmt_movl12_compact.f 2972 int UNUSED written = 0; 2973 IADDR UNUSED pc = abuf->addr; 2974 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2975 2976 { 2977 UQI opval = SUBWORDSIUQI (GET_H_GRC (FLD (f_rm)), 3); 2978 SETMEMUQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); 2979 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 2980 } 2981 2982#undef FLD 2983} 2984 NEXT (vpc); 2985 2986 CASE (sem, INSN_MOVB4_COMPACT) : /* mov.b r0, @($imm8, gbr) */ 2987{ 2988 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 2989 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 2990#define FLD(f) abuf->fields.sfmt_addi_compact.f 2991 int UNUSED written = 0; 2992 IADDR UNUSED pc = abuf->addr; 2993 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 2994 2995{ 2996 DI tmp_addr; 2997 tmp_addr = ADDSI (GET_H_GBR (), FLD (f_imm8)); 2998 { 2999 UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); 3000 SETMEMUQI (current_cpu, pc, tmp_addr, opval); 3001 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3002 } 3003} 3004 3005#undef FLD 3006} 3007 NEXT (vpc); 3008 3009 CASE (sem, INSN_MOVB5_COMPACT) : /* mov.b r0, @($imm4, $rm) */ 3010{ 3011 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3012 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3013#define FLD(f) abuf->fields.sfmt_movb5_compact.f 3014 int UNUSED written = 0; 3015 IADDR UNUSED pc = abuf->addr; 3016 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3017 3018{ 3019 DI tmp_addr; 3020 tmp_addr = ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)); 3021 { 3022 UQI opval = SUBWORDSIUQI (GET_H_GRC (((UINT) 0)), 3); 3023 SETMEMUQI (current_cpu, pc, tmp_addr, opval); 3024 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3025 } 3026} 3027 3028#undef FLD 3029} 3030 NEXT (vpc); 3031 3032 CASE (sem, INSN_MOVB6_COMPACT) : /* mov.b @$rm, $rn */ 3033{ 3034 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3035 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3036#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3037 int UNUSED written = 0; 3038 IADDR UNUSED pc = abuf->addr; 3039 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3040 3041 { 3042 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); 3043 SET_H_GRC (FLD (f_rn), opval); 3044 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3045 } 3046 3047#undef FLD 3048} 3049 NEXT (vpc); 3050 3051 CASE (sem, INSN_MOVB7_COMPACT) : /* mov.b @${rm}+, $rn */ 3052{ 3053 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3054 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3055#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3056 int UNUSED written = 0; 3057 IADDR UNUSED pc = abuf->addr; 3058 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3059 3060{ 3061 QI tmp_data; 3062 tmp_data = GETMEMQI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 3063if (EQSI (FLD (f_rm), FLD (f_rn))) { 3064 { 3065 SI opval = EXTQISI (tmp_data); 3066 SET_H_GRC (FLD (f_rm), opval); 3067 written |= (1 << 4); 3068 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3069 } 3070} else { 3071 { 3072 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 1); 3073 SET_H_GRC (FLD (f_rm), opval); 3074 written |= (1 << 4); 3075 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3076 } 3077} 3078 { 3079 SI opval = EXTQISI (tmp_data); 3080 SET_H_GRC (FLD (f_rn), opval); 3081 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3082 } 3083} 3084 3085 abuf->written = written; 3086#undef FLD 3087} 3088 NEXT (vpc); 3089 3090 CASE (sem, INSN_MOVB8_COMPACT) : /* mov.b @(r0, $rm), $rn */ 3091{ 3092 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3093 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3094#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3095 int UNUSED written = 0; 3096 IADDR UNUSED pc = abuf->addr; 3097 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3098 3099 { 3100 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); 3101 SET_H_GRC (FLD (f_rn), opval); 3102 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3103 } 3104 3105#undef FLD 3106} 3107 NEXT (vpc); 3108 3109 CASE (sem, INSN_MOVB9_COMPACT) : /* mov.b @($imm8, gbr), r0 */ 3110{ 3111 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3112 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3113#define FLD(f) abuf->fields.sfmt_addi_compact.f 3114 int UNUSED written = 0; 3115 IADDR UNUSED pc = abuf->addr; 3116 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3117 3118 { 3119 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8)))); 3120 SET_H_GRC (((UINT) 0), opval); 3121 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3122 } 3123 3124#undef FLD 3125} 3126 NEXT (vpc); 3127 3128 CASE (sem, INSN_MOVB10_COMPACT) : /* mov.b @($imm4, $rm), r0 */ 3129{ 3130 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3131 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3132#define FLD(f) abuf->fields.sfmt_movb5_compact.f 3133 int UNUSED written = 0; 3134 IADDR UNUSED pc = abuf->addr; 3135 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3136 3137 { 3138 SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4)))); 3139 SET_H_GRC (((UINT) 0), opval); 3140 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3141 } 3142 3143#undef FLD 3144} 3145 NEXT (vpc); 3146 3147 CASE (sem, INSN_MOVL1_COMPACT) : /* mov.l $rm, @$rn */ 3148{ 3149 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3150 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3151#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3152 int UNUSED written = 0; 3153 IADDR UNUSED pc = abuf->addr; 3154 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3155 3156 { 3157 SI opval = GET_H_GRC (FLD (f_rm)); 3158 SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 3159 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3160 } 3161 3162#undef FLD 3163} 3164 NEXT (vpc); 3165 3166 CASE (sem, INSN_MOVL2_COMPACT) : /* mov.l $rm, @-$rn */ 3167{ 3168 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3169 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3170#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3171 int UNUSED written = 0; 3172 IADDR UNUSED pc = abuf->addr; 3173 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3174 3175{ 3176 SI tmp_addr; 3177 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 3178 { 3179 SI opval = GET_H_GRC (FLD (f_rm)); 3180 SETMEMSI (current_cpu, pc, tmp_addr, opval); 3181 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3182 } 3183 { 3184 SI opval = tmp_addr; 3185 SET_H_GRC (FLD (f_rn), opval); 3186 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3187 } 3188} 3189 3190#undef FLD 3191} 3192 NEXT (vpc); 3193 3194 CASE (sem, INSN_MOVL3_COMPACT) : /* mov.l $rm, @(r0, $rn) */ 3195{ 3196 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3197 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3198#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3199 int UNUSED written = 0; 3200 IADDR UNUSED pc = abuf->addr; 3201 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3202 3203 { 3204 SI opval = GET_H_GRC (FLD (f_rm)); 3205 SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); 3206 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3207 } 3208 3209#undef FLD 3210} 3211 NEXT (vpc); 3212 3213 CASE (sem, INSN_MOVL4_COMPACT) : /* mov.l r0, @($imm8x4, gbr) */ 3214{ 3215 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3216 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3217#define FLD(f) abuf->fields.sfmt_movl10_compact.f 3218 int UNUSED written = 0; 3219 IADDR UNUSED pc = abuf->addr; 3220 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3221 3222 { 3223 SI opval = GET_H_GRC (((UINT) 0)); 3224 SETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4)), opval); 3225 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3226 } 3227 3228#undef FLD 3229} 3230 NEXT (vpc); 3231 3232 CASE (sem, INSN_MOVL5_COMPACT) : /* mov.l $rm, @($imm4x4, $rn) */ 3233{ 3234 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3235 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3236#define FLD(f) abuf->fields.sfmt_movl5_compact.f 3237 int UNUSED written = 0; 3238 IADDR UNUSED pc = abuf->addr; 3239 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3240 3241 { 3242 SI opval = GET_H_GRC (FLD (f_rm)); 3243 SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm4x4)), opval); 3244 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3245 } 3246 3247#undef FLD 3248} 3249 NEXT (vpc); 3250 3251 CASE (sem, INSN_MOVL6_COMPACT) : /* mov.l @$rm, $rn */ 3252{ 3253 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3254 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3255#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3256 int UNUSED written = 0; 3257 IADDR UNUSED pc = abuf->addr; 3258 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3259 3260 { 3261 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 3262 SET_H_GRC (FLD (f_rn), opval); 3263 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3264 } 3265 3266#undef FLD 3267} 3268 NEXT (vpc); 3269 3270 CASE (sem, INSN_MOVL7_COMPACT) : /* mov.l @${rm}+, $rn */ 3271{ 3272 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3273 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3274#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3275 int UNUSED written = 0; 3276 IADDR UNUSED pc = abuf->addr; 3277 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3278 3279{ 3280 { 3281 SI opval = GETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 3282 SET_H_GRC (FLD (f_rn), opval); 3283 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3284 } 3285if (EQSI (FLD (f_rm), FLD (f_rn))) { 3286 { 3287 SI opval = GET_H_GRC (FLD (f_rn)); 3288 SET_H_GRC (FLD (f_rm), opval); 3289 written |= (1 << 5); 3290 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3291 } 3292} else { 3293 { 3294 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 4); 3295 SET_H_GRC (FLD (f_rm), opval); 3296 written |= (1 << 5); 3297 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3298 } 3299} 3300} 3301 3302 abuf->written = written; 3303#undef FLD 3304} 3305 NEXT (vpc); 3306 3307 CASE (sem, INSN_MOVL8_COMPACT) : /* mov.l @(r0, $rm), $rn */ 3308{ 3309 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3310 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3311#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3312 int UNUSED written = 0; 3313 IADDR UNUSED pc = abuf->addr; 3314 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3315 3316 { 3317 SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm)))); 3318 SET_H_GRC (FLD (f_rn), opval); 3319 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3320 } 3321 3322#undef FLD 3323} 3324 NEXT (vpc); 3325 3326 CASE (sem, INSN_MOVL9_COMPACT) : /* mov.l @($imm8x4, gbr), r0 */ 3327{ 3328 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3329 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3330#define FLD(f) abuf->fields.sfmt_movl10_compact.f 3331 int UNUSED written = 0; 3332 IADDR UNUSED pc = abuf->addr; 3333 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3334 3335 { 3336 SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x4))); 3337 SET_H_GRC (((UINT) 0), opval); 3338 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3339 } 3340 3341#undef FLD 3342} 3343 NEXT (vpc); 3344 3345 CASE (sem, INSN_MOVL10_COMPACT) : /* mov.l @($imm8x4, pc), $rn */ 3346{ 3347 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3348 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3349#define FLD(f) abuf->fields.sfmt_movl10_compact.f 3350 int UNUSED written = 0; 3351 IADDR UNUSED pc = abuf->addr; 3352 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3353 3354 { 3355 SI opval = GETMEMSI (current_cpu, pc, ADDSI (FLD (f_imm8x4), ANDDI (ADDDI (pc, 4), INVSI (3)))); 3356 SET_H_GRC (FLD (f_rn), opval); 3357 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3358 } 3359 3360#undef FLD 3361} 3362 NEXT (vpc); 3363 3364 CASE (sem, INSN_MOVL11_COMPACT) : /* mov.l @($imm4x4, $rm), $rn */ 3365{ 3366 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3367 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3368#define FLD(f) abuf->fields.sfmt_movl5_compact.f 3369 int UNUSED written = 0; 3370 IADDR UNUSED pc = abuf->addr; 3371 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3372 3373 { 3374 SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x4))); 3375 SET_H_GRC (FLD (f_rn), opval); 3376 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3377 } 3378 3379#undef FLD 3380} 3381 NEXT (vpc); 3382 3383 CASE (sem, INSN_MOVL12_COMPACT) : /* mov.l @($imm12x4, $rm), $rn */ 3384{ 3385 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3386 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3387#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3388 int UNUSED written = 0; 3389 IADDR UNUSED pc = abuf->addr; 3390 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3391 3392 { 3393 SI opval = GETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm12x4))); 3394 SET_H_GRC (FLD (f_rn), opval); 3395 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3396 } 3397 3398#undef FLD 3399} 3400 NEXT (vpc); 3401 3402 CASE (sem, INSN_MOVL13_COMPACT) : /* mov.l $rm, @($imm12x4, $rn) */ 3403{ 3404 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3405 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3406#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3407 int UNUSED written = 0; 3408 IADDR UNUSED pc = abuf->addr; 3409 vpc = SEM_NEXT_VPC (sem_arg, pc, 4); 3410 3411 { 3412 SI opval = GET_H_GRC (FLD (f_rm)); 3413 SETMEMSI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rn)), FLD (f_imm12x4)), opval); 3414 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3415 } 3416 3417#undef FLD 3418} 3419 NEXT (vpc); 3420 3421 CASE (sem, INSN_MOVW1_COMPACT) : /* mov.w $rm, @$rn */ 3422{ 3423 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3424 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3425#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3426 int UNUSED written = 0; 3427 IADDR UNUSED pc = abuf->addr; 3428 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3429 3430 { 3431 HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); 3432 SETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 3433 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3434 } 3435 3436#undef FLD 3437} 3438 NEXT (vpc); 3439 3440 CASE (sem, INSN_MOVW2_COMPACT) : /* mov.w $rm, @-$rn */ 3441{ 3442 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3443 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3444#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3445 int UNUSED written = 0; 3446 IADDR UNUSED pc = abuf->addr; 3447 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3448 3449{ 3450 DI tmp_addr; 3451 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 2); 3452 { 3453 HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); 3454 SETMEMHI (current_cpu, pc, tmp_addr, opval); 3455 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3456 } 3457 { 3458 SI opval = tmp_addr; 3459 SET_H_GRC (FLD (f_rn), opval); 3460 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3461 } 3462} 3463 3464#undef FLD 3465} 3466 NEXT (vpc); 3467 3468 CASE (sem, INSN_MOVW3_COMPACT) : /* mov.w $rm, @(r0, $rn) */ 3469{ 3470 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3471 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3472#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3473 int UNUSED written = 0; 3474 IADDR UNUSED pc = abuf->addr; 3475 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3476 3477 { 3478 HI opval = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1); 3479 SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rn))), opval); 3480 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3481 } 3482 3483#undef FLD 3484} 3485 NEXT (vpc); 3486 3487 CASE (sem, INSN_MOVW4_COMPACT) : /* mov.w r0, @($imm8x2, gbr) */ 3488{ 3489 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3490 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3491#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3492 int UNUSED written = 0; 3493 IADDR UNUSED pc = abuf->addr; 3494 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3495 3496 { 3497 HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); 3498 SETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)), opval); 3499 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3500 } 3501 3502#undef FLD 3503} 3504 NEXT (vpc); 3505 3506 CASE (sem, INSN_MOVW5_COMPACT) : /* mov.w r0, @($imm4x2, $rm) */ 3507{ 3508 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3509 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3510#define FLD(f) abuf->fields.sfmt_movw5_compact.f 3511 int UNUSED written = 0; 3512 IADDR UNUSED pc = abuf->addr; 3513 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3514 3515 { 3516 HI opval = SUBWORDSIHI (GET_H_GRC (((UINT) 0)), 1); 3517 SETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)), opval); 3518 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3519 } 3520 3521#undef FLD 3522} 3523 NEXT (vpc); 3524 3525 CASE (sem, INSN_MOVW6_COMPACT) : /* mov.w @$rm, $rn */ 3526{ 3527 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3528 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3529#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3530 int UNUSED written = 0; 3531 IADDR UNUSED pc = abuf->addr; 3532 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3533 3534 { 3535 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm)))); 3536 SET_H_GRC (FLD (f_rn), opval); 3537 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3538 } 3539 3540#undef FLD 3541} 3542 NEXT (vpc); 3543 3544 CASE (sem, INSN_MOVW7_COMPACT) : /* mov.w @${rm}+, $rn */ 3545{ 3546 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3547 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3548#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3549 int UNUSED written = 0; 3550 IADDR UNUSED pc = abuf->addr; 3551 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3552 3553{ 3554 HI tmp_data; 3555 tmp_data = GETMEMHI (current_cpu, pc, GET_H_GRC (FLD (f_rm))); 3556if (EQSI (FLD (f_rm), FLD (f_rn))) { 3557 { 3558 SI opval = EXTHISI (tmp_data); 3559 SET_H_GRC (FLD (f_rm), opval); 3560 written |= (1 << 4); 3561 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3562 } 3563} else { 3564 { 3565 SI opval = ADDSI (GET_H_GRC (FLD (f_rm)), 2); 3566 SET_H_GRC (FLD (f_rm), opval); 3567 written |= (1 << 4); 3568 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3569 } 3570} 3571 { 3572 SI opval = EXTHISI (tmp_data); 3573 SET_H_GRC (FLD (f_rn), opval); 3574 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3575 } 3576} 3577 3578 abuf->written = written; 3579#undef FLD 3580} 3581 NEXT (vpc); 3582 3583 CASE (sem, INSN_MOVW8_COMPACT) : /* mov.w @(r0, $rm), $rn */ 3584{ 3585 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3586 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3587#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3588 int UNUSED written = 0; 3589 IADDR UNUSED pc = abuf->addr; 3590 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3591 3592 { 3593 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GRC (FLD (f_rm))))); 3594 SET_H_GRC (FLD (f_rn), opval); 3595 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3596 } 3597 3598#undef FLD 3599} 3600 NEXT (vpc); 3601 3602 CASE (sem, INSN_MOVW9_COMPACT) : /* mov.w @($imm8x2, gbr), r0 */ 3603{ 3604 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3605 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3606#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3607 int UNUSED written = 0; 3608 IADDR UNUSED pc = abuf->addr; 3609 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3610 3611 { 3612 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GBR (), FLD (f_imm8x2)))); 3613 SET_H_GRC (((UINT) 0), opval); 3614 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3615 } 3616 3617#undef FLD 3618} 3619 NEXT (vpc); 3620 3621 CASE (sem, INSN_MOVW10_COMPACT) : /* mov.w @($imm8x2, pc), $rn */ 3622{ 3623 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3624 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3625#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3626 int UNUSED written = 0; 3627 IADDR UNUSED pc = abuf->addr; 3628 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3629 3630 { 3631 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDDI (ADDDI (pc, 4), FLD (f_imm8x2)))); 3632 SET_H_GRC (FLD (f_rn), opval); 3633 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3634 } 3635 3636#undef FLD 3637} 3638 NEXT (vpc); 3639 3640 CASE (sem, INSN_MOVW11_COMPACT) : /* mov.w @($imm4x2, $rm), r0 */ 3641{ 3642 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3643 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3644#define FLD(f) abuf->fields.sfmt_movw5_compact.f 3645 int UNUSED written = 0; 3646 IADDR UNUSED pc = abuf->addr; 3647 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3648 3649 { 3650 SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (GET_H_GRC (FLD (f_rm)), FLD (f_imm4x2)))); 3651 SET_H_GRC (((UINT) 0), opval); 3652 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3653 } 3654 3655#undef FLD 3656} 3657 NEXT (vpc); 3658 3659 CASE (sem, INSN_MOVA_COMPACT) : /* mova @($imm8x4, pc), r0 */ 3660{ 3661 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3662 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3663#define FLD(f) abuf->fields.sfmt_movl10_compact.f 3664 int UNUSED written = 0; 3665 IADDR UNUSED pc = abuf->addr; 3666 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3667 3668 { 3669 SI opval = ADDDI (ANDDI (ADDDI (pc, 4), INVSI (3)), FLD (f_imm8x4)); 3670 SET_H_GRC (((UINT) 0), opval); 3671 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3672 } 3673 3674#undef FLD 3675} 3676 NEXT (vpc); 3677 3678 CASE (sem, INSN_MOVCAL_COMPACT) : /* movca.l r0, @$rn */ 3679{ 3680 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3681 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3682#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3683 int UNUSED written = 0; 3684 IADDR UNUSED pc = abuf->addr; 3685 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3686 3687 { 3688 SI opval = GET_H_GRC (((UINT) 0)); 3689 SETMEMSI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 3690 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 3691 } 3692 3693#undef FLD 3694} 3695 NEXT (vpc); 3696 3697 CASE (sem, INSN_MOVCOL_COMPACT) : /* movco.l r0, @$rn */ 3698{ 3699 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3700 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3701#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3702 int UNUSED written = 0; 3703 IADDR UNUSED pc = abuf->addr; 3704 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3705 3706 { 3707 SI opval = GET_H_GRC (FLD (f_rn)); 3708 SET_H_GRC (FLD (f_rn), opval); 3709 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3710 } 3711 3712#undef FLD 3713} 3714 NEXT (vpc); 3715 3716 CASE (sem, INSN_MOVT_COMPACT) : /* movt $rn */ 3717{ 3718 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3719 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3720#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3721 int UNUSED written = 0; 3722 IADDR UNUSED pc = abuf->addr; 3723 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3724 3725 { 3726 SI opval = ZEXTBISI (GET_H_TBIT ()); 3727 SET_H_GRC (FLD (f_rn), opval); 3728 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3729 } 3730 3731#undef FLD 3732} 3733 NEXT (vpc); 3734 3735 CASE (sem, INSN_MOVUAL_COMPACT) : /* movua.l @$rn, r0 */ 3736{ 3737 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3738 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3739#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3740 int UNUSED written = 0; 3741 IADDR UNUSED pc = abuf->addr; 3742 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3743 3744 { 3745 SI opval = sh64_movua (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 3746 SET_H_GRC (((UINT) 0), opval); 3747 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3748 } 3749 3750#undef FLD 3751} 3752 NEXT (vpc); 3753 3754 CASE (sem, INSN_MOVUAL2_COMPACT) : /* movua.l @$rn+, r0 */ 3755{ 3756 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3757 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3758#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3759 int UNUSED written = 0; 3760 IADDR UNUSED pc = abuf->addr; 3761 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3762 3763{ 3764 { 3765 SI opval = sh64_movua (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 3766 SET_H_GRC (((UINT) 0), opval); 3767 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3768 } 3769 { 3770 SI opval = ADDSI (GET_H_GRC (FLD (f_rn)), 4); 3771 SET_H_GRC (FLD (f_rn), opval); 3772 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3773 } 3774} 3775 3776#undef FLD 3777} 3778 NEXT (vpc); 3779 3780 CASE (sem, INSN_MULL_COMPACT) : /* mul.l $rm, $rn */ 3781{ 3782 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3783 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3784#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3785 int UNUSED written = 0; 3786 IADDR UNUSED pc = abuf->addr; 3787 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3788 3789 { 3790 SI opval = MULSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))); 3791 SET_H_MACL (opval); 3792 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 3793 } 3794 3795#undef FLD 3796} 3797 NEXT (vpc); 3798 3799 CASE (sem, INSN_MULSW_COMPACT) : /* muls.w $rm, $rn */ 3800{ 3801 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3802 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3803#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3804 int UNUSED written = 0; 3805 IADDR UNUSED pc = abuf->addr; 3806 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3807 3808 { 3809 SI opval = MULSI (EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), EXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); 3810 SET_H_MACL (opval); 3811 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 3812 } 3813 3814#undef FLD 3815} 3816 NEXT (vpc); 3817 3818 CASE (sem, INSN_MULUW_COMPACT) : /* mulu.w $rm, $rn */ 3819{ 3820 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3821 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3822#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3823 int UNUSED written = 0; 3824 IADDR UNUSED pc = abuf->addr; 3825 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3826 3827 { 3828 SI opval = MULSI (ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 1)), ZEXTHISI (SUBWORDSIHI (GET_H_GRC (FLD (f_rn)), 1))); 3829 SET_H_MACL (opval); 3830 TRACE_RESULT (current_cpu, abuf, "macl", 'x', opval); 3831 } 3832 3833#undef FLD 3834} 3835 NEXT (vpc); 3836 3837 CASE (sem, INSN_NEG_COMPACT) : /* neg $rm, $rn */ 3838{ 3839 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3840 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3841#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3842 int UNUSED written = 0; 3843 IADDR UNUSED pc = abuf->addr; 3844 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3845 3846 { 3847 SI opval = NEGSI (GET_H_GRC (FLD (f_rm))); 3848 SET_H_GRC (FLD (f_rn), opval); 3849 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3850 } 3851 3852#undef FLD 3853} 3854 NEXT (vpc); 3855 3856 CASE (sem, INSN_NEGC_COMPACT) : /* negc $rm, $rn */ 3857{ 3858 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3859 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3860#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3861 int UNUSED written = 0; 3862 IADDR UNUSED pc = abuf->addr; 3863 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3864 3865{ 3866 BI tmp_flag; 3867 tmp_flag = SUBCFSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); 3868 { 3869 SI opval = SUBCSI (0, GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); 3870 SET_H_GRC (FLD (f_rn), opval); 3871 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3872 } 3873 { 3874 BI opval = tmp_flag; 3875 SET_H_TBIT (opval); 3876 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 3877 } 3878} 3879 3880#undef FLD 3881} 3882 NEXT (vpc); 3883 3884 CASE (sem, INSN_NOP_COMPACT) : /* nop */ 3885{ 3886 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3887 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3888#define FLD(f) abuf->fields.fmt_empty.f 3889 int UNUSED written = 0; 3890 IADDR UNUSED pc = abuf->addr; 3891 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3892 3893((void) 0); /*nop*/ 3894 3895#undef FLD 3896} 3897 NEXT (vpc); 3898 3899 CASE (sem, INSN_NOT_COMPACT) : /* not $rm64, $rn64 */ 3900{ 3901 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3902 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3903#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3904 int UNUSED written = 0; 3905 IADDR UNUSED pc = abuf->addr; 3906 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3907 3908 { 3909 DI opval = INVDI (GET_H_GR (FLD (f_rm))); 3910 SET_H_GR (FLD (f_rn), opval); 3911 TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); 3912 } 3913 3914#undef FLD 3915} 3916 NEXT (vpc); 3917 3918 CASE (sem, INSN_OCBI_COMPACT) : /* ocbi @$rn */ 3919{ 3920 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3921 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3922#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3923 int UNUSED written = 0; 3924 IADDR UNUSED pc = abuf->addr; 3925 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3926 3927{ 3928 { 3929 SI opval = GET_H_GRC (FLD (f_rn)); 3930 SET_H_GRC (FLD (f_rn), opval); 3931 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3932 } 3933((void) 0); /*nop*/ 3934} 3935 3936#undef FLD 3937} 3938 NEXT (vpc); 3939 3940 CASE (sem, INSN_OCBP_COMPACT) : /* ocbp @$rn */ 3941{ 3942 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3943 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3944#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3945 int UNUSED written = 0; 3946 IADDR UNUSED pc = abuf->addr; 3947 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3948 3949{ 3950 { 3951 SI opval = GET_H_GRC (FLD (f_rn)); 3952 SET_H_GRC (FLD (f_rn), opval); 3953 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3954 } 3955((void) 0); /*nop*/ 3956} 3957 3958#undef FLD 3959} 3960 NEXT (vpc); 3961 3962 CASE (sem, INSN_OCBWB_COMPACT) : /* ocbwb @$rn */ 3963{ 3964 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3965 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3966#define FLD(f) abuf->fields.sfmt_movw10_compact.f 3967 int UNUSED written = 0; 3968 IADDR UNUSED pc = abuf->addr; 3969 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3970 3971{ 3972 { 3973 SI opval = GET_H_GRC (FLD (f_rn)); 3974 SET_H_GRC (FLD (f_rn), opval); 3975 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 3976 } 3977((void) 0); /*nop*/ 3978} 3979 3980#undef FLD 3981} 3982 NEXT (vpc); 3983 3984 CASE (sem, INSN_OR_COMPACT) : /* or $rm64, $rn64 */ 3985{ 3986 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 3987 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 3988#define FLD(f) abuf->fields.sfmt_movl12_compact.f 3989 int UNUSED written = 0; 3990 IADDR UNUSED pc = abuf->addr; 3991 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 3992 3993 { 3994 DI opval = ORDI (GET_H_GR (FLD (f_rm)), GET_H_GR (FLD (f_rn))); 3995 SET_H_GR (FLD (f_rn), opval); 3996 TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); 3997 } 3998 3999#undef FLD 4000} 4001 NEXT (vpc); 4002 4003 CASE (sem, INSN_ORI_COMPACT) : /* or #$uimm8, r0 */ 4004{ 4005 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4006 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4007#define FLD(f) abuf->fields.sfmt_addi_compact.f 4008 int UNUSED written = 0; 4009 IADDR UNUSED pc = abuf->addr; 4010 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4011 4012 { 4013 SI opval = ORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); 4014 SET_H_GRC (((UINT) 0), opval); 4015 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4016 } 4017 4018#undef FLD 4019} 4020 NEXT (vpc); 4021 4022 CASE (sem, INSN_ORB_COMPACT) : /* or.b #$imm8, @(r0, gbr) */ 4023{ 4024 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4025 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4026#define FLD(f) abuf->fields.sfmt_addi_compact.f 4027 int UNUSED written = 0; 4028 IADDR UNUSED pc = abuf->addr; 4029 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4030 4031{ 4032 DI tmp_addr; 4033 UQI tmp_data; 4034 tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); 4035 tmp_data = ORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); 4036 { 4037 UQI opval = tmp_data; 4038 SETMEMUQI (current_cpu, pc, tmp_addr, opval); 4039 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4040 } 4041} 4042 4043#undef FLD 4044} 4045 NEXT (vpc); 4046 4047 CASE (sem, INSN_PREF_COMPACT) : /* pref @$rn */ 4048{ 4049 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4050 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4051#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4052 int UNUSED written = 0; 4053 IADDR UNUSED pc = abuf->addr; 4054 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4055 4056sh64_pref (current_cpu, GET_H_GRC (FLD (f_rn))); 4057 4058#undef FLD 4059} 4060 NEXT (vpc); 4061 4062 CASE (sem, INSN_ROTCL_COMPACT) : /* rotcl $rn */ 4063{ 4064 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4065 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4066#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4067 int UNUSED written = 0; 4068 IADDR UNUSED pc = abuf->addr; 4069 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4070 4071{ 4072 BI tmp_temp; 4073 tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); 4074 { 4075 SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), GET_H_TBIT ()); 4076 SET_H_GRC (FLD (f_rn), opval); 4077 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4078 } 4079 { 4080 BI opval = ((tmp_temp) ? (1) : (0)); 4081 SET_H_TBIT (opval); 4082 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4083 } 4084} 4085 4086#undef FLD 4087} 4088 NEXT (vpc); 4089 4090 CASE (sem, INSN_ROTCR_COMPACT) : /* rotcr $rn */ 4091{ 4092 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4093 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4094#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4095 int UNUSED written = 0; 4096 IADDR UNUSED pc = abuf->addr; 4097 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4098 4099{ 4100 BI tmp_lsbit; 4101 SI tmp_temp; 4102 tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); 4103 tmp_temp = GET_H_TBIT (); 4104 { 4105 SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); 4106 SET_H_GRC (FLD (f_rn), opval); 4107 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4108 } 4109 { 4110 BI opval = ((tmp_lsbit) ? (1) : (0)); 4111 SET_H_TBIT (opval); 4112 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4113 } 4114} 4115 4116#undef FLD 4117} 4118 NEXT (vpc); 4119 4120 CASE (sem, INSN_ROTL_COMPACT) : /* rotl $rn */ 4121{ 4122 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4123 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4124#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4125 int UNUSED written = 0; 4126 IADDR UNUSED pc = abuf->addr; 4127 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4128 4129{ 4130 BI tmp_temp; 4131 tmp_temp = SRLSI (GET_H_GRC (FLD (f_rn)), 31); 4132 { 4133 SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rn)), 1), tmp_temp); 4134 SET_H_GRC (FLD (f_rn), opval); 4135 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4136 } 4137 { 4138 BI opval = ((tmp_temp) ? (1) : (0)); 4139 SET_H_TBIT (opval); 4140 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4141 } 4142} 4143 4144#undef FLD 4145} 4146 NEXT (vpc); 4147 4148 CASE (sem, INSN_ROTR_COMPACT) : /* rotr $rn */ 4149{ 4150 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4151 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4152#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4153 int UNUSED written = 0; 4154 IADDR UNUSED pc = abuf->addr; 4155 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4156 4157{ 4158 BI tmp_lsbit; 4159 SI tmp_temp; 4160 tmp_lsbit = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rn)), 1), 0)) ? (0) : (1)); 4161 tmp_temp = tmp_lsbit; 4162 { 4163 SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rn)), 1), SLLSI (tmp_temp, 31)); 4164 SET_H_GRC (FLD (f_rn), opval); 4165 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4166 } 4167 { 4168 BI opval = ((tmp_lsbit) ? (1) : (0)); 4169 SET_H_TBIT (opval); 4170 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4171 } 4172} 4173 4174#undef FLD 4175} 4176 NEXT (vpc); 4177 4178 CASE (sem, INSN_RTS_COMPACT) : /* rts */ 4179{ 4180 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4181 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4182#define FLD(f) abuf->fields.fmt_empty.f 4183 int UNUSED written = 0; 4184 IADDR UNUSED pc = abuf->addr; 4185 SEM_BRANCH_INIT 4186 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4187 4188{ 4189 { 4190 UDI opval = ADDDI (pc, 2); 4191 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 4192 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 4193 } 4194((void) 0); /*nop*/ 4195{ 4196 { 4197 UDI opval = GET_H_PR (); 4198 SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc); 4199 TRACE_RESULT (current_cpu, abuf, "pc", 'D', opval); 4200 } 4201} 4202((void) 0); /*nop*/ 4203} 4204 4205 SEM_BRANCH_FINI (vpc); 4206#undef FLD 4207} 4208 NEXT (vpc); 4209 4210 CASE (sem, INSN_SETS_COMPACT) : /* sets */ 4211{ 4212 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4213 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4214#define FLD(f) abuf->fields.fmt_empty.f 4215 int UNUSED written = 0; 4216 IADDR UNUSED pc = abuf->addr; 4217 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4218 4219 { 4220 BI opval = 1; 4221 SET_H_SBIT (opval); 4222 TRACE_RESULT (current_cpu, abuf, "sbit", 'x', opval); 4223 } 4224 4225#undef FLD 4226} 4227 NEXT (vpc); 4228 4229 CASE (sem, INSN_SETT_COMPACT) : /* sett */ 4230{ 4231 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4232 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4233#define FLD(f) abuf->fields.fmt_empty.f 4234 int UNUSED written = 0; 4235 IADDR UNUSED pc = abuf->addr; 4236 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4237 4238 { 4239 BI opval = 1; 4240 SET_H_TBIT (opval); 4241 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4242 } 4243 4244#undef FLD 4245} 4246 NEXT (vpc); 4247 4248 CASE (sem, INSN_SHAD_COMPACT) : /* shad $rm, $rn */ 4249{ 4250 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4251 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4252#define FLD(f) abuf->fields.sfmt_movl12_compact.f 4253 int UNUSED written = 0; 4254 IADDR UNUSED pc = abuf->addr; 4255 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4256 4257{ 4258 SI tmp_shamt; 4259 tmp_shamt = ANDSI (GET_H_GRC (FLD (f_rm)), 31); 4260if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { 4261 { 4262 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); 4263 SET_H_GRC (FLD (f_rn), opval); 4264 written |= (1 << 2); 4265 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4266 } 4267} else { 4268if (NESI (tmp_shamt, 0)) { 4269 { 4270 SI opval = SRASI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); 4271 SET_H_GRC (FLD (f_rn), opval); 4272 written |= (1 << 2); 4273 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4274 } 4275} else { 4276if (LTSI (GET_H_GRC (FLD (f_rn)), 0)) { 4277 { 4278 SI opval = NEGSI (1); 4279 SET_H_GRC (FLD (f_rn), opval); 4280 written |= (1 << 2); 4281 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4282 } 4283} else { 4284 { 4285 SI opval = 0; 4286 SET_H_GRC (FLD (f_rn), opval); 4287 written |= (1 << 2); 4288 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4289 } 4290} 4291} 4292} 4293} 4294 4295 abuf->written = written; 4296#undef FLD 4297} 4298 NEXT (vpc); 4299 4300 CASE (sem, INSN_SHAL_COMPACT) : /* shal $rn */ 4301{ 4302 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4303 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4304#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4305 int UNUSED written = 0; 4306 IADDR UNUSED pc = abuf->addr; 4307 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4308 4309{ 4310 BI tmp_t; 4311 tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); 4312 { 4313 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); 4314 SET_H_GRC (FLD (f_rn), opval); 4315 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4316 } 4317 { 4318 BI opval = ((tmp_t) ? (1) : (0)); 4319 SET_H_TBIT (opval); 4320 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4321 } 4322} 4323 4324#undef FLD 4325} 4326 NEXT (vpc); 4327 4328 CASE (sem, INSN_SHAR_COMPACT) : /* shar $rn */ 4329{ 4330 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4331 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4332#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4333 int UNUSED written = 0; 4334 IADDR UNUSED pc = abuf->addr; 4335 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4336 4337{ 4338 BI tmp_t; 4339 tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); 4340 { 4341 SI opval = SRASI (GET_H_GRC (FLD (f_rn)), 1); 4342 SET_H_GRC (FLD (f_rn), opval); 4343 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4344 } 4345 { 4346 BI opval = ((tmp_t) ? (1) : (0)); 4347 SET_H_TBIT (opval); 4348 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4349 } 4350} 4351 4352#undef FLD 4353} 4354 NEXT (vpc); 4355 4356 CASE (sem, INSN_SHLD_COMPACT) : /* shld $rm, $rn */ 4357{ 4358 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4359 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4360#define FLD(f) abuf->fields.sfmt_movl12_compact.f 4361 int UNUSED written = 0; 4362 IADDR UNUSED pc = abuf->addr; 4363 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4364 4365{ 4366 SI tmp_shamt; 4367 tmp_shamt = ANDSI (GET_H_GRC (FLD (f_rm)), 31); 4368if (GESI (GET_H_GRC (FLD (f_rm)), 0)) { 4369 { 4370 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), tmp_shamt); 4371 SET_H_GRC (FLD (f_rn), opval); 4372 written |= (1 << 2); 4373 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4374 } 4375} else { 4376if (NESI (tmp_shamt, 0)) { 4377 { 4378 SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), SUBSI (32, tmp_shamt)); 4379 SET_H_GRC (FLD (f_rn), opval); 4380 written |= (1 << 2); 4381 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4382 } 4383} else { 4384 { 4385 SI opval = 0; 4386 SET_H_GRC (FLD (f_rn), opval); 4387 written |= (1 << 2); 4388 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4389 } 4390} 4391} 4392} 4393 4394 abuf->written = written; 4395#undef FLD 4396} 4397 NEXT (vpc); 4398 4399 CASE (sem, INSN_SHLL_COMPACT) : /* shll $rn */ 4400{ 4401 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4402 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4403#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4404 int UNUSED written = 0; 4405 IADDR UNUSED pc = abuf->addr; 4406 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4407 4408{ 4409 BI tmp_t; 4410 tmp_t = SRLSI (GET_H_GRC (FLD (f_rn)), 31); 4411 { 4412 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 1); 4413 SET_H_GRC (FLD (f_rn), opval); 4414 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4415 } 4416 { 4417 BI opval = ((tmp_t) ? (1) : (0)); 4418 SET_H_TBIT (opval); 4419 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4420 } 4421} 4422 4423#undef FLD 4424} 4425 NEXT (vpc); 4426 4427 CASE (sem, INSN_SHLL2_COMPACT) : /* shll2 $rn */ 4428{ 4429 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4430 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4431#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4432 int UNUSED written = 0; 4433 IADDR UNUSED pc = abuf->addr; 4434 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4435 4436 { 4437 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 2); 4438 SET_H_GRC (FLD (f_rn), opval); 4439 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4440 } 4441 4442#undef FLD 4443} 4444 NEXT (vpc); 4445 4446 CASE (sem, INSN_SHLL8_COMPACT) : /* shll8 $rn */ 4447{ 4448 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4449 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4450#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4451 int UNUSED written = 0; 4452 IADDR UNUSED pc = abuf->addr; 4453 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4454 4455 { 4456 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 8); 4457 SET_H_GRC (FLD (f_rn), opval); 4458 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4459 } 4460 4461#undef FLD 4462} 4463 NEXT (vpc); 4464 4465 CASE (sem, INSN_SHLL16_COMPACT) : /* shll16 $rn */ 4466{ 4467 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4468 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4469#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4470 int UNUSED written = 0; 4471 IADDR UNUSED pc = abuf->addr; 4472 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4473 4474 { 4475 SI opval = SLLSI (GET_H_GRC (FLD (f_rn)), 16); 4476 SET_H_GRC (FLD (f_rn), opval); 4477 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4478 } 4479 4480#undef FLD 4481} 4482 NEXT (vpc); 4483 4484 CASE (sem, INSN_SHLR_COMPACT) : /* shlr $rn */ 4485{ 4486 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4487 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4488#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4489 int UNUSED written = 0; 4490 IADDR UNUSED pc = abuf->addr; 4491 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4492 4493{ 4494 BI tmp_t; 4495 tmp_t = ANDSI (GET_H_GRC (FLD (f_rn)), 1); 4496 { 4497 SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 1); 4498 SET_H_GRC (FLD (f_rn), opval); 4499 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4500 } 4501 { 4502 BI opval = ((tmp_t) ? (1) : (0)); 4503 SET_H_TBIT (opval); 4504 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4505 } 4506} 4507 4508#undef FLD 4509} 4510 NEXT (vpc); 4511 4512 CASE (sem, INSN_SHLR2_COMPACT) : /* shlr2 $rn */ 4513{ 4514 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4515 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4516#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4517 int UNUSED written = 0; 4518 IADDR UNUSED pc = abuf->addr; 4519 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4520 4521 { 4522 SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 2); 4523 SET_H_GRC (FLD (f_rn), opval); 4524 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4525 } 4526 4527#undef FLD 4528} 4529 NEXT (vpc); 4530 4531 CASE (sem, INSN_SHLR8_COMPACT) : /* shlr8 $rn */ 4532{ 4533 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4534 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4535#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4536 int UNUSED written = 0; 4537 IADDR UNUSED pc = abuf->addr; 4538 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4539 4540 { 4541 SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 8); 4542 SET_H_GRC (FLD (f_rn), opval); 4543 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4544 } 4545 4546#undef FLD 4547} 4548 NEXT (vpc); 4549 4550 CASE (sem, INSN_SHLR16_COMPACT) : /* shlr16 $rn */ 4551{ 4552 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4553 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4554#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4555 int UNUSED written = 0; 4556 IADDR UNUSED pc = abuf->addr; 4557 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4558 4559 { 4560 SI opval = SRLSI (GET_H_GRC (FLD (f_rn)), 16); 4561 SET_H_GRC (FLD (f_rn), opval); 4562 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4563 } 4564 4565#undef FLD 4566} 4567 NEXT (vpc); 4568 4569 CASE (sem, INSN_STC_GBR_COMPACT) : /* stc gbr, $rn */ 4570{ 4571 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4572 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4573#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4574 int UNUSED written = 0; 4575 IADDR UNUSED pc = abuf->addr; 4576 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4577 4578 { 4579 SI opval = GET_H_GBR (); 4580 SET_H_GRC (FLD (f_rn), opval); 4581 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4582 } 4583 4584#undef FLD 4585} 4586 NEXT (vpc); 4587 4588 CASE (sem, INSN_STC_VBR_COMPACT) : /* stc vbr, $rn */ 4589{ 4590 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4591 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4592#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4593 int UNUSED written = 0; 4594 IADDR UNUSED pc = abuf->addr; 4595 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4596 4597 { 4598 SI opval = GET_H_VBR (); 4599 SET_H_GRC (FLD (f_rn), opval); 4600 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4601 } 4602 4603#undef FLD 4604} 4605 NEXT (vpc); 4606 4607 CASE (sem, INSN_STCL_GBR_COMPACT) : /* stc.l gbr, @-$rn */ 4608{ 4609 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4610 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4611#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4612 int UNUSED written = 0; 4613 IADDR UNUSED pc = abuf->addr; 4614 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4615 4616{ 4617 DI tmp_addr; 4618 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4619 { 4620 SI opval = GET_H_GBR (); 4621 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4622 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4623 } 4624 { 4625 SI opval = tmp_addr; 4626 SET_H_GRC (FLD (f_rn), opval); 4627 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4628 } 4629} 4630 4631#undef FLD 4632} 4633 NEXT (vpc); 4634 4635 CASE (sem, INSN_STCL_VBR_COMPACT) : /* stc.l vbr, @-$rn */ 4636{ 4637 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4638 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4639#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4640 int UNUSED written = 0; 4641 IADDR UNUSED pc = abuf->addr; 4642 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4643 4644{ 4645 DI tmp_addr; 4646 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4647 { 4648 SI opval = GET_H_VBR (); 4649 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4650 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4651 } 4652 { 4653 SI opval = tmp_addr; 4654 SET_H_GRC (FLD (f_rn), opval); 4655 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4656 } 4657} 4658 4659#undef FLD 4660} 4661 NEXT (vpc); 4662 4663 CASE (sem, INSN_STS_FPSCR_COMPACT) : /* sts fpscr, $rn */ 4664{ 4665 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4666 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4667#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4668 int UNUSED written = 0; 4669 IADDR UNUSED pc = abuf->addr; 4670 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4671 4672 { 4673 SI opval = CPU (h_fpscr); 4674 SET_H_GRC (FLD (f_rn), opval); 4675 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4676 } 4677 4678#undef FLD 4679} 4680 NEXT (vpc); 4681 4682 CASE (sem, INSN_STSL_FPSCR_COMPACT) : /* sts.l fpscr, @-$rn */ 4683{ 4684 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4685 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4686#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4687 int UNUSED written = 0; 4688 IADDR UNUSED pc = abuf->addr; 4689 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4690 4691{ 4692 DI tmp_addr; 4693 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4694 { 4695 SI opval = CPU (h_fpscr); 4696 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4697 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4698 } 4699 { 4700 SI opval = tmp_addr; 4701 SET_H_GRC (FLD (f_rn), opval); 4702 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4703 } 4704} 4705 4706#undef FLD 4707} 4708 NEXT (vpc); 4709 4710 CASE (sem, INSN_STS_FPUL_COMPACT) : /* sts fpul, $rn */ 4711{ 4712 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4713 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4714#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4715 int UNUSED written = 0; 4716 IADDR UNUSED pc = abuf->addr; 4717 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4718 4719 { 4720 SI opval = SUBWORDSFSI (CPU (h_fr[((UINT) 32)])); 4721 SET_H_GRC (FLD (f_rn), opval); 4722 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4723 } 4724 4725#undef FLD 4726} 4727 NEXT (vpc); 4728 4729 CASE (sem, INSN_STSL_FPUL_COMPACT) : /* sts.l fpul, @-$rn */ 4730{ 4731 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4732 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4733#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4734 int UNUSED written = 0; 4735 IADDR UNUSED pc = abuf->addr; 4736 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4737 4738{ 4739 DI tmp_addr; 4740 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4741 { 4742 SF opval = CPU (h_fr[((UINT) 32)]); 4743 SETMEMSF (current_cpu, pc, tmp_addr, opval); 4744 TRACE_RESULT (current_cpu, abuf, "memory", 'f', opval); 4745 } 4746 { 4747 SI opval = tmp_addr; 4748 SET_H_GRC (FLD (f_rn), opval); 4749 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4750 } 4751} 4752 4753#undef FLD 4754} 4755 NEXT (vpc); 4756 4757 CASE (sem, INSN_STS_MACH_COMPACT) : /* sts mach, $rn */ 4758{ 4759 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4760 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4761#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4762 int UNUSED written = 0; 4763 IADDR UNUSED pc = abuf->addr; 4764 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4765 4766 { 4767 SI opval = GET_H_MACH (); 4768 SET_H_GRC (FLD (f_rn), opval); 4769 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4770 } 4771 4772#undef FLD 4773} 4774 NEXT (vpc); 4775 4776 CASE (sem, INSN_STSL_MACH_COMPACT) : /* sts.l mach, @-$rn */ 4777{ 4778 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4779 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4780#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4781 int UNUSED written = 0; 4782 IADDR UNUSED pc = abuf->addr; 4783 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4784 4785{ 4786 DI tmp_addr; 4787 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4788 { 4789 SI opval = GET_H_MACH (); 4790 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4791 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4792 } 4793 { 4794 SI opval = tmp_addr; 4795 SET_H_GRC (FLD (f_rn), opval); 4796 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4797 } 4798} 4799 4800#undef FLD 4801} 4802 NEXT (vpc); 4803 4804 CASE (sem, INSN_STS_MACL_COMPACT) : /* sts macl, $rn */ 4805{ 4806 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4807 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4808#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4809 int UNUSED written = 0; 4810 IADDR UNUSED pc = abuf->addr; 4811 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4812 4813 { 4814 SI opval = GET_H_MACL (); 4815 SET_H_GRC (FLD (f_rn), opval); 4816 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4817 } 4818 4819#undef FLD 4820} 4821 NEXT (vpc); 4822 4823 CASE (sem, INSN_STSL_MACL_COMPACT) : /* sts.l macl, @-$rn */ 4824{ 4825 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4826 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4827#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4828 int UNUSED written = 0; 4829 IADDR UNUSED pc = abuf->addr; 4830 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4831 4832{ 4833 DI tmp_addr; 4834 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4835 { 4836 SI opval = GET_H_MACL (); 4837 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4838 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4839 } 4840 { 4841 SI opval = tmp_addr; 4842 SET_H_GRC (FLD (f_rn), opval); 4843 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4844 } 4845} 4846 4847#undef FLD 4848} 4849 NEXT (vpc); 4850 4851 CASE (sem, INSN_STS_PR_COMPACT) : /* sts pr, $rn */ 4852{ 4853 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4854 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4855#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4856 int UNUSED written = 0; 4857 IADDR UNUSED pc = abuf->addr; 4858 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4859 4860 { 4861 SI opval = GET_H_PR (); 4862 SET_H_GRC (FLD (f_rn), opval); 4863 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4864 } 4865 4866#undef FLD 4867} 4868 NEXT (vpc); 4869 4870 CASE (sem, INSN_STSL_PR_COMPACT) : /* sts.l pr, @-$rn */ 4871{ 4872 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4873 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4874#define FLD(f) abuf->fields.sfmt_movw10_compact.f 4875 int UNUSED written = 0; 4876 IADDR UNUSED pc = abuf->addr; 4877 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4878 4879{ 4880 DI tmp_addr; 4881 tmp_addr = SUBSI (GET_H_GRC (FLD (f_rn)), 4); 4882 { 4883 SI opval = GET_H_PR (); 4884 SETMEMSI (current_cpu, pc, tmp_addr, opval); 4885 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 4886 } 4887 { 4888 SI opval = tmp_addr; 4889 SET_H_GRC (FLD (f_rn), opval); 4890 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4891 } 4892} 4893 4894#undef FLD 4895} 4896 NEXT (vpc); 4897 4898 CASE (sem, INSN_SUB_COMPACT) : /* sub $rm, $rn */ 4899{ 4900 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4901 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4902#define FLD(f) abuf->fields.sfmt_movl12_compact.f 4903 int UNUSED written = 0; 4904 IADDR UNUSED pc = abuf->addr; 4905 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4906 4907 { 4908 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 4909 SET_H_GRC (FLD (f_rn), opval); 4910 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4911 } 4912 4913#undef FLD 4914} 4915 NEXT (vpc); 4916 4917 CASE (sem, INSN_SUBC_COMPACT) : /* subc $rm, $rn */ 4918{ 4919 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4920 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4921#define FLD(f) abuf->fields.sfmt_movl12_compact.f 4922 int UNUSED written = 0; 4923 IADDR UNUSED pc = abuf->addr; 4924 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4925 4926{ 4927 BI tmp_flag; 4928 tmp_flag = SUBCFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); 4929 { 4930 SI opval = SUBCSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), GET_H_TBIT ()); 4931 SET_H_GRC (FLD (f_rn), opval); 4932 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4933 } 4934 { 4935 BI opval = tmp_flag; 4936 SET_H_TBIT (opval); 4937 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4938 } 4939} 4940 4941#undef FLD 4942} 4943 NEXT (vpc); 4944 4945 CASE (sem, INSN_SUBV_COMPACT) : /* subv $rm, $rn */ 4946{ 4947 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4948 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4949#define FLD(f) abuf->fields.sfmt_movl12_compact.f 4950 int UNUSED written = 0; 4951 IADDR UNUSED pc = abuf->addr; 4952 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4953 4954{ 4955 BI tmp_t; 4956 tmp_t = SUBOFSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm)), 0); 4957 { 4958 SI opval = SUBSI (GET_H_GRC (FLD (f_rn)), GET_H_GRC (FLD (f_rm))); 4959 SET_H_GRC (FLD (f_rn), opval); 4960 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4961 } 4962 { 4963 BI opval = ((tmp_t) ? (1) : (0)); 4964 SET_H_TBIT (opval); 4965 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 4966 } 4967} 4968 4969#undef FLD 4970} 4971 NEXT (vpc); 4972 4973 CASE (sem, INSN_SWAPB_COMPACT) : /* swap.b $rm, $rn */ 4974{ 4975 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 4976 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 4977#define FLD(f) abuf->fields.sfmt_movl12_compact.f 4978 int UNUSED written = 0; 4979 IADDR UNUSED pc = abuf->addr; 4980 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 4981 4982{ 4983 UHI tmp_top_half; 4984 UQI tmp_byte1; 4985 UQI tmp_byte0; 4986 tmp_top_half = SUBWORDSIHI (GET_H_GRC (FLD (f_rm)), 0); 4987 tmp_byte1 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 2); 4988 tmp_byte0 = SUBWORDSIQI (GET_H_GRC (FLD (f_rm)), 3); 4989 { 4990 SI opval = ORSI (SLLSI (tmp_top_half, 16), ORSI (SLLSI (tmp_byte0, 8), tmp_byte1)); 4991 SET_H_GRC (FLD (f_rn), opval); 4992 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 4993 } 4994} 4995 4996#undef FLD 4997} 4998 NEXT (vpc); 4999 5000 CASE (sem, INSN_SWAPW_COMPACT) : /* swap.w $rm, $rn */ 5001{ 5002 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5003 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5004#define FLD(f) abuf->fields.sfmt_movl12_compact.f 5005 int UNUSED written = 0; 5006 IADDR UNUSED pc = abuf->addr; 5007 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5008 5009 { 5010 SI opval = ORSI (SRLSI (GET_H_GRC (FLD (f_rm)), 16), SLLSI (GET_H_GRC (FLD (f_rm)), 16)); 5011 SET_H_GRC (FLD (f_rn), opval); 5012 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 5013 } 5014 5015#undef FLD 5016} 5017 NEXT (vpc); 5018 5019 CASE (sem, INSN_TASB_COMPACT) : /* tas.b @$rn */ 5020{ 5021 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5022 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5023#define FLD(f) abuf->fields.sfmt_movw10_compact.f 5024 int UNUSED written = 0; 5025 IADDR UNUSED pc = abuf->addr; 5026 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5027 5028{ 5029 UQI tmp_byte; 5030 tmp_byte = GETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn))); 5031 { 5032 BI opval = ((EQQI (tmp_byte, 0)) ? (1) : (0)); 5033 SET_H_TBIT (opval); 5034 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 5035 } 5036 tmp_byte = ORQI (tmp_byte, 128); 5037 { 5038 UQI opval = tmp_byte; 5039 SETMEMUQI (current_cpu, pc, GET_H_GRC (FLD (f_rn)), opval); 5040 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5041 } 5042} 5043 5044#undef FLD 5045} 5046 NEXT (vpc); 5047 5048 CASE (sem, INSN_TRAPA_COMPACT) : /* trapa #$uimm8 */ 5049{ 5050 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5051 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5052#define FLD(f) abuf->fields.sfmt_addi_compact.f 5053 int UNUSED written = 0; 5054 IADDR UNUSED pc = abuf->addr; 5055 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5056 5057sh64_compact_trapa (current_cpu, FLD (f_imm8), pc); 5058 5059#undef FLD 5060} 5061 NEXT (vpc); 5062 5063 CASE (sem, INSN_TST_COMPACT) : /* tst $rm, $rn */ 5064{ 5065 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5066 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5067#define FLD(f) abuf->fields.sfmt_movl12_compact.f 5068 int UNUSED written = 0; 5069 IADDR UNUSED pc = abuf->addr; 5070 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5071 5072 { 5073 BI opval = ((EQSI (ANDSI (GET_H_GRC (FLD (f_rm)), GET_H_GRC (FLD (f_rn))), 0)) ? (1) : (0)); 5074 SET_H_TBIT (opval); 5075 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 5076 } 5077 5078#undef FLD 5079} 5080 NEXT (vpc); 5081 5082 CASE (sem, INSN_TSTI_COMPACT) : /* tst #$uimm8, r0 */ 5083{ 5084 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5085 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5086#define FLD(f) abuf->fields.sfmt_addi_compact.f 5087 int UNUSED written = 0; 5088 IADDR UNUSED pc = abuf->addr; 5089 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5090 5091 { 5092 BI opval = ((EQSI (ANDSI (GET_H_GRC (((UINT) 0)), ZEXTSISI (FLD (f_imm8))), 0)) ? (1) : (0)); 5093 SET_H_TBIT (opval); 5094 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 5095 } 5096 5097#undef FLD 5098} 5099 NEXT (vpc); 5100 5101 CASE (sem, INSN_TSTB_COMPACT) : /* tst.b #$imm8, @(r0, gbr) */ 5102{ 5103 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5104 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5105#define FLD(f) abuf->fields.sfmt_addi_compact.f 5106 int UNUSED written = 0; 5107 IADDR UNUSED pc = abuf->addr; 5108 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5109 5110{ 5111 DI tmp_addr; 5112 tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); 5113 { 5114 BI opval = ((EQQI (ANDQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)), 0)) ? (1) : (0)); 5115 SET_H_TBIT (opval); 5116 TRACE_RESULT (current_cpu, abuf, "tbit", 'x', opval); 5117 } 5118} 5119 5120#undef FLD 5121} 5122 NEXT (vpc); 5123 5124 CASE (sem, INSN_XOR_COMPACT) : /* xor $rm64, $rn64 */ 5125{ 5126 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5127 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5128#define FLD(f) abuf->fields.sfmt_movl12_compact.f 5129 int UNUSED written = 0; 5130 IADDR UNUSED pc = abuf->addr; 5131 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5132 5133 { 5134 DI opval = XORDI (GET_H_GR (FLD (f_rn)), GET_H_GR (FLD (f_rm))); 5135 SET_H_GR (FLD (f_rn), opval); 5136 TRACE_RESULT (current_cpu, abuf, "gr", 'D', opval); 5137 } 5138 5139#undef FLD 5140} 5141 NEXT (vpc); 5142 5143 CASE (sem, INSN_XORI_COMPACT) : /* xor #$uimm8, r0 */ 5144{ 5145 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5146 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5147#define FLD(f) abuf->fields.sfmt_addi_compact.f 5148 int UNUSED written = 0; 5149 IADDR UNUSED pc = abuf->addr; 5150 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5151 5152 { 5153 SI opval = XORSI (GET_H_GRC (((UINT) 0)), ZEXTSIDI (FLD (f_imm8))); 5154 SET_H_GRC (((UINT) 0), opval); 5155 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 5156 } 5157 5158#undef FLD 5159} 5160 NEXT (vpc); 5161 5162 CASE (sem, INSN_XORB_COMPACT) : /* xor.b #$imm8, @(r0, gbr) */ 5163{ 5164 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5165 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5166#define FLD(f) abuf->fields.sfmt_addi_compact.f 5167 int UNUSED written = 0; 5168 IADDR UNUSED pc = abuf->addr; 5169 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5170 5171{ 5172 DI tmp_addr; 5173 UQI tmp_data; 5174 tmp_addr = ADDSI (GET_H_GRC (((UINT) 0)), GET_H_GBR ()); 5175 tmp_data = XORQI (GETMEMUQI (current_cpu, pc, tmp_addr), FLD (f_imm8)); 5176 { 5177 UQI opval = tmp_data; 5178 SETMEMUQI (current_cpu, pc, tmp_addr, opval); 5179 TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval); 5180 } 5181} 5182 5183#undef FLD 5184} 5185 NEXT (vpc); 5186 5187 CASE (sem, INSN_XTRCT_COMPACT) : /* xtrct $rm, $rn */ 5188{ 5189 SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc); 5190 ARGBUF *abuf = SEM_ARGBUF (sem_arg); 5191#define FLD(f) abuf->fields.sfmt_movl12_compact.f 5192 int UNUSED written = 0; 5193 IADDR UNUSED pc = abuf->addr; 5194 vpc = SEM_NEXT_VPC (sem_arg, pc, 2); 5195 5196 { 5197 SI opval = ORSI (SLLSI (GET_H_GRC (FLD (f_rm)), 16), SRLSI (GET_H_GRC (FLD (f_rn)), 16)); 5198 SET_H_GRC (FLD (f_rn), opval); 5199 TRACE_RESULT (current_cpu, abuf, "grc", 'x', opval); 5200 } 5201 5202#undef FLD 5203} 5204 NEXT (vpc); 5205 5206 5207 } 5208 ENDSWITCH (sem) /* End of semantic switch. */ 5209 5210 /* At this point `vpc' contains the next insn to execute. */ 5211} 5212 5213#undef DEFINE_SWITCH 5214#endif /* DEFINE_SWITCH */ 5215