1/* Misc. support for CPU family sh64. 2 3THIS FILE IS MACHINE GENERATED WITH CGEN. 4 5Copyright 1996-2005 Free Software Foundation, Inc. 6 7This file is part of the GNU simulators. 8 9This program is free software; you can redistribute it and/or modify 10it under the terms of the GNU General Public License as published by 11the Free Software Foundation; either version 3 of the License, or 12(at your option) any later version. 13 14This program is distributed in the hope that it will be useful, 15but WITHOUT ANY WARRANTY; without even the implied warranty of 16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17GNU General Public License for more details. 18 19You should have received a copy of the GNU General Public License 20along with this program. If not, see <http://www.gnu.org/licenses/>. 21 22*/ 23 24#define WANT_CPU sh64 25#define WANT_CPU_SH64 26 27#include "sim-main.h" 28#include "cgen-ops.h" 29 30/* Get the value of h-pc. */ 31 32UDI 33sh64_h_pc_get (SIM_CPU *current_cpu) 34{ 35 return GET_H_PC (); 36} 37 38/* Set a value for h-pc. */ 39 40void 41sh64_h_pc_set (SIM_CPU *current_cpu, UDI newval) 42{ 43 SET_H_PC (newval); 44} 45 46/* Get the value of h-gr. */ 47 48DI 49sh64_h_gr_get (SIM_CPU *current_cpu, UINT regno) 50{ 51 return GET_H_GR (regno); 52} 53 54/* Set a value for h-gr. */ 55 56void 57sh64_h_gr_set (SIM_CPU *current_cpu, UINT regno, DI newval) 58{ 59 SET_H_GR (regno, newval); 60} 61 62/* Get the value of h-grc. */ 63 64SI 65sh64_h_grc_get (SIM_CPU *current_cpu, UINT regno) 66{ 67 return GET_H_GRC (regno); 68} 69 70/* Set a value for h-grc. */ 71 72void 73sh64_h_grc_set (SIM_CPU *current_cpu, UINT regno, SI newval) 74{ 75 SET_H_GRC (regno, newval); 76} 77 78/* Get the value of h-cr. */ 79 80DI 81sh64_h_cr_get (SIM_CPU *current_cpu, UINT regno) 82{ 83 return GET_H_CR (regno); 84} 85 86/* Set a value for h-cr. */ 87 88void 89sh64_h_cr_set (SIM_CPU *current_cpu, UINT regno, DI newval) 90{ 91 SET_H_CR (regno, newval); 92} 93 94/* Get the value of h-sr. */ 95 96SI 97sh64_h_sr_get (SIM_CPU *current_cpu) 98{ 99 return CPU (h_sr); 100} 101 102/* Set a value for h-sr. */ 103 104void 105sh64_h_sr_set (SIM_CPU *current_cpu, SI newval) 106{ 107 CPU (h_sr) = newval; 108} 109 110/* Get the value of h-fpscr. */ 111 112SI 113sh64_h_fpscr_get (SIM_CPU *current_cpu) 114{ 115 return CPU (h_fpscr); 116} 117 118/* Set a value for h-fpscr. */ 119 120void 121sh64_h_fpscr_set (SIM_CPU *current_cpu, SI newval) 122{ 123 CPU (h_fpscr) = newval; 124} 125 126/* Get the value of h-frbit. */ 127 128BI 129sh64_h_frbit_get (SIM_CPU *current_cpu) 130{ 131 return GET_H_FRBIT (); 132} 133 134/* Set a value for h-frbit. */ 135 136void 137sh64_h_frbit_set (SIM_CPU *current_cpu, BI newval) 138{ 139 SET_H_FRBIT (newval); 140} 141 142/* Get the value of h-szbit. */ 143 144BI 145sh64_h_szbit_get (SIM_CPU *current_cpu) 146{ 147 return GET_H_SZBIT (); 148} 149 150/* Set a value for h-szbit. */ 151 152void 153sh64_h_szbit_set (SIM_CPU *current_cpu, BI newval) 154{ 155 SET_H_SZBIT (newval); 156} 157 158/* Get the value of h-prbit. */ 159 160BI 161sh64_h_prbit_get (SIM_CPU *current_cpu) 162{ 163 return GET_H_PRBIT (); 164} 165 166/* Set a value for h-prbit. */ 167 168void 169sh64_h_prbit_set (SIM_CPU *current_cpu, BI newval) 170{ 171 SET_H_PRBIT (newval); 172} 173 174/* Get the value of h-sbit. */ 175 176BI 177sh64_h_sbit_get (SIM_CPU *current_cpu) 178{ 179 return GET_H_SBIT (); 180} 181 182/* Set a value for h-sbit. */ 183 184void 185sh64_h_sbit_set (SIM_CPU *current_cpu, BI newval) 186{ 187 SET_H_SBIT (newval); 188} 189 190/* Get the value of h-mbit. */ 191 192BI 193sh64_h_mbit_get (SIM_CPU *current_cpu) 194{ 195 return GET_H_MBIT (); 196} 197 198/* Set a value for h-mbit. */ 199 200void 201sh64_h_mbit_set (SIM_CPU *current_cpu, BI newval) 202{ 203 SET_H_MBIT (newval); 204} 205 206/* Get the value of h-qbit. */ 207 208BI 209sh64_h_qbit_get (SIM_CPU *current_cpu) 210{ 211 return GET_H_QBIT (); 212} 213 214/* Set a value for h-qbit. */ 215 216void 217sh64_h_qbit_set (SIM_CPU *current_cpu, BI newval) 218{ 219 SET_H_QBIT (newval); 220} 221 222/* Get the value of h-fr. */ 223 224SF 225sh64_h_fr_get (SIM_CPU *current_cpu, UINT regno) 226{ 227 return CPU (h_fr[regno]); 228} 229 230/* Set a value for h-fr. */ 231 232void 233sh64_h_fr_set (SIM_CPU *current_cpu, UINT regno, SF newval) 234{ 235 CPU (h_fr[regno]) = newval; 236} 237 238/* Get the value of h-fp. */ 239 240SF 241sh64_h_fp_get (SIM_CPU *current_cpu, UINT regno) 242{ 243 return GET_H_FP (regno); 244} 245 246/* Set a value for h-fp. */ 247 248void 249sh64_h_fp_set (SIM_CPU *current_cpu, UINT regno, SF newval) 250{ 251 SET_H_FP (regno, newval); 252} 253 254/* Get the value of h-fv. */ 255 256SF 257sh64_h_fv_get (SIM_CPU *current_cpu, UINT regno) 258{ 259 return GET_H_FV (regno); 260} 261 262/* Set a value for h-fv. */ 263 264void 265sh64_h_fv_set (SIM_CPU *current_cpu, UINT regno, SF newval) 266{ 267 SET_H_FV (regno, newval); 268} 269 270/* Get the value of h-fmtx. */ 271 272SF 273sh64_h_fmtx_get (SIM_CPU *current_cpu, UINT regno) 274{ 275 return GET_H_FMTX (regno); 276} 277 278/* Set a value for h-fmtx. */ 279 280void 281sh64_h_fmtx_set (SIM_CPU *current_cpu, UINT regno, SF newval) 282{ 283 SET_H_FMTX (regno, newval); 284} 285 286/* Get the value of h-dr. */ 287 288DF 289sh64_h_dr_get (SIM_CPU *current_cpu, UINT regno) 290{ 291 return GET_H_DR (regno); 292} 293 294/* Set a value for h-dr. */ 295 296void 297sh64_h_dr_set (SIM_CPU *current_cpu, UINT regno, DF newval) 298{ 299 SET_H_DR (regno, newval); 300} 301 302/* Get the value of h-fsd. */ 303 304DF 305sh64_h_fsd_get (SIM_CPU *current_cpu, UINT regno) 306{ 307 return GET_H_FSD (regno); 308} 309 310/* Set a value for h-fsd. */ 311 312void 313sh64_h_fsd_set (SIM_CPU *current_cpu, UINT regno, DF newval) 314{ 315 SET_H_FSD (regno, newval); 316} 317 318/* Get the value of h-fmov. */ 319 320DF 321sh64_h_fmov_get (SIM_CPU *current_cpu, UINT regno) 322{ 323 return GET_H_FMOV (regno); 324} 325 326/* Set a value for h-fmov. */ 327 328void 329sh64_h_fmov_set (SIM_CPU *current_cpu, UINT regno, DF newval) 330{ 331 SET_H_FMOV (regno, newval); 332} 333 334/* Get the value of h-tr. */ 335 336DI 337sh64_h_tr_get (SIM_CPU *current_cpu, UINT regno) 338{ 339 return CPU (h_tr[regno]); 340} 341 342/* Set a value for h-tr. */ 343 344void 345sh64_h_tr_set (SIM_CPU *current_cpu, UINT regno, DI newval) 346{ 347 CPU (h_tr[regno]) = newval; 348} 349 350/* Get the value of h-endian. */ 351 352BI 353sh64_h_endian_get (SIM_CPU *current_cpu) 354{ 355 return GET_H_ENDIAN (); 356} 357 358/* Set a value for h-endian. */ 359 360void 361sh64_h_endian_set (SIM_CPU *current_cpu, BI newval) 362{ 363 SET_H_ENDIAN (newval); 364} 365 366/* Get the value of h-ism. */ 367 368BI 369sh64_h_ism_get (SIM_CPU *current_cpu) 370{ 371 return GET_H_ISM (); 372} 373 374/* Set a value for h-ism. */ 375 376void 377sh64_h_ism_set (SIM_CPU *current_cpu, BI newval) 378{ 379 SET_H_ISM (newval); 380} 381 382/* Get the value of h-frc. */ 383 384SF 385sh64_h_frc_get (SIM_CPU *current_cpu, UINT regno) 386{ 387 return GET_H_FRC (regno); 388} 389 390/* Set a value for h-frc. */ 391 392void 393sh64_h_frc_set (SIM_CPU *current_cpu, UINT regno, SF newval) 394{ 395 SET_H_FRC (regno, newval); 396} 397 398/* Get the value of h-drc. */ 399 400DF 401sh64_h_drc_get (SIM_CPU *current_cpu, UINT regno) 402{ 403 return GET_H_DRC (regno); 404} 405 406/* Set a value for h-drc. */ 407 408void 409sh64_h_drc_set (SIM_CPU *current_cpu, UINT regno, DF newval) 410{ 411 SET_H_DRC (regno, newval); 412} 413 414/* Get the value of h-xf. */ 415 416SF 417sh64_h_xf_get (SIM_CPU *current_cpu, UINT regno) 418{ 419 return GET_H_XF (regno); 420} 421 422/* Set a value for h-xf. */ 423 424void 425sh64_h_xf_set (SIM_CPU *current_cpu, UINT regno, SF newval) 426{ 427 SET_H_XF (regno, newval); 428} 429 430/* Get the value of h-xd. */ 431 432DF 433sh64_h_xd_get (SIM_CPU *current_cpu, UINT regno) 434{ 435 return GET_H_XD (regno); 436} 437 438/* Set a value for h-xd. */ 439 440void 441sh64_h_xd_set (SIM_CPU *current_cpu, UINT regno, DF newval) 442{ 443 SET_H_XD (regno, newval); 444} 445 446/* Get the value of h-fvc. */ 447 448SF 449sh64_h_fvc_get (SIM_CPU *current_cpu, UINT regno) 450{ 451 return GET_H_FVC (regno); 452} 453 454/* Set a value for h-fvc. */ 455 456void 457sh64_h_fvc_set (SIM_CPU *current_cpu, UINT regno, SF newval) 458{ 459 SET_H_FVC (regno, newval); 460} 461 462/* Get the value of h-gbr. */ 463 464SI 465sh64_h_gbr_get (SIM_CPU *current_cpu) 466{ 467 return GET_H_GBR (); 468} 469 470/* Set a value for h-gbr. */ 471 472void 473sh64_h_gbr_set (SIM_CPU *current_cpu, SI newval) 474{ 475 SET_H_GBR (newval); 476} 477 478/* Get the value of h-vbr. */ 479 480SI 481sh64_h_vbr_get (SIM_CPU *current_cpu) 482{ 483 return GET_H_VBR (); 484} 485 486/* Set a value for h-vbr. */ 487 488void 489sh64_h_vbr_set (SIM_CPU *current_cpu, SI newval) 490{ 491 SET_H_VBR (newval); 492} 493 494/* Get the value of h-pr. */ 495 496SI 497sh64_h_pr_get (SIM_CPU *current_cpu) 498{ 499 return GET_H_PR (); 500} 501 502/* Set a value for h-pr. */ 503 504void 505sh64_h_pr_set (SIM_CPU *current_cpu, SI newval) 506{ 507 SET_H_PR (newval); 508} 509 510/* Get the value of h-macl. */ 511 512SI 513sh64_h_macl_get (SIM_CPU *current_cpu) 514{ 515 return GET_H_MACL (); 516} 517 518/* Set a value for h-macl. */ 519 520void 521sh64_h_macl_set (SIM_CPU *current_cpu, SI newval) 522{ 523 SET_H_MACL (newval); 524} 525 526/* Get the value of h-mach. */ 527 528SI 529sh64_h_mach_get (SIM_CPU *current_cpu) 530{ 531 return GET_H_MACH (); 532} 533 534/* Set a value for h-mach. */ 535 536void 537sh64_h_mach_set (SIM_CPU *current_cpu, SI newval) 538{ 539 SET_H_MACH (newval); 540} 541 542/* Get the value of h-tbit. */ 543 544BI 545sh64_h_tbit_get (SIM_CPU *current_cpu) 546{ 547 return GET_H_TBIT (); 548} 549 550/* Set a value for h-tbit. */ 551 552void 553sh64_h_tbit_set (SIM_CPU *current_cpu, BI newval) 554{ 555 SET_H_TBIT (newval); 556} 557 558/* Record trace results for INSN. */ 559 560void 561sh64_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn, 562 int *indices, TRACE_RECORD *tr) 563{ 564} 565