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49
50<h3 class="section">4.2 <samp><span class="command">ld</span></samp> and the Intel 960 Family</h3>
51
52<p><a name="index-i960-support-572"></a>
53You can use the &lsquo;<samp><span class="samp">-A</span><var>architecture</var></samp>&rsquo; command line option to
54specify one of the two-letter names identifying members of the 960
55family; the option specifies the desired output target, and warns of any
56incompatible instructions in the input files.  It also modifies the
57linker's search strategy for archive libraries, to support the use of
58libraries specific to each particular architecture, by including in the
59search loop names suffixed with the string identifying the architecture.
60
61   <p>For example, if your <samp><span class="command">ld</span></samp> command line included &lsquo;<samp><span class="samp">-ACA</span></samp>&rsquo;<!-- /@w --> as
62well as &lsquo;<samp><span class="samp">-ltry</span></samp>&rsquo;<!-- /@w -->, the linker would look (in its built-in search
63paths, and in any paths you specify with &lsquo;<samp><span class="samp">-L</span></samp>&rsquo;) for a library with
64the names
65
66<pre class="smallexample">     try
67     libtry.a
68     tryca
69     libtryca.a
70</pre>
71   <p class="noindent">The first two possibilities would be considered in any event; the last
72two are due to the use of &lsquo;<samp><span class="samp">-ACA</span></samp>&rsquo;<!-- /@w -->.
73
74   <p>You can meaningfully use &lsquo;<samp><span class="samp">-A</span></samp>&rsquo; more than once on a command line, since
75the 960 architecture family allows combination of target architectures; each
76use will add another pair of name variants to search for when &lsquo;<samp><span class="samp">-l</span></samp>&rsquo;<!-- /@w -->
77specifies a library.
78
79   <p><a name="index-g_t_0040option_007b_002d_002drelax_007d-on-i960-573"></a><a name="index-relaxing-on-i960-574"></a><samp><span class="command">ld</span></samp> supports the &lsquo;<samp><span class="samp">--relax</span></samp>&rsquo; option for the i960 family.  If
80you specify &lsquo;<samp><span class="samp">--relax</span></samp>&rsquo;, <samp><span class="command">ld</span></samp> finds all <code>balx</code> and
81<code>calx</code> instructions whose targets are within 24 bits, and turns
82them into 24-bit program-counter relative <code>bal</code> and <code>cal</code>
83instructions, respectively.  <samp><span class="command">ld</span></samp> also turns <code>cal</code>
84instructions into <code>bal</code> instructions when it determines that the
85target subroutine is a leaf routine (that is, the target subroutine does
86not itself call any subroutines).
87
88   <p><a name="index-Cortex_002dA8-erratum-workaround-575"></a><a name="index-g_t_002d_002dfix_002dcortex_002da8-576"></a><a name="index-g_t_002d_002dno_002dfix_002dcortex_002da8-577"></a>The &lsquo;<samp><span class="samp">--fix-cortex-a8</span></samp>&rsquo; switch enables a link-time workaround for an erratum in certain Cortex-A8 processors.  The workaround is enabled by default if you are targeting the ARM v7-A architecture profile.  It can be enabled otherwise by specifying &lsquo;<samp><span class="samp">--fix-cortex-a8</span></samp>&rsquo;, or disabled unconditionally by specifying &lsquo;<samp><span class="samp">--no-fix-cortex-a8</span></samp>&rsquo;.
89
90   <p>The erratum only affects Thumb-2 code.  Please contact ARM for further details.
91
92   <p><a name="index-g_t_002d_002dmerge_002dexidx_002dentries-578"></a><a name="index-g_t_002d_002dno_002dmerge_002dexidx_002dentries-579"></a>The &lsquo;<samp><span class="samp">--no-merge-exidx-entries</span></samp>&rsquo; switch disables the merging of adjacent exidx entries in debuginfo.
93
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95
96