1<html lang="en"> 2<head> 3<title>IA-64 Options - Using the GNU Compiler Collection (GCC)</title> 4<meta http-equiv="Content-Type" content="text/html"> 5<meta name="description" content="Using the GNU Compiler Collection (GCC)"> 6<meta name="generator" content="makeinfo 4.13"> 7<link title="Top" rel="start" href="index.html#Top"> 8<link rel="up" href="Submodel-Options.html#Submodel-Options" title="Submodel Options"> 9<link rel="prev" href="i386-and-x86_002d64-Windows-Options.html#i386-and-x86_002d64-Windows-Options" title="i386 and x86-64 Windows Options"> 10<link rel="next" href="IA_002d64_002fVMS-Options.html#IA_002d64_002fVMS-Options" title="IA-64/VMS Options"> 11<link href="http://www.gnu.org/software/texinfo/" rel="generator-home" title="Texinfo Homepage"> 12<!-- 13Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 141998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 152010 Free Software Foundation, Inc. 16 17Permission is granted to copy, distribute and/or modify this document 18under the terms of the GNU Free Documentation License, Version 1.3 or 19any later version published by the Free Software Foundation; with the 20Invariant Sections being ``Funding Free Software'', the Front-Cover 21Texts being (a) (see below), and with the Back-Cover Texts being (b) 22(see below). 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This is the default for HP-UX. 66 67 <br><dt><code>-mlittle-endian</code><dd><a name="index-mlittle_002dendian-1410"></a>Generate code for a little endian target. This is the default for AIX5 68and GNU/Linux. 69 70 <br><dt><code>-mgnu-as</code><dt><code>-mno-gnu-as</code><dd><a name="index-mgnu_002das-1411"></a><a name="index-mno_002dgnu_002das-1412"></a>Generate (or don't) code for the GNU assembler. This is the default. 71<!-- Also, this is the default if the configure option @option{-with-gnu-as} --> 72<!-- is used. --> 73 74 <br><dt><code>-mgnu-ld</code><dt><code>-mno-gnu-ld</code><dd><a name="index-mgnu_002dld-1413"></a><a name="index-mno_002dgnu_002dld-1414"></a>Generate (or don't) code for the GNU linker. This is the default. 75<!-- Also, this is the default if the configure option @option{-with-gnu-ld} --> 76<!-- is used. --> 77 78 <br><dt><code>-mno-pic</code><dd><a name="index-mno_002dpic-1415"></a>Generate code that does not use a global pointer register. The result 79is not position independent code, and violates the IA-64 ABI. 80 81 <br><dt><code>-mvolatile-asm-stop</code><dt><code>-mno-volatile-asm-stop</code><dd><a name="index-mvolatile_002dasm_002dstop-1416"></a><a name="index-mno_002dvolatile_002dasm_002dstop-1417"></a>Generate (or don't) a stop bit immediately before and after volatile asm 82statements. 83 84 <br><dt><code>-mregister-names</code><dt><code>-mno-register-names</code><dd><a name="index-mregister_002dnames-1418"></a><a name="index-mno_002dregister_002dnames-1419"></a>Generate (or don't) ‘<samp><span class="samp">in</span></samp>’, ‘<samp><span class="samp">loc</span></samp>’, and ‘<samp><span class="samp">out</span></samp>’ register names for 85the stacked registers. This may make assembler output more readable. 86 87 <br><dt><code>-mno-sdata</code><dt><code>-msdata</code><dd><a name="index-mno_002dsdata-1420"></a><a name="index-msdata-1421"></a>Disable (or enable) optimizations that use the small data section. This may 88be useful for working around optimizer bugs. 89 90 <br><dt><code>-mconstant-gp</code><dd><a name="index-mconstant_002dgp-1422"></a>Generate code that uses a single constant global pointer value. This is 91useful when compiling kernel code. 92 93 <br><dt><code>-mauto-pic</code><dd><a name="index-mauto_002dpic-1423"></a>Generate code that is self-relocatable. This implies <samp><span class="option">-mconstant-gp</span></samp>. 94This is useful when compiling firmware code. 95 96 <br><dt><code>-minline-float-divide-min-latency</code><dd><a name="index-minline_002dfloat_002ddivide_002dmin_002dlatency-1424"></a>Generate code for inline divides of floating point values 97using the minimum latency algorithm. 98 99 <br><dt><code>-minline-float-divide-max-throughput</code><dd><a name="index-minline_002dfloat_002ddivide_002dmax_002dthroughput-1425"></a>Generate code for inline divides of floating point values 100using the maximum throughput algorithm. 101 102 <br><dt><code>-mno-inline-float-divide</code><dd><a name="index-mno_002dinline_002dfloat_002ddivide-1426"></a>Do not generate inline code for divides of floating point values. 103 104 <br><dt><code>-minline-int-divide-min-latency</code><dd><a name="index-minline_002dint_002ddivide_002dmin_002dlatency-1427"></a>Generate code for inline divides of integer values 105using the minimum latency algorithm. 106 107 <br><dt><code>-minline-int-divide-max-throughput</code><dd><a name="index-minline_002dint_002ddivide_002dmax_002dthroughput-1428"></a>Generate code for inline divides of integer values 108using the maximum throughput algorithm. 109 110 <br><dt><code>-mno-inline-int-divide</code><dd><a name="index-mno_002dinline_002dint_002ddivide-1429"></a>Do not generate inline code for divides of integer values. 111 112 <br><dt><code>-minline-sqrt-min-latency</code><dd><a name="index-minline_002dsqrt_002dmin_002dlatency-1430"></a>Generate code for inline square roots 113using the minimum latency algorithm. 114 115 <br><dt><code>-minline-sqrt-max-throughput</code><dd><a name="index-minline_002dsqrt_002dmax_002dthroughput-1431"></a>Generate code for inline square roots 116using the maximum throughput algorithm. 117 118 <br><dt><code>-mno-inline-sqrt</code><dd><a name="index-mno_002dinline_002dsqrt-1432"></a>Do not generate inline code for sqrt. 119 120 <br><dt><code>-mfused-madd</code><dt><code>-mno-fused-madd</code><dd><a name="index-mfused_002dmadd-1433"></a><a name="index-mno_002dfused_002dmadd-1434"></a>Do (don't) generate code that uses the fused multiply/add or multiply/subtract 121instructions. The default is to use these instructions. 122 123 <br><dt><code>-mno-dwarf2-asm</code><dt><code>-mdwarf2-asm</code><dd><a name="index-mno_002ddwarf2_002dasm-1435"></a><a name="index-mdwarf2_002dasm-1436"></a>Don't (or do) generate assembler code for the DWARF2 line number debugging 124info. This may be useful when not using the GNU assembler. 125 126 <br><dt><code>-mearly-stop-bits</code><dt><code>-mno-early-stop-bits</code><dd><a name="index-mearly_002dstop_002dbits-1437"></a><a name="index-mno_002dearly_002dstop_002dbits-1438"></a>Allow stop bits to be placed earlier than immediately preceding the 127instruction that triggered the stop bit. This can improve instruction 128scheduling, but does not always do so. 129 130 <br><dt><code>-mfixed-range=</code><var>register-range</var><dd><a name="index-mfixed_002drange-1439"></a>Generate code treating the given register range as fixed registers. 131A fixed register is one that the register allocator can not use. This is 132useful when compiling kernel code. A register range is specified as 133two registers separated by a dash. Multiple register ranges can be 134specified separated by a comma. 135 136 <br><dt><code>-mtls-size=</code><var>tls-size</var><dd><a name="index-mtls_002dsize-1440"></a>Specify bit size of immediate TLS offsets. Valid values are 14, 22, and 13764. 138 139 <br><dt><code>-mtune=</code><var>cpu-type</var><dd><a name="index-mtune-1441"></a>Tune the instruction scheduling for a particular CPU, Valid values are 140itanium, itanium1, merced, itanium2, and mckinley. 141 142 <br><dt><code>-milp32</code><dt><code>-mlp64</code><dd><a name="index-milp32-1442"></a><a name="index-mlp64-1443"></a>Generate code for a 32-bit or 64-bit environment. 143The 32-bit environment sets int, long and pointer to 32 bits. 144The 64-bit environment sets int to 32 bits and long and pointer 145to 64 bits. These are HP-UX specific flags. 146 147 <br><dt><code>-mno-sched-br-data-spec</code><dt><code>-msched-br-data-spec</code><dd><a name="index-mno_002dsched_002dbr_002ddata_002dspec-1444"></a><a name="index-msched_002dbr_002ddata_002dspec-1445"></a>(Dis/En)able data speculative scheduling before reload. 148This will result in generation of the ld.a instructions and 149the corresponding check instructions (ld.c / chk.a). 150The default is 'disable'. 151 152 <br><dt><code>-msched-ar-data-spec</code><dt><code>-mno-sched-ar-data-spec</code><dd><a name="index-msched_002dar_002ddata_002dspec-1446"></a><a name="index-mno_002dsched_002dar_002ddata_002dspec-1447"></a>(En/Dis)able data speculative scheduling after reload. 153This will result in generation of the ld.a instructions and 154the corresponding check instructions (ld.c / chk.a). 155The default is 'enable'. 156 157 <br><dt><code>-mno-sched-control-spec</code><dt><code>-msched-control-spec</code><dd><a name="index-mno_002dsched_002dcontrol_002dspec-1448"></a><a name="index-msched_002dcontrol_002dspec-1449"></a>(Dis/En)able control speculative scheduling. This feature is 158available only during region scheduling (i.e. before reload). 159This will result in generation of the ld.s instructions and 160the corresponding check instructions chk.s . 161The default is 'disable'. 162 163 <br><dt><code>-msched-br-in-data-spec</code><dt><code>-mno-sched-br-in-data-spec</code><dd><a name="index-msched_002dbr_002din_002ddata_002dspec-1450"></a><a name="index-mno_002dsched_002dbr_002din_002ddata_002dspec-1451"></a>(En/Dis)able speculative scheduling of the instructions that 164are dependent on the data speculative loads before reload. 165This is effective only with <samp><span class="option">-msched-br-data-spec</span></samp> enabled. 166The default is 'enable'. 167 168 <br><dt><code>-msched-ar-in-data-spec</code><dt><code>-mno-sched-ar-in-data-spec</code><dd><a name="index-msched_002dar_002din_002ddata_002dspec-1452"></a><a name="index-mno_002dsched_002dar_002din_002ddata_002dspec-1453"></a>(En/Dis)able speculative scheduling of the instructions that 169are dependent on the data speculative loads after reload. 170This is effective only with <samp><span class="option">-msched-ar-data-spec</span></samp> enabled. 171The default is 'enable'. 172 173 <br><dt><code>-msched-in-control-spec</code><dt><code>-mno-sched-in-control-spec</code><dd><a name="index-msched_002din_002dcontrol_002dspec-1454"></a><a name="index-mno_002dsched_002din_002dcontrol_002dspec-1455"></a>(En/Dis)able speculative scheduling of the instructions that 174are dependent on the control speculative loads. 175This is effective only with <samp><span class="option">-msched-control-spec</span></samp> enabled. 176The default is 'enable'. 177 178 <br><dt><code>-mno-sched-prefer-non-data-spec-insns</code><dt><code>-msched-prefer-non-data-spec-insns</code><dd><a name="index-mno_002dsched_002dprefer_002dnon_002ddata_002dspec_002dinsns-1456"></a><a name="index-msched_002dprefer_002dnon_002ddata_002dspec_002dinsns-1457"></a>If enabled, data speculative instructions will be chosen for schedule 179only if there are no other choices at the moment. This will make 180the use of the data speculation much more conservative. 181The default is 'disable'. 182 183 <br><dt><code>-mno-sched-prefer-non-control-spec-insns</code><dt><code>-msched-prefer-non-control-spec-insns</code><dd><a name="index-mno_002dsched_002dprefer_002dnon_002dcontrol_002dspec_002dinsns-1458"></a><a name="index-msched_002dprefer_002dnon_002dcontrol_002dspec_002dinsns-1459"></a>If enabled, control speculative instructions will be chosen for schedule 184only if there are no other choices at the moment. This will make 185the use of the control speculation much more conservative. 186The default is 'disable'. 187 188 <br><dt><code>-mno-sched-count-spec-in-critical-path</code><dt><code>-msched-count-spec-in-critical-path</code><dd><a name="index-mno_002dsched_002dcount_002dspec_002din_002dcritical_002dpath-1460"></a><a name="index-msched_002dcount_002dspec_002din_002dcritical_002dpath-1461"></a>If enabled, speculative dependencies will be considered during 189computation of the instructions priorities. This will make the use of the 190speculation a bit more conservative. 191The default is 'disable'. 192 193 <br><dt><code>-msched-spec-ldc</code><dd><a name="index-msched_002dspec_002dldc-1462"></a>Use a simple data speculation check. This option is on by default. 194 195 <br><dt><code>-msched-control-spec-ldc</code><dd><a name="index-msched_002dspec_002dldc-1463"></a>Use a simple check for control speculation. This option is on by default. 196 197 <br><dt><code>-msched-stop-bits-after-every-cycle</code><dd><a name="index-msched_002dstop_002dbits_002dafter_002devery_002dcycle-1464"></a>Place a stop bit after every cycle when scheduling. This option is on 198by default. 199 200 <br><dt><code>-msched-fp-mem-deps-zero-cost</code><dd><a name="index-msched_002dfp_002dmem_002ddeps_002dzero_002dcost-1465"></a>Assume that floating-point stores and loads are not likely to cause a conflict 201when placed into the same instruction group. This option is disabled by 202default. 203 204 <br><dt><code>-msel-sched-dont-check-control-spec</code><dd><a name="index-msel_002dsched_002ddont_002dcheck_002dcontrol_002dspec-1466"></a>Generate checks for control speculation in selective scheduling. 205This flag is disabled by default. 206 207 <br><dt><code>-msched-max-memory-insns=</code><var>max-insns</var><dd><a name="index-msched_002dmax_002dmemory_002dinsns-1467"></a>Limit on the number of memory insns per instruction group, giving lower 208priority to subsequent memory insns attempting to schedule in the same 209instruction group. Frequently useful to prevent cache bank conflicts. 210The default value is 1. 211 212 <br><dt><code>-msched-max-memory-insns-hard-limit</code><dd><a name="index-msched_002dmax_002dmemory_002dinsns_002dhard_002dlimit-1468"></a>Disallow more than `msched-max-memory-insns' in instruction group. 213Otherwise, limit is `soft' meaning that we would prefer non-memory operations 214when limit is reached but may still schedule memory operations. 215 216 </dl> 217 218 </body></html> 219 220