1/* 2 * arch/arm/include/asm/ptrace.h 3 * 4 * Copyright (C) 1996-2003 Russell King 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#ifndef __ASM_ARM_PTRACE_H 11#define __ASM_ARM_PTRACE_H 12 13#include <asm/hwcap.h> 14 15#define PTRACE_GETREGS 12 16#define PTRACE_SETREGS 13 17#define PTRACE_GETFPREGS 14 18#define PTRACE_SETFPREGS 15 19/* PTRACE_ATTACH is 16 */ 20/* PTRACE_DETACH is 17 */ 21#define PTRACE_GETWMMXREGS 18 22#define PTRACE_SETWMMXREGS 19 23/* 20 is unused */ 24#define PTRACE_OLDSETOPTIONS 21 25#define PTRACE_GET_THREAD_AREA 22 26#define PTRACE_SET_SYSCALL 23 27/* PTRACE_SYSCALL is 24 */ 28#define PTRACE_GETCRUNCHREGS 25 29#define PTRACE_SETCRUNCHREGS 26 30#define PTRACE_GETVFPREGS 27 31#define PTRACE_SETVFPREGS 28 32 33/* 34 * PSR bits 35 */ 36#define USR26_MODE 0x00000000 37#define FIQ26_MODE 0x00000001 38#define IRQ26_MODE 0x00000002 39#define SVC26_MODE 0x00000003 40#define USR_MODE 0x00000010 41#define FIQ_MODE 0x00000011 42#define IRQ_MODE 0x00000012 43#define SVC_MODE 0x00000013 44#define ABT_MODE 0x00000017 45#define UND_MODE 0x0000001b 46#define SYSTEM_MODE 0x0000001f 47#define MODE32_BIT 0x00000010 48#define MODE_MASK 0x0000001f 49#define PSR_T_BIT 0x00000020 50#define PSR_F_BIT 0x00000040 51#define PSR_I_BIT 0x00000080 52#define PSR_A_BIT 0x00000100 53#define PSR_E_BIT 0x00000200 54#define PSR_J_BIT 0x01000000 55#define PSR_Q_BIT 0x08000000 56#define PSR_V_BIT 0x10000000 57#define PSR_C_BIT 0x20000000 58#define PSR_Z_BIT 0x40000000 59#define PSR_N_BIT 0x80000000 60 61/* 62 * Groups of PSR bits 63 */ 64#define PSR_f 0xff000000 /* Flags */ 65#define PSR_s 0x00ff0000 /* Status */ 66#define PSR_x 0x0000ff00 /* Extension */ 67#define PSR_c 0x000000ff /* Control */ 68 69/* 70 * ARMv7 groups of APSR bits 71 */ 72#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */ 73#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */ 74#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */ 75 76/* 77 * Default endianness state 78 */ 79#ifdef CONFIG_CPU_ENDIAN_BE8 80#define PSR_ENDSTATE PSR_E_BIT 81#else 82#define PSR_ENDSTATE 0 83#endif 84 85/* 86 * These are 'magic' values for PTRACE_PEEKUSR that return info about where a 87 * process is located in memory. 88 */ 89#define PT_TEXT_ADDR 0x10000 90#define PT_DATA_ADDR 0x10004 91#define PT_TEXT_END_ADDR 0x10008 92 93#ifndef __ASSEMBLY__ 94 95/* 96 * This struct defines the way the registers are stored on the 97 * stack during a system call. Note that sizeof(struct pt_regs) 98 * has to be a multiple of 8. 99 */ 100struct pt_regs { 101 long uregs[18]; 102}; 103 104#define ARM_cpsr uregs[16] 105#define ARM_pc uregs[15] 106#define ARM_lr uregs[14] 107#define ARM_sp uregs[13] 108#define ARM_ip uregs[12] 109#define ARM_fp uregs[11] 110#define ARM_r10 uregs[10] 111#define ARM_r9 uregs[9] 112#define ARM_r8 uregs[8] 113#define ARM_r7 uregs[7] 114#define ARM_r6 uregs[6] 115#define ARM_r5 uregs[5] 116#define ARM_r4 uregs[4] 117#define ARM_r3 uregs[3] 118#define ARM_r2 uregs[2] 119#define ARM_r1 uregs[1] 120#define ARM_r0 uregs[0] 121#define ARM_ORIG_r0 uregs[17] 122 123 124#endif /* __ASSEMBLY__ */ 125 126#endif 127 128