1/* 2 * HNDRTE ARM run-time initialization and first level exception handling. 3 * 4 * Copyright (C) 2015, Broadcom Corporation. All Rights Reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 13 * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION 15 * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN 16 * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 * 18 * $Id: startarm.S,v 1.91 2010-11-17 22:55:41 $ 19 */ 20 21 22#ifndef __arm__ 23#error __arm__ is NOT defined 24#endif 25 26 27/* Routine begin/end macro */ 28#if defined(__thumb__) 29#define FUNC(x) THUMBLEAF(x) 30#else 31#define FUNC(x) LEAF(x) 32#endif /* __thumb__ */ 33 34 35/* Debug macro - write a number to memory - use it with caution, 36 * it changes r0 and r1 registers. 37 */ 38#if defined(BCMDBG) 39#define TRACE(x) \ 40 ldr r0,=x; \ 41 ldr r1,=__watermark; \ 42 str r0,[r1] 43#else 44#define TRACE(x) 45#endif /* BCMDBG */ 46 47 48/* Instruction macros that hide machine/arch details. */ 49.macro _LSL_ rd,rm,im 50 lsl \rd,\rm,\im 51.endm 52.macro _LSR_ rd,rm,im 53 lsr \rd,\rm,\im 54.endm 55.macro _ROR_ rd,rm,im 56 ror \rd,\rm,\im 57.endm 58.macro _MUL_ rd,rm,rs 59 mov \rd,\rm 60 mul \rd,\rd,\rs 61.endm 62 63#if defined(__ARM_ARCH_7R__) 64#include "startarm-cr4.S" 65#elif defined(__ARM_ARCH_7M__) 66#include "startarm-cm3.S" 67#elif defined(__ARM_ARCH_7A__) 68#include "startarm-ca9.S" 69#elif defined(__ARM_ARCH_4T__) 70#include "startarm-7s.S" 71#else 72#error Unrecognized ARM architecture 73#endif 74