1/* Disassembler code for CRIS. 2 Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007 3 Free Software Foundation, Inc. 4 Contributed by Axis Communications AB, Lund, Sweden. 5 Written by Hans-Peter Nilsson. 6 7 This file is part of the GNU opcodes library. 8 9 This library is free software; you can redistribute it and/or modify 10 it under the terms of the GNU General Public License as published by 11 the Free Software Foundation; either version 3, or (at your option) 12 any later version. 13 14 It is distributed in the hope that it will be useful, but WITHOUT 15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 17 License for more details. 18 19 You should have received a copy of the GNU General Public License 20 along with this program; if not, write to the Free Software 21 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 22 MA 02110-1301, USA. */ 23 24#include "dis-asm.h" 25#include "sysdep.h" 26#include "opcode/cris.h" 27#include "libiberty.h" 28 29/* No instruction will be disassembled longer than this. In theory, and 30 in silicon, address prefixes can be cascaded. In practice, cascading 31 is not used by GCC, and not supported by the assembler. */ 32#ifndef MAX_BYTES_PER_CRIS_INSN 33#define MAX_BYTES_PER_CRIS_INSN 8 34#endif 35 36/* Whether or not to decode prefixes, folding it into the following 37 instruction. FIXME: Make this optional later. */ 38#ifndef PARSE_PREFIX 39#define PARSE_PREFIX 1 40#endif 41 42/* Sometimes we prefix all registers with this character. */ 43#define REGISTER_PREFIX_CHAR '$' 44 45/* Whether or not to trace the following sequence: 46 sub* X,r%d 47 bound* Y,r%d 48 adds.w [pc+r%d.w],pc 49 50 This is the assembly form of a switch-statement in C. 51 The "sub is optional. If there is none, then X will be zero. 52 X is the value of the first case, 53 Y is the number of cases (including default). 54 55 This results in case offsets printed on the form: 56 case N: -> case_address 57 where N is an estimation on the corresponding 'case' operand in C, 58 and case_address is where execution of that case continues after the 59 sequence presented above. 60 61 The old style of output was to print the offsets as instructions, 62 which made it hard to follow "case"-constructs in the disassembly, 63 and caused a lot of annoying warnings about undefined instructions. 64 65 FIXME: Make this optional later. */ 66#ifndef TRACE_CASE 67#define TRACE_CASE (disdata->trace_case) 68#endif 69 70enum cris_disass_family 71 { cris_dis_v0_v10, cris_dis_common_v10_v32, cris_dis_v32 }; 72 73/* Stored in the disasm_info->private_data member. */ 74struct cris_disasm_data 75{ 76 /* Whether to print something less confusing if we find something 77 matching a switch-construct. */ 78 bfd_boolean trace_case; 79 80 /* Whether this code is flagged as crisv32. FIXME: Should be an enum 81 that includes "compatible". */ 82 enum cris_disass_family distype; 83}; 84 85/* Value of first element in switch. */ 86static long case_offset = 0; 87 88/* How many more case-offsets to print. */ 89static long case_offset_counter = 0; 90 91/* Number of case offsets. */ 92static long no_of_case_offsets = 0; 93 94/* Candidate for next case_offset. */ 95static long last_immediate = 0; 96 97static int cris_constraint 98 (const char *, unsigned, unsigned, struct cris_disasm_data *); 99 100/* Parse disassembler options and store state in info. FIXME: For the 101 time being, we abuse static variables. */ 102 103static bfd_boolean 104cris_parse_disassembler_options (disassemble_info *info, 105 enum cris_disass_family distype) 106{ 107 struct cris_disasm_data *disdata; 108 109 info->private_data = calloc (1, sizeof (struct cris_disasm_data)); 110 disdata = (struct cris_disasm_data *) info->private_data; 111 if (disdata == NULL) 112 return FALSE; 113 114 /* Default true. */ 115 disdata->trace_case 116 = (info->disassembler_options == NULL 117 || (strcmp (info->disassembler_options, "nocase") != 0)); 118 119 disdata->distype = distype; 120 return TRUE; 121} 122 123static const struct cris_spec_reg * 124spec_reg_info (unsigned int sreg, enum cris_disass_family distype) 125{ 126 int i; 127 128 for (i = 0; cris_spec_regs[i].name != NULL; i++) 129 { 130 if (cris_spec_regs[i].number == sreg) 131 { 132 if (distype == cris_dis_v32) 133 switch (cris_spec_regs[i].applicable_version) 134 { 135 case cris_ver_warning: 136 case cris_ver_version_all: 137 case cris_ver_v3p: 138 case cris_ver_v8p: 139 case cris_ver_v10p: 140 case cris_ver_v32p: 141 /* No ambiguous sizes or register names with CRISv32. */ 142 if (cris_spec_regs[i].warning == NULL) 143 return &cris_spec_regs[i]; 144 default: 145 ; 146 } 147 else if (cris_spec_regs[i].applicable_version != cris_ver_v32p) 148 return &cris_spec_regs[i]; 149 } 150 } 151 152 return NULL; 153} 154 155/* Return the number of bits in the argument. */ 156 157static int 158number_of_bits (unsigned int val) 159{ 160 int bits; 161 162 for (bits = 0; val != 0; val &= val - 1) 163 bits++; 164 165 return bits; 166} 167 168/* Get an entry in the opcode-table. */ 169 170static const struct cris_opcode * 171get_opcode_entry (unsigned int insn, 172 unsigned int prefix_insn, 173 struct cris_disasm_data *disdata) 174{ 175 /* For non-prefixed insns, we keep a table of pointers, indexed by the 176 insn code. Each entry is initialized when found to be NULL. */ 177 static const struct cris_opcode **opc_table = NULL; 178 179 const struct cris_opcode *max_matchedp = NULL; 180 const struct cris_opcode **prefix_opc_table = NULL; 181 182 /* We hold a table for each prefix that need to be handled differently. */ 183 static const struct cris_opcode **dip_prefixes = NULL; 184 static const struct cris_opcode **bdapq_m1_prefixes = NULL; 185 static const struct cris_opcode **bdapq_m2_prefixes = NULL; 186 static const struct cris_opcode **bdapq_m4_prefixes = NULL; 187 static const struct cris_opcode **rest_prefixes = NULL; 188 189 /* Allocate and clear the opcode-table. */ 190 if (opc_table == NULL) 191 { 192 opc_table = malloc (65536 * sizeof (opc_table[0])); 193 if (opc_table == NULL) 194 return NULL; 195 196 memset (opc_table, 0, 65536 * sizeof (const struct cris_opcode *)); 197 198 dip_prefixes 199 = malloc (65536 * sizeof (const struct cris_opcode **)); 200 if (dip_prefixes == NULL) 201 return NULL; 202 203 memset (dip_prefixes, 0, 65536 * sizeof (dip_prefixes[0])); 204 205 bdapq_m1_prefixes 206 = malloc (65536 * sizeof (const struct cris_opcode **)); 207 if (bdapq_m1_prefixes == NULL) 208 return NULL; 209 210 memset (bdapq_m1_prefixes, 0, 65536 * sizeof (bdapq_m1_prefixes[0])); 211 212 bdapq_m2_prefixes 213 = malloc (65536 * sizeof (const struct cris_opcode **)); 214 if (bdapq_m2_prefixes == NULL) 215 return NULL; 216 217 memset (bdapq_m2_prefixes, 0, 65536 * sizeof (bdapq_m2_prefixes[0])); 218 219 bdapq_m4_prefixes 220 = malloc (65536 * sizeof (const struct cris_opcode **)); 221 if (bdapq_m4_prefixes == NULL) 222 return NULL; 223 224 memset (bdapq_m4_prefixes, 0, 65536 * sizeof (bdapq_m4_prefixes[0])); 225 226 rest_prefixes 227 = malloc (65536 * sizeof (const struct cris_opcode **)); 228 if (rest_prefixes == NULL) 229 return NULL; 230 231 memset (rest_prefixes, 0, 65536 * sizeof (rest_prefixes[0])); 232 } 233 234 /* Get the right table if this is a prefix. 235 This code is connected to cris_constraints in that it knows what 236 prefixes play a role in recognition of patterns; the necessary 237 state is reflected by which table is used. If constraints 238 involving match or non-match of prefix insns are changed, then this 239 probably needs changing too. */ 240 if (prefix_insn != NO_CRIS_PREFIX) 241 { 242 const struct cris_opcode *popcodep 243 = (opc_table[prefix_insn] != NULL 244 ? opc_table[prefix_insn] 245 : get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata)); 246 247 if (popcodep == NULL) 248 return NULL; 249 250 if (popcodep->match == BDAP_QUICK_OPCODE) 251 { 252 /* Since some offsets are recognized with "push" macros, we 253 have to have different tables for them. */ 254 int offset = (prefix_insn & 255); 255 256 if (offset > 127) 257 offset -= 256; 258 259 switch (offset) 260 { 261 case -4: 262 prefix_opc_table = bdapq_m4_prefixes; 263 break; 264 265 case -2: 266 prefix_opc_table = bdapq_m2_prefixes; 267 break; 268 269 case -1: 270 prefix_opc_table = bdapq_m1_prefixes; 271 break; 272 273 default: 274 prefix_opc_table = rest_prefixes; 275 break; 276 } 277 } 278 else if (popcodep->match == DIP_OPCODE) 279 /* We don't allow postincrement when the prefix is DIP, so use a 280 different table for DIP. */ 281 prefix_opc_table = dip_prefixes; 282 else 283 prefix_opc_table = rest_prefixes; 284 } 285 286 if (prefix_insn != NO_CRIS_PREFIX 287 && prefix_opc_table[insn] != NULL) 288 max_matchedp = prefix_opc_table[insn]; 289 else if (prefix_insn == NO_CRIS_PREFIX && opc_table[insn] != NULL) 290 max_matchedp = opc_table[insn]; 291 else 292 { 293 const struct cris_opcode *opcodep; 294 int max_level_of_match = -1; 295 296 for (opcodep = cris_opcodes; 297 opcodep->name != NULL; 298 opcodep++) 299 { 300 int level_of_match; 301 302 if (disdata->distype == cris_dis_v32) 303 { 304 switch (opcodep->applicable_version) 305 { 306 case cris_ver_version_all: 307 break; 308 309 case cris_ver_v0_3: 310 case cris_ver_v0_10: 311 case cris_ver_v3_10: 312 case cris_ver_sim_v0_10: 313 case cris_ver_v8_10: 314 case cris_ver_v10: 315 case cris_ver_warning: 316 continue; 317 318 case cris_ver_v3p: 319 case cris_ver_v8p: 320 case cris_ver_v10p: 321 case cris_ver_v32p: 322 break; 323 324 case cris_ver_v8: 325 abort (); 326 default: 327 abort (); 328 } 329 } 330 else 331 { 332 switch (opcodep->applicable_version) 333 { 334 case cris_ver_version_all: 335 case cris_ver_v0_3: 336 case cris_ver_v3p: 337 case cris_ver_v0_10: 338 case cris_ver_v8p: 339 case cris_ver_v8_10: 340 case cris_ver_v10: 341 case cris_ver_sim_v0_10: 342 case cris_ver_v10p: 343 case cris_ver_warning: 344 break; 345 346 case cris_ver_v32p: 347 continue; 348 349 case cris_ver_v8: 350 abort (); 351 default: 352 abort (); 353 } 354 } 355 356 /* We give a double lead for bits matching the template in 357 cris_opcodes. Not even, because then "move p8,r10" would 358 be given 2 bits lead over "clear.d r10". When there's a 359 tie, the first entry in the table wins. This is 360 deliberate, to avoid a more complicated recognition 361 formula. */ 362 if ((opcodep->match & insn) == opcodep->match 363 && (opcodep->lose & insn) == 0 364 && ((level_of_match 365 = cris_constraint (opcodep->args, 366 insn, 367 prefix_insn, 368 disdata)) 369 >= 0) 370 && ((level_of_match 371 += 2 * number_of_bits (opcodep->match 372 | opcodep->lose)) 373 > max_level_of_match)) 374 { 375 max_matchedp = opcodep; 376 max_level_of_match = level_of_match; 377 378 /* If there was a full match, never mind looking 379 further. */ 380 if (level_of_match >= 2 * 16) 381 break; 382 } 383 } 384 /* Fill in the new entry. 385 386 If there are changes to the opcode-table involving prefixes, and 387 disassembly then does not work correctly, try removing the 388 else-clause below that fills in the prefix-table. If that 389 helps, you need to change the prefix_opc_table setting above, or 390 something related. */ 391 if (prefix_insn == NO_CRIS_PREFIX) 392 opc_table[insn] = max_matchedp; 393 else 394 prefix_opc_table[insn] = max_matchedp; 395 } 396 397 return max_matchedp; 398} 399 400/* Return -1 if the constraints of a bitwise-matched instruction say 401 that there is no match. Otherwise return a nonnegative number 402 indicating the confidence in the match (higher is better). */ 403 404static int 405cris_constraint (const char *cs, 406 unsigned int insn, 407 unsigned int prefix_insn, 408 struct cris_disasm_data *disdata) 409{ 410 int retval = 0; 411 int tmp; 412 int prefix_ok = 0; 413 const char *s; 414 415 for (s = cs; *s; s++) 416 switch (*s) 417 { 418 case '!': 419 /* Do not recognize "pop" if there's a prefix and then only for 420 v0..v10. */ 421 if (prefix_insn != NO_CRIS_PREFIX 422 || disdata->distype != cris_dis_v0_v10) 423 return -1; 424 break; 425 426 case 'U': 427 /* Not recognized at disassembly. */ 428 return -1; 429 430 case 'M': 431 /* Size modifier for "clear", i.e. special register 0, 4 or 8. 432 Check that it is one of them. Only special register 12 could 433 be mismatched, but checking for matches is more logical than 434 checking for mismatches when there are only a few cases. */ 435 tmp = ((insn >> 12) & 0xf); 436 if (tmp != 0 && tmp != 4 && tmp != 8) 437 return -1; 438 break; 439 440 case 'm': 441 if ((insn & 0x30) == 0x30) 442 return -1; 443 break; 444 445 case 'S': 446 /* A prefix operand without side-effect. */ 447 if (prefix_insn != NO_CRIS_PREFIX && (insn & 0x400) == 0) 448 { 449 prefix_ok = 1; 450 break; 451 } 452 else 453 return -1; 454 455 case 's': 456 case 'y': 457 case 'Y': 458 /* If this is a prefixed insn with postincrement (side-effect), 459 the prefix must not be DIP. */ 460 if (prefix_insn != NO_CRIS_PREFIX) 461 { 462 if (insn & 0x400) 463 { 464 const struct cris_opcode *prefix_opcodep 465 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 466 467 if (prefix_opcodep->match == DIP_OPCODE) 468 return -1; 469 } 470 471 prefix_ok = 1; 472 } 473 break; 474 475 case 'B': 476 /* If we don't fall through, then the prefix is ok. */ 477 prefix_ok = 1; 478 479 /* A "push" prefix. Check for valid "push" size. 480 In case of special register, it may be != 4. */ 481 if (prefix_insn != NO_CRIS_PREFIX) 482 { 483 /* Match the prefix insn to BDAPQ. */ 484 const struct cris_opcode *prefix_opcodep 485 = get_opcode_entry (prefix_insn, NO_CRIS_PREFIX, disdata); 486 487 if (prefix_opcodep->match == BDAP_QUICK_OPCODE) 488 { 489 int pushsize = (prefix_insn & 255); 490 491 if (pushsize > 127) 492 pushsize -= 256; 493 494 if (s[1] == 'P') 495 { 496 unsigned int spec_reg = (insn >> 12) & 15; 497 const struct cris_spec_reg *sregp 498 = spec_reg_info (spec_reg, disdata->distype); 499 500 /* For a special-register, the "prefix size" must 501 match the size of the register. */ 502 if (sregp && sregp->reg_size == (unsigned int) -pushsize) 503 break; 504 } 505 else if (s[1] == 'R') 506 { 507 if ((insn & 0x30) == 0x20 && pushsize == -4) 508 break; 509 } 510 /* FIXME: Should abort here; next constraint letter 511 *must* be 'P' or 'R'. */ 512 } 513 } 514 return -1; 515 516 case 'D': 517 retval = (((insn >> 12) & 15) == (insn & 15)); 518 if (!retval) 519 return -1; 520 else 521 retval += 4; 522 break; 523 524 case 'P': 525 { 526 const struct cris_spec_reg *sregp 527 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 528 529 /* Since we match four bits, we will give a value of 4-1 = 3 530 in a match. If there is a corresponding exact match of a 531 special register in another pattern, it will get a value of 532 4, which will be higher. This should be correct in that an 533 exact pattern would match better than a general pattern. 534 535 Note that there is a reason for not returning zero; the 536 pattern for "clear" is partly matched in the bit-pattern 537 (the two lower bits must be zero), while the bit-pattern 538 for a move from a special register is matched in the 539 register constraint. */ 540 541 if (sregp != NULL) 542 { 543 retval += 3; 544 break; 545 } 546 else 547 return -1; 548 } 549 } 550 551 if (prefix_insn != NO_CRIS_PREFIX && ! prefix_ok) 552 return -1; 553 554 return retval; 555} 556 557/* Format number as hex with a leading "0x" into outbuffer. */ 558 559static char * 560format_hex (unsigned long number, 561 char *outbuffer, 562 struct cris_disasm_data *disdata) 563{ 564 /* Truncate negative numbers on >32-bit hosts. */ 565 number &= 0xffffffff; 566 567 sprintf (outbuffer, "0x%lx", number); 568 569 /* Save this value for the "case" support. */ 570 if (TRACE_CASE) 571 last_immediate = number; 572 573 return outbuffer + strlen (outbuffer); 574} 575 576/* Format number as decimal into outbuffer. Parameter signedp says 577 whether the number should be formatted as signed (!= 0) or 578 unsigned (== 0). */ 579 580static char * 581format_dec (long number, char *outbuffer, int signedp) 582{ 583 last_immediate = number; 584 sprintf (outbuffer, signedp ? "%ld" : "%lu", number); 585 586 return outbuffer + strlen (outbuffer); 587} 588 589/* Format the name of the general register regno into outbuffer. */ 590 591static char * 592format_reg (struct cris_disasm_data *disdata, 593 int regno, 594 char *outbuffer_start, 595 bfd_boolean with_reg_prefix) 596{ 597 char *outbuffer = outbuffer_start; 598 599 if (with_reg_prefix) 600 *outbuffer++ = REGISTER_PREFIX_CHAR; 601 602 switch (regno) 603 { 604 case 15: 605 /* For v32, there is no context in which we output PC. */ 606 if (disdata->distype == cris_dis_v32) 607 strcpy (outbuffer, "acr"); 608 else 609 strcpy (outbuffer, "pc"); 610 break; 611 612 case 14: 613 strcpy (outbuffer, "sp"); 614 break; 615 616 default: 617 sprintf (outbuffer, "r%d", regno); 618 break; 619 } 620 621 return outbuffer_start + strlen (outbuffer_start); 622} 623 624/* Format the name of a support register into outbuffer. */ 625 626static char * 627format_sup_reg (unsigned int regno, 628 char *outbuffer_start, 629 bfd_boolean with_reg_prefix) 630{ 631 char *outbuffer = outbuffer_start; 632 int i; 633 634 if (with_reg_prefix) 635 *outbuffer++ = REGISTER_PREFIX_CHAR; 636 637 for (i = 0; cris_support_regs[i].name != NULL; i++) 638 if (cris_support_regs[i].number == regno) 639 { 640 sprintf (outbuffer, "%s", cris_support_regs[i].name); 641 return outbuffer_start + strlen (outbuffer_start); 642 } 643 644 /* There's supposed to be register names covering all numbers, though 645 some may be generic names. */ 646 sprintf (outbuffer, "format_sup_reg-BUG"); 647 return outbuffer_start + strlen (outbuffer_start); 648} 649 650/* Return the length of an instruction. */ 651 652static unsigned 653bytes_to_skip (unsigned int insn, 654 const struct cris_opcode *matchedp, 655 enum cris_disass_family distype, 656 const struct cris_opcode *prefix_matchedp) 657{ 658 /* Each insn is a word plus "immediate" operands. */ 659 unsigned to_skip = 2; 660 const char *template = matchedp->args; 661 const char *s; 662 663 for (s = template; *s; s++) 664 if ((*s == 's' || *s == 'N' || *s == 'Y') 665 && (insn & 0x400) && (insn & 15) == 15 666 && prefix_matchedp == NULL) 667 { 668 /* Immediate via [pc+], so we have to check the size of the 669 operand. */ 670 int mode_size = 1 << ((insn >> 4) & (*template == 'z' ? 1 : 3)); 671 672 if (matchedp->imm_oprnd_size == SIZE_FIX_32) 673 to_skip += 4; 674 else if (matchedp->imm_oprnd_size == SIZE_SPEC_REG) 675 { 676 const struct cris_spec_reg *sregp 677 = spec_reg_info ((insn >> 12) & 15, distype); 678 679 /* FIXME: Improve error handling; should have been caught 680 earlier. */ 681 if (sregp == NULL) 682 return 2; 683 684 /* PC is incremented by two, not one, for a byte. Except on 685 CRISv32, where constants are always DWORD-size for 686 special registers. */ 687 to_skip += 688 distype == cris_dis_v32 ? 4 : (sregp->reg_size + 1) & ~1; 689 } 690 else 691 to_skip += (mode_size + 1) & ~1; 692 } 693 else if (*s == 'n') 694 to_skip += 4; 695 else if (*s == 'b') 696 to_skip += 2; 697 698 return to_skip; 699} 700 701/* Print condition code flags. */ 702 703static char * 704print_flags (struct cris_disasm_data *disdata, unsigned int insn, char *cp) 705{ 706 /* Use the v8 (Etrax 100) flag definitions for disassembly. 707 The differences with v0 (Etrax 1..4) vs. Svinto are: 708 v0 'd' <=> v8 'm' 709 v0 'e' <=> v8 'b'. 710 FIXME: Emit v0..v3 flag names somehow. */ 711 static const char v8_fnames[] = "cvznxibm"; 712 static const char v32_fnames[] = "cvznxiup"; 713 const char *fnames 714 = disdata->distype == cris_dis_v32 ? v32_fnames : v8_fnames; 715 716 unsigned char flagbits = (((insn >> 8) & 0xf0) | (insn & 15)); 717 int i; 718 719 for (i = 0; i < 8; i++) 720 if (flagbits & (1 << i)) 721 *cp++ = fnames[i]; 722 723 return cp; 724} 725 726/* Print out an insn with its operands, and update the info->insn_type 727 fields. The prefix_opcodep and the rest hold a prefix insn that is 728 supposed to be output as an address mode. */ 729 730static void 731print_with_operands (const struct cris_opcode *opcodep, 732 unsigned int insn, 733 unsigned char *buffer, 734 bfd_vma addr, 735 disassemble_info *info, 736 /* If a prefix insn was before this insn (and is supposed 737 to be output as an address), here is a description of 738 it. */ 739 const struct cris_opcode *prefix_opcodep, 740 unsigned int prefix_insn, 741 unsigned char *prefix_buffer, 742 bfd_boolean with_reg_prefix) 743{ 744 /* Get a buffer of somewhat reasonable size where we store 745 intermediate parts of the insn. */ 746 char temp[sizeof (".d [$r13=$r12-2147483648],$r10") * 2]; 747 char *tp = temp; 748 static const char mode_char[] = "bwd?"; 749 const char *s; 750 const char *cs; 751 struct cris_disasm_data *disdata 752 = (struct cris_disasm_data *) info->private_data; 753 754 /* Print out the name first thing we do. */ 755 (*info->fprintf_func) (info->stream, "%s", opcodep->name); 756 757 cs = opcodep->args; 758 s = cs; 759 760 /* Ignore any prefix indicator. */ 761 if (*s == 'p') 762 s++; 763 764 if (*s == 'm' || *s == 'M' || *s == 'z') 765 { 766 *tp++ = '.'; 767 768 /* Get the size-letter. */ 769 *tp++ = *s == 'M' 770 ? (insn & 0x8000 ? 'd' 771 : insn & 0x4000 ? 'w' : 'b') 772 : mode_char[(insn >> 4) & (*s == 'z' ? 1 : 3)]; 773 774 /* Ignore the size and the space character that follows. */ 775 s += 2; 776 } 777 778 /* Add a space if this isn't a long-branch, because for those will add 779 the condition part of the name later. */ 780 if (opcodep->match != (BRANCH_PC_LOW + BRANCH_INCR_HIGH * 256)) 781 *tp++ = ' '; 782 783 /* Fill in the insn-type if deducible from the name (and there's no 784 better way). */ 785 if (opcodep->name[0] == 'j') 786 { 787 if (CONST_STRNEQ (opcodep->name, "jsr")) 788 /* It's "jsr" or "jsrc". */ 789 info->insn_type = dis_jsr; 790 else 791 /* Any other jump-type insn is considered a branch. */ 792 info->insn_type = dis_branch; 793 } 794 795 /* We might know some more fields right now. */ 796 info->branch_delay_insns = opcodep->delayed; 797 798 /* Handle operands. */ 799 for (; *s; s++) 800 { 801 switch (*s) 802 { 803 case 'T': 804 tp = format_sup_reg ((insn >> 12) & 15, tp, with_reg_prefix); 805 break; 806 807 case 'A': 808 if (with_reg_prefix) 809 *tp++ = REGISTER_PREFIX_CHAR; 810 *tp++ = 'a'; 811 *tp++ = 'c'; 812 *tp++ = 'r'; 813 break; 814 815 case '[': 816 case ']': 817 case ',': 818 *tp++ = *s; 819 break; 820 821 case '!': 822 /* Ignore at this point; used at earlier stages to avoid 823 recognition if there's a prefix at something that in other 824 ways looks like a "pop". */ 825 break; 826 827 case 'd': 828 /* Ignore. This is an optional ".d " on the large one of 829 relaxable insns. */ 830 break; 831 832 case 'B': 833 /* This was the prefix that made this a "push". We've already 834 handled it by recognizing it, so signal that the prefix is 835 handled by setting it to NULL. */ 836 prefix_opcodep = NULL; 837 break; 838 839 case 'D': 840 case 'r': 841 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 842 break; 843 844 case 'R': 845 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 846 break; 847 848 case 'n': 849 { 850 /* Like N but pc-relative to the start of the insn. */ 851 unsigned long number 852 = (buffer[2] + buffer[3] * 256 + buffer[4] * 65536 853 + buffer[5] * 0x1000000 + addr); 854 855 /* Finish off and output previous formatted bytes. */ 856 *tp = 0; 857 if (temp[0]) 858 (*info->fprintf_func) (info->stream, "%s", temp); 859 tp = temp; 860 861 (*info->print_address_func) ((bfd_vma) number, info); 862 } 863 break; 864 865 case 'u': 866 { 867 /* Like n but the offset is bits <3:0> in the instruction. */ 868 unsigned long number = (buffer[0] & 0xf) * 2 + addr; 869 870 /* Finish off and output previous formatted bytes. */ 871 *tp = 0; 872 if (temp[0]) 873 (*info->fprintf_func) (info->stream, "%s", temp); 874 tp = temp; 875 876 (*info->print_address_func) ((bfd_vma) number, info); 877 } 878 break; 879 880 case 'N': 881 case 'y': 882 case 'Y': 883 case 'S': 884 case 's': 885 /* Any "normal" memory operand. */ 886 if ((insn & 0x400) && (insn & 15) == 15 && prefix_opcodep == NULL) 887 { 888 /* We're looking at [pc+], i.e. we need to output an immediate 889 number, where the size can depend on different things. */ 890 long number; 891 int signedp 892 = ((*cs == 'z' && (insn & 0x20)) 893 || opcodep->match == BDAP_QUICK_OPCODE); 894 int nbytes; 895 896 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 897 nbytes = 4; 898 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 899 { 900 const struct cris_spec_reg *sregp 901 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 902 903 /* A NULL return should have been as a non-match earlier, 904 so catch it as an internal error in the error-case 905 below. */ 906 if (sregp == NULL) 907 /* Whatever non-valid size. */ 908 nbytes = 42; 909 else 910 /* PC is always incremented by a multiple of two. 911 For CRISv32, immediates are always 4 bytes for 912 special registers. */ 913 nbytes = disdata->distype == cris_dis_v32 914 ? 4 : (sregp->reg_size + 1) & ~1; 915 } 916 else 917 { 918 int mode_size = 1 << ((insn >> 4) & (*cs == 'z' ? 1 : 3)); 919 920 if (mode_size == 1) 921 nbytes = 2; 922 else 923 nbytes = mode_size; 924 } 925 926 switch (nbytes) 927 { 928 case 1: 929 number = buffer[2]; 930 if (signedp && number > 127) 931 number -= 256; 932 break; 933 934 case 2: 935 number = buffer[2] + buffer[3] * 256; 936 if (signedp && number > 32767) 937 number -= 65536; 938 break; 939 940 case 4: 941 number 942 = buffer[2] + buffer[3] * 256 + buffer[4] * 65536 943 + buffer[5] * 0x1000000; 944 break; 945 946 default: 947 strcpy (tp, "bug"); 948 tp += 3; 949 number = 42; 950 } 951 952 if ((*cs == 'z' && (insn & 0x20)) 953 || (opcodep->match == BDAP_QUICK_OPCODE 954 && (nbytes <= 2 || buffer[1 + nbytes] == 0))) 955 tp = format_dec (number, tp, signedp); 956 else 957 { 958 unsigned int highbyte = (number >> 24) & 0xff; 959 960 /* Either output this as an address or as a number. If it's 961 a dword with the same high-byte as the address of the 962 insn, assume it's an address, and also if it's a non-zero 963 non-0xff high-byte. If this is a jsr or a jump, then 964 it's definitely an address. */ 965 if (nbytes == 4 966 && (highbyte == ((addr >> 24) & 0xff) 967 || (highbyte != 0 && highbyte != 0xff) 968 || info->insn_type == dis_branch 969 || info->insn_type == dis_jsr)) 970 { 971 /* Finish off and output previous formatted bytes. */ 972 *tp = 0; 973 tp = temp; 974 if (temp[0]) 975 (*info->fprintf_func) (info->stream, "%s", temp); 976 977 (*info->print_address_func) ((bfd_vma) number, info); 978 979 info->target = number; 980 } 981 else 982 tp = format_hex (number, tp, disdata); 983 } 984 } 985 else 986 { 987 /* Not an immediate number. Then this is a (possibly 988 prefixed) memory operand. */ 989 if (info->insn_type != dis_nonbranch) 990 { 991 int mode_size 992 = 1 << ((insn >> 4) 993 & (opcodep->args[0] == 'z' ? 1 : 3)); 994 int size; 995 info->insn_type = dis_dref; 996 info->flags |= CRIS_DIS_FLAG_MEMREF; 997 998 if (opcodep->imm_oprnd_size == SIZE_FIX_32) 999 size = 4; 1000 else if (opcodep->imm_oprnd_size == SIZE_SPEC_REG) 1001 { 1002 const struct cris_spec_reg *sregp 1003 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1004 1005 /* FIXME: Improve error handling; should have been caught 1006 earlier. */ 1007 if (sregp == NULL) 1008 size = 4; 1009 else 1010 size = sregp->reg_size; 1011 } 1012 else 1013 size = mode_size; 1014 1015 info->data_size = size; 1016 } 1017 1018 *tp++ = '['; 1019 1020 if (prefix_opcodep 1021 /* We don't match dip with a postincremented field 1022 as a side-effect address mode. */ 1023 && ((insn & 0x400) == 0 1024 || prefix_opcodep->match != DIP_OPCODE)) 1025 { 1026 if (insn & 0x400) 1027 { 1028 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1029 *tp++ = '='; 1030 } 1031 1032 1033 /* We mainly ignore the prefix format string when the 1034 address-mode syntax is output. */ 1035 switch (prefix_opcodep->match) 1036 { 1037 case DIP_OPCODE: 1038 /* It's [r], [r+] or [pc+]. */ 1039 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1040 { 1041 /* It's [pc+]. This cannot possibly be anything 1042 but an address. */ 1043 unsigned long number 1044 = prefix_buffer[2] + prefix_buffer[3] * 256 1045 + prefix_buffer[4] * 65536 1046 + prefix_buffer[5] * 0x1000000; 1047 1048 info->target = (bfd_vma) number; 1049 1050 /* Finish off and output previous formatted 1051 data. */ 1052 *tp = 0; 1053 tp = temp; 1054 if (temp[0]) 1055 (*info->fprintf_func) (info->stream, "%s", temp); 1056 1057 (*info->print_address_func) ((bfd_vma) number, info); 1058 } 1059 else 1060 { 1061 /* For a memref in an address, we use target2. 1062 In this case, target is zero. */ 1063 info->flags 1064 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1065 | CRIS_DIS_FLAG_MEM_TARGET2_MEM); 1066 1067 info->target2 = prefix_insn & 15; 1068 1069 *tp++ = '['; 1070 tp = format_reg (disdata, prefix_insn & 15, tp, 1071 with_reg_prefix); 1072 if (prefix_insn & 0x400) 1073 *tp++ = '+'; 1074 *tp++ = ']'; 1075 } 1076 break; 1077 1078 case BDAP_QUICK_OPCODE: 1079 { 1080 int number; 1081 1082 number = prefix_buffer[0]; 1083 if (number > 127) 1084 number -= 256; 1085 1086 /* Output "reg+num" or, if num < 0, "reg-num". */ 1087 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1088 with_reg_prefix); 1089 if (number >= 0) 1090 *tp++ = '+'; 1091 tp = format_dec (number, tp, 1); 1092 1093 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1094 info->target = (prefix_insn >> 12) & 15; 1095 info->target2 = (bfd_vma) number; 1096 break; 1097 } 1098 1099 case BIAP_OPCODE: 1100 /* Output "r+R.m". */ 1101 tp = format_reg (disdata, prefix_insn & 15, tp, 1102 with_reg_prefix); 1103 *tp++ = '+'; 1104 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1105 with_reg_prefix); 1106 *tp++ = '.'; 1107 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1108 1109 info->flags 1110 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1111 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1112 1113 | ((prefix_insn & 0x8000) 1114 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT4 1115 : ((prefix_insn & 0x8000) 1116 ? CRIS_DIS_FLAG_MEM_TARGET2_MULT2 : 0))); 1117 1118 /* Is it the casejump? It's a "adds.w [pc+r%d.w],pc". */ 1119 if (insn == 0xf83f && (prefix_insn & ~0xf000) == 0x55f) 1120 /* Then start interpreting data as offsets. */ 1121 case_offset_counter = no_of_case_offsets; 1122 break; 1123 1124 case BDAP_INDIR_OPCODE: 1125 /* Output "r+s.m", or, if "s" is [pc+], "r+s" or 1126 "r-s". */ 1127 tp = format_reg (disdata, (prefix_insn >> 12) & 15, tp, 1128 with_reg_prefix); 1129 1130 if ((prefix_insn & 0x400) && (prefix_insn & 15) == 15) 1131 { 1132 long number; 1133 unsigned int nbytes; 1134 1135 /* It's a value. Get its size. */ 1136 int mode_size = 1 << ((prefix_insn >> 4) & 3); 1137 1138 if (mode_size == 1) 1139 nbytes = 2; 1140 else 1141 nbytes = mode_size; 1142 1143 switch (nbytes) 1144 { 1145 case 1: 1146 number = prefix_buffer[2]; 1147 if (number > 127) 1148 number -= 256; 1149 break; 1150 1151 case 2: 1152 number = prefix_buffer[2] + prefix_buffer[3] * 256; 1153 if (number > 32767) 1154 number -= 65536; 1155 break; 1156 1157 case 4: 1158 number 1159 = prefix_buffer[2] + prefix_buffer[3] * 256 1160 + prefix_buffer[4] * 65536 1161 + prefix_buffer[5] * 0x1000000; 1162 break; 1163 1164 default: 1165 strcpy (tp, "bug"); 1166 tp += 3; 1167 number = 42; 1168 } 1169 1170 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1171 info->target2 = (bfd_vma) number; 1172 1173 /* If the size is dword, then assume it's an 1174 address. */ 1175 if (nbytes == 4) 1176 { 1177 /* Finish off and output previous formatted 1178 bytes. */ 1179 *tp++ = '+'; 1180 *tp = 0; 1181 tp = temp; 1182 (*info->fprintf_func) (info->stream, "%s", temp); 1183 1184 (*info->print_address_func) ((bfd_vma) number, info); 1185 } 1186 else 1187 { 1188 if (number >= 0) 1189 *tp++ = '+'; 1190 tp = format_dec (number, tp, 1); 1191 } 1192 } 1193 else 1194 { 1195 /* Output "r+[R].m" or "r+[R+].m". */ 1196 *tp++ = '+'; 1197 *tp++ = '['; 1198 tp = format_reg (disdata, prefix_insn & 15, tp, 1199 with_reg_prefix); 1200 if (prefix_insn & 0x400) 1201 *tp++ = '+'; 1202 *tp++ = ']'; 1203 *tp++ = '.'; 1204 *tp++ = mode_char[(prefix_insn >> 4) & 3]; 1205 1206 info->flags 1207 |= (CRIS_DIS_FLAG_MEM_TARGET2_IS_REG 1208 | CRIS_DIS_FLAG_MEM_TARGET2_MEM 1209 | CRIS_DIS_FLAG_MEM_TARGET_IS_REG 1210 1211 | (((prefix_insn >> 4) == 2) 1212 ? 0 1213 : (((prefix_insn >> 4) & 3) == 1 1214 ? CRIS_DIS_FLAG_MEM_TARGET2_MEM_WORD 1215 : CRIS_DIS_FLAG_MEM_TARGET2_MEM_BYTE))); 1216 } 1217 break; 1218 1219 default: 1220 (*info->fprintf_func) (info->stream, "?prefix-bug"); 1221 } 1222 1223 /* To mark that the prefix is used, reset it. */ 1224 prefix_opcodep = NULL; 1225 } 1226 else 1227 { 1228 tp = format_reg (disdata, insn & 15, tp, with_reg_prefix); 1229 1230 info->flags |= CRIS_DIS_FLAG_MEM_TARGET_IS_REG; 1231 info->target = insn & 15; 1232 1233 if (insn & 0x400) 1234 *tp++ = '+'; 1235 } 1236 *tp++ = ']'; 1237 } 1238 break; 1239 1240 case 'x': 1241 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1242 *tp++ = '.'; 1243 *tp++ = mode_char[(insn >> 4) & 3]; 1244 break; 1245 1246 case 'I': 1247 tp = format_dec (insn & 63, tp, 0); 1248 break; 1249 1250 case 'b': 1251 { 1252 int where = buffer[2] + buffer[3] * 256; 1253 1254 if (where > 32767) 1255 where -= 65536; 1256 1257 where += addr + ((disdata->distype == cris_dis_v32) ? 0 : 4); 1258 1259 if (insn == BA_PC_INCR_OPCODE) 1260 info->insn_type = dis_branch; 1261 else 1262 info->insn_type = dis_condbranch; 1263 1264 info->target = (bfd_vma) where; 1265 1266 *tp = 0; 1267 tp = temp; 1268 (*info->fprintf_func) (info->stream, "%s%s ", 1269 temp, cris_cc_strings[insn >> 12]); 1270 1271 (*info->print_address_func) ((bfd_vma) where, info); 1272 } 1273 break; 1274 1275 case 'c': 1276 tp = format_dec (insn & 31, tp, 0); 1277 break; 1278 1279 case 'C': 1280 tp = format_dec (insn & 15, tp, 0); 1281 break; 1282 1283 case 'o': 1284 { 1285 long offset = insn & 0xfe; 1286 bfd_vma target; 1287 1288 if (insn & 1) 1289 offset |= ~0xff; 1290 1291 if (opcodep->match == BA_QUICK_OPCODE) 1292 info->insn_type = dis_branch; 1293 else 1294 info->insn_type = dis_condbranch; 1295 1296 target = addr + ((disdata->distype == cris_dis_v32) ? 0 : 2) + offset; 1297 info->target = target; 1298 *tp = 0; 1299 tp = temp; 1300 (*info->fprintf_func) (info->stream, "%s", temp); 1301 (*info->print_address_func) (target, info); 1302 } 1303 break; 1304 1305 case 'Q': 1306 case 'O': 1307 { 1308 long number = buffer[0]; 1309 1310 if (number > 127) 1311 number = number - 256; 1312 1313 tp = format_dec (number, tp, 1); 1314 *tp++ = ','; 1315 tp = format_reg (disdata, (insn >> 12) & 15, tp, with_reg_prefix); 1316 } 1317 break; 1318 1319 case 'f': 1320 tp = print_flags (disdata, insn, tp); 1321 break; 1322 1323 case 'i': 1324 tp = format_dec ((insn & 32) ? (insn & 31) | ~31L : insn & 31, tp, 1); 1325 break; 1326 1327 case 'P': 1328 { 1329 const struct cris_spec_reg *sregp 1330 = spec_reg_info ((insn >> 12) & 15, disdata->distype); 1331 1332 if (sregp->name == NULL) 1333 /* Should have been caught as a non-match eariler. */ 1334 *tp++ = '?'; 1335 else 1336 { 1337 if (with_reg_prefix) 1338 *tp++ = REGISTER_PREFIX_CHAR; 1339 strcpy (tp, sregp->name); 1340 tp += strlen (tp); 1341 } 1342 } 1343 break; 1344 1345 default: 1346 strcpy (tp, "???"); 1347 tp += 3; 1348 } 1349 } 1350 1351 *tp = 0; 1352 1353 if (prefix_opcodep) 1354 (*info->fprintf_func) (info->stream, " (OOPS unused prefix \"%s: %s\")", 1355 prefix_opcodep->name, prefix_opcodep->args); 1356 1357 (*info->fprintf_func) (info->stream, "%s", temp); 1358 1359 /* Get info for matching case-tables, if we don't have any active. 1360 We assume that the last constant seen is used; either in the insn 1361 itself or in a "move.d const,rN, sub.d rN,rM"-like sequence. */ 1362 if (TRACE_CASE && case_offset_counter == 0) 1363 { 1364 if (CONST_STRNEQ (opcodep->name, "sub")) 1365 case_offset = last_immediate; 1366 1367 /* It could also be an "add", if there are negative case-values. */ 1368 else if (CONST_STRNEQ (opcodep->name, "add")) 1369 /* The first case is the negated operand to the add. */ 1370 case_offset = -last_immediate; 1371 1372 /* A bound insn will tell us the number of cases. */ 1373 else if (CONST_STRNEQ (opcodep->name, "bound")) 1374 no_of_case_offsets = last_immediate + 1; 1375 1376 /* A jump or jsr or branch breaks the chain of insns for a 1377 case-table, so assume default first-case again. */ 1378 else if (info->insn_type == dis_jsr 1379 || info->insn_type == dis_branch 1380 || info->insn_type == dis_condbranch) 1381 case_offset = 0; 1382 } 1383} 1384 1385 1386/* Print the CRIS instruction at address memaddr on stream. Returns 1387 length of the instruction, in bytes. Prefix register names with `$' if 1388 WITH_REG_PREFIX. */ 1389 1390static int 1391print_insn_cris_generic (bfd_vma memaddr, 1392 disassemble_info *info, 1393 bfd_boolean with_reg_prefix) 1394{ 1395 int nbytes; 1396 unsigned int insn; 1397 const struct cris_opcode *matchedp; 1398 int advance = 0; 1399 struct cris_disasm_data *disdata 1400 = (struct cris_disasm_data *) info->private_data; 1401 1402 /* No instruction will be disassembled as longer than this number of 1403 bytes; stacked prefixes will not be expanded. */ 1404 unsigned char buffer[MAX_BYTES_PER_CRIS_INSN]; 1405 unsigned char *bufp; 1406 int status = 0; 1407 bfd_vma addr; 1408 1409 /* There will be an "out of range" error after the last instruction. 1410 Reading pairs of bytes in decreasing number, we hope that we will get 1411 at least the amount that we will consume. 1412 1413 If we can't get any data, or we do not get enough data, we print 1414 the error message. */ 1415 1416 for (nbytes = MAX_BYTES_PER_CRIS_INSN; nbytes > 0; nbytes -= 2) 1417 { 1418 status = (*info->read_memory_func) (memaddr, buffer, nbytes, info); 1419 if (status == 0) 1420 break; 1421 } 1422 1423 /* If we did not get all we asked for, then clear the rest. 1424 Hopefully this makes a reproducible result in case of errors. */ 1425 if (nbytes != MAX_BYTES_PER_CRIS_INSN) 1426 memset (buffer + nbytes, 0, MAX_BYTES_PER_CRIS_INSN - nbytes); 1427 1428 addr = memaddr; 1429 bufp = buffer; 1430 1431 /* Set some defaults for the insn info. */ 1432 info->insn_info_valid = 1; 1433 info->branch_delay_insns = 0; 1434 info->data_size = 0; 1435 info->insn_type = dis_nonbranch; 1436 info->flags = 0; 1437 info->target = 0; 1438 info->target2 = 0; 1439 1440 /* If we got any data, disassemble it. */ 1441 if (nbytes != 0) 1442 { 1443 matchedp = NULL; 1444 1445 insn = bufp[0] + bufp[1] * 256; 1446 1447 /* If we're in a case-table, don't disassemble the offsets. */ 1448 if (TRACE_CASE && case_offset_counter != 0) 1449 { 1450 info->insn_type = dis_noninsn; 1451 advance += 2; 1452 1453 /* If to print data as offsets, then shortcut here. */ 1454 (*info->fprintf_func) (info->stream, "case %ld%s: -> ", 1455 case_offset + no_of_case_offsets 1456 - case_offset_counter, 1457 case_offset_counter == 1 ? "/default" : 1458 ""); 1459 1460 (*info->print_address_func) ((bfd_vma) 1461 ((short) (insn) 1462 + (long) (addr 1463 - (no_of_case_offsets 1464 - case_offset_counter) 1465 * 2)), info); 1466 case_offset_counter--; 1467 1468 /* The default case start (without a "sub" or "add") must be 1469 zero. */ 1470 if (case_offset_counter == 0) 1471 case_offset = 0; 1472 } 1473 else if (insn == 0) 1474 { 1475 /* We're often called to disassemble zeroes. While this is a 1476 valid "bcc .+2" insn, it is also useless enough and enough 1477 of a nuiscance that we will just output "bcc .+2" for it 1478 and signal it as a noninsn. */ 1479 (*info->fprintf_func) (info->stream, 1480 disdata->distype == cris_dis_v32 1481 ? "bcc ." : "bcc .+2"); 1482 info->insn_type = dis_noninsn; 1483 advance += 2; 1484 } 1485 else 1486 { 1487 const struct cris_opcode *prefix_opcodep = NULL; 1488 unsigned char *prefix_buffer = bufp; 1489 unsigned int prefix_insn = insn; 1490 int prefix_size = 0; 1491 1492 matchedp = get_opcode_entry (insn, NO_CRIS_PREFIX, disdata); 1493 1494 /* Check if we're supposed to write out prefixes as address 1495 modes and if this was a prefix. */ 1496 if (matchedp != NULL && PARSE_PREFIX && matchedp->args[0] == 'p') 1497 { 1498 /* If it's a prefix, put it into the prefix vars and get the 1499 main insn. */ 1500 prefix_size = bytes_to_skip (prefix_insn, matchedp, 1501 disdata->distype, NULL); 1502 prefix_opcodep = matchedp; 1503 1504 insn = bufp[prefix_size] + bufp[prefix_size + 1] * 256; 1505 matchedp = get_opcode_entry (insn, prefix_insn, disdata); 1506 1507 if (matchedp != NULL) 1508 { 1509 addr += prefix_size; 1510 bufp += prefix_size; 1511 advance += prefix_size; 1512 } 1513 else 1514 { 1515 /* The "main" insn wasn't valid, at least not when 1516 prefixed. Put back things enough to output the 1517 prefix insn only, as a normal insn. */ 1518 matchedp = prefix_opcodep; 1519 insn = prefix_insn; 1520 prefix_opcodep = NULL; 1521 } 1522 } 1523 1524 if (matchedp == NULL) 1525 { 1526 (*info->fprintf_func) (info->stream, "??0x%x", insn); 1527 advance += 2; 1528 1529 info->insn_type = dis_noninsn; 1530 } 1531 else 1532 { 1533 advance 1534 += bytes_to_skip (insn, matchedp, disdata->distype, 1535 prefix_opcodep); 1536 1537 /* The info_type and assorted fields will be set according 1538 to the operands. */ 1539 print_with_operands (matchedp, insn, bufp, addr, info, 1540 prefix_opcodep, prefix_insn, 1541 prefix_buffer, with_reg_prefix); 1542 } 1543 } 1544 } 1545 else 1546 info->insn_type = dis_noninsn; 1547 1548 /* If we read less than MAX_BYTES_PER_CRIS_INSN, i.e. we got an error 1549 status when reading that much, and the insn decoding indicated a 1550 length exceeding what we read, there is an error. */ 1551 if (status != 0 && (nbytes == 0 || advance > nbytes)) 1552 { 1553 (*info->memory_error_func) (status, memaddr, info); 1554 return -1; 1555 } 1556 1557 /* Max supported insn size with one folded prefix insn. */ 1558 info->bytes_per_line = MAX_BYTES_PER_CRIS_INSN; 1559 1560 /* I would like to set this to a fixed value larger than the actual 1561 number of bytes to print in order to avoid spaces between bytes, 1562 but objdump.c (2.9.1) does not like that, so we print 16-bit 1563 chunks, which is the next choice. */ 1564 info->bytes_per_chunk = 2; 1565 1566 /* Printing bytes in order of increasing addresses makes sense, 1567 especially on a little-endian target. 1568 This is completely the opposite of what you think; setting this to 1569 BFD_ENDIAN_LITTLE will print bytes in order N..0 rather than the 0..N 1570 we want. */ 1571 info->display_endian = BFD_ENDIAN_BIG; 1572 1573 return advance; 1574} 1575 1576/* Disassemble, prefixing register names with `$'. CRIS v0..v10. */ 1577 1578static int 1579print_insn_cris_with_register_prefix (bfd_vma vma, 1580 disassemble_info *info) 1581{ 1582 if (info->private_data == NULL 1583 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1584 return -1; 1585 return print_insn_cris_generic (vma, info, TRUE); 1586} 1587 1588/* Disassemble, prefixing register names with `$'. CRIS v32. */ 1589 1590static int 1591print_insn_crisv32_with_register_prefix (bfd_vma vma, 1592 disassemble_info *info) 1593{ 1594 if (info->private_data == NULL 1595 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1596 return -1; 1597 return print_insn_cris_generic (vma, info, TRUE); 1598} 1599 1600/* Disassemble, prefixing register names with `$'. 1601 Common v10 and v32 subset. */ 1602 1603static int 1604print_insn_crisv10_v32_with_register_prefix (bfd_vma vma, 1605 disassemble_info *info) 1606{ 1607 if (info->private_data == NULL 1608 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1609 return -1; 1610 return print_insn_cris_generic (vma, info, TRUE); 1611} 1612 1613/* Disassemble, no prefixes on register names. CRIS v0..v10. */ 1614 1615static int 1616print_insn_cris_without_register_prefix (bfd_vma vma, 1617 disassemble_info *info) 1618{ 1619 if (info->private_data == NULL 1620 && !cris_parse_disassembler_options (info, cris_dis_v0_v10)) 1621 return -1; 1622 return print_insn_cris_generic (vma, info, FALSE); 1623} 1624 1625/* Disassemble, no prefixes on register names. CRIS v32. */ 1626 1627static int 1628print_insn_crisv32_without_register_prefix (bfd_vma vma, 1629 disassemble_info *info) 1630{ 1631 if (info->private_data == NULL 1632 && !cris_parse_disassembler_options (info, cris_dis_v32)) 1633 return -1; 1634 return print_insn_cris_generic (vma, info, FALSE); 1635} 1636 1637/* Disassemble, no prefixes on register names. 1638 Common v10 and v32 subset. */ 1639 1640static int 1641print_insn_crisv10_v32_without_register_prefix (bfd_vma vma, 1642 disassemble_info *info) 1643{ 1644 if (info->private_data == NULL 1645 && !cris_parse_disassembler_options (info, cris_dis_common_v10_v32)) 1646 return -1; 1647 return print_insn_cris_generic (vma, info, FALSE); 1648} 1649 1650/* Return a disassembler-function that prints registers with a `$' prefix, 1651 or one that prints registers without a prefix. 1652 FIXME: We should improve the solution to avoid the multitude of 1653 functions seen above. */ 1654 1655disassembler_ftype 1656cris_get_disassembler (bfd *abfd) 1657{ 1658 /* If there's no bfd in sight, we return what is valid as input in all 1659 contexts if fed back to the assembler: disassembly *with* register 1660 prefix. Unfortunately this will be totally wrong for v32. */ 1661 if (abfd == NULL) 1662 return print_insn_cris_with_register_prefix; 1663 1664 if (bfd_get_symbol_leading_char (abfd) == 0) 1665 { 1666 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1667 return print_insn_crisv32_with_register_prefix; 1668 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1669 return print_insn_crisv10_v32_with_register_prefix; 1670 1671 /* We default to v10. This may be specifically specified in the 1672 bfd mach, but is also the default setting. */ 1673 return print_insn_cris_with_register_prefix; 1674 } 1675 1676 if (bfd_get_mach (abfd) == bfd_mach_cris_v32) 1677 return print_insn_crisv32_without_register_prefix; 1678 if (bfd_get_mach (abfd) == bfd_mach_cris_v10_v32) 1679 return print_insn_crisv10_v32_without_register_prefix; 1680 return print_insn_cris_without_register_prefix; 1681} 1682 1683/* Local variables: 1684 eval: (c-set-style "gnu") 1685 indent-tabs-mode: t 1686 End: */ 1687