1/* Target-dependent code for the NEC V850 for GDB, the GNU debugger. 2 3 Copyright (C) 1996, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007 4 Free Software Foundation, Inc. 5 6 This file is part of GDB. 7 8 This program is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3 of the License, or 11 (at your option) any later version. 12 13 This program is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 20 21#include "defs.h" 22#include "frame.h" 23#include "frame-base.h" 24#include "trad-frame.h" 25#include "frame-unwind.h" 26#include "dwarf2-frame.h" 27#include "gdbtypes.h" 28#include "inferior.h" 29#include "gdb_string.h" 30#include "gdb_assert.h" 31#include "gdbcore.h" 32#include "arch-utils.h" 33#include "regcache.h" 34#include "dis-asm.h" 35#include "osabi.h" 36 37enum 38 { 39 E_R0_REGNUM, 40 E_R1_REGNUM, 41 E_R2_REGNUM, 42 E_R3_REGNUM, E_SP_REGNUM = E_R3_REGNUM, 43 E_R4_REGNUM, 44 E_R5_REGNUM, 45 E_R6_REGNUM, E_ARG0_REGNUM = E_R6_REGNUM, 46 E_R7_REGNUM, 47 E_R8_REGNUM, 48 E_R9_REGNUM, E_ARGLAST_REGNUM = E_R9_REGNUM, 49 E_R10_REGNUM, E_V0_REGNUM = E_R10_REGNUM, 50 E_R11_REGNUM, E_V1_REGNUM = E_R11_REGNUM, 51 E_R12_REGNUM, 52 E_R13_REGNUM, 53 E_R14_REGNUM, 54 E_R15_REGNUM, 55 E_R16_REGNUM, 56 E_R17_REGNUM, 57 E_R18_REGNUM, 58 E_R19_REGNUM, 59 E_R20_REGNUM, 60 E_R21_REGNUM, 61 E_R22_REGNUM, 62 E_R23_REGNUM, 63 E_R24_REGNUM, 64 E_R25_REGNUM, 65 E_R26_REGNUM, 66 E_R27_REGNUM, 67 E_R28_REGNUM, 68 E_R29_REGNUM, E_FP_REGNUM = E_R29_REGNUM, 69 E_R30_REGNUM, E_EP_REGNUM = E_R30_REGNUM, 70 E_R31_REGNUM, E_LP_REGNUM = E_R31_REGNUM, 71 E_R32_REGNUM, E_SR0_REGNUM = E_R32_REGNUM, 72 E_R33_REGNUM, 73 E_R34_REGNUM, 74 E_R35_REGNUM, 75 E_R36_REGNUM, 76 E_R37_REGNUM, E_PS_REGNUM = E_R37_REGNUM, 77 E_R38_REGNUM, 78 E_R39_REGNUM, 79 E_R40_REGNUM, 80 E_R41_REGNUM, 81 E_R42_REGNUM, 82 E_R43_REGNUM, 83 E_R44_REGNUM, 84 E_R45_REGNUM, 85 E_R46_REGNUM, 86 E_R47_REGNUM, 87 E_R48_REGNUM, 88 E_R49_REGNUM, 89 E_R50_REGNUM, 90 E_R51_REGNUM, 91 E_R52_REGNUM, E_CTBP_REGNUM = E_R52_REGNUM, 92 E_R53_REGNUM, 93 E_R54_REGNUM, 94 E_R55_REGNUM, 95 E_R56_REGNUM, 96 E_R57_REGNUM, 97 E_R58_REGNUM, 98 E_R59_REGNUM, 99 E_R60_REGNUM, 100 E_R61_REGNUM, 101 E_R62_REGNUM, 102 E_R63_REGNUM, 103 E_R64_REGNUM, E_PC_REGNUM = E_R64_REGNUM, 104 E_R65_REGNUM, 105 E_NUM_REGS 106 }; 107 108enum 109{ 110 v850_reg_size = 4 111}; 112 113/* Size of return datatype which fits into all return registers. */ 114enum 115{ 116 E_MAX_RETTYPE_SIZE_IN_REGS = 2 * v850_reg_size 117}; 118 119struct v850_frame_cache 120{ 121 /* Base address. */ 122 CORE_ADDR base; 123 LONGEST sp_offset; 124 CORE_ADDR pc; 125 126 /* Flag showing that a frame has been created in the prologue code. */ 127 int uses_fp; 128 129 /* Saved registers. */ 130 struct trad_frame_saved_reg *saved_regs; 131}; 132 133/* Info gleaned from scanning a function's prologue. */ 134struct pifsr /* Info about one saved register. */ 135{ 136 int offset; /* Offset from sp or fp. */ 137 int cur_frameoffset; /* Current frameoffset. */ 138 int reg; /* Saved register number. */ 139}; 140 141static const char * 142v850_register_name (int regnum) 143{ 144 static const char *v850_reg_names[] = 145 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 146 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 147 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 148 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 149 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", 150 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", 151 "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23", 152 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", 153 "pc", "fp" 154 }; 155 if (regnum < 0 || regnum >= E_NUM_REGS) 156 return NULL; 157 return v850_reg_names[regnum]; 158} 159 160static const char * 161v850e_register_name (int regnum) 162{ 163 static const char *v850e_reg_names[] = 164 { 165 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 166 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 167 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", 168 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", 169 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7", 170 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15", 171 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23", 172 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31", 173 "pc", "fp" 174 }; 175 if (regnum < 0 || regnum >= E_NUM_REGS) 176 return NULL; 177 return v850e_reg_names[regnum]; 178} 179 180/* Returns the default type for register N. */ 181 182static struct type * 183v850_register_type (struct gdbarch *gdbarch, int regnum) 184{ 185 if (regnum == E_PC_REGNUM) 186 return builtin_type_void_func_ptr; 187 return builtin_type_int32; 188} 189 190static int 191v850_type_is_scalar (struct type *t) 192{ 193 return (TYPE_CODE (t) != TYPE_CODE_STRUCT 194 && TYPE_CODE (t) != TYPE_CODE_UNION 195 && TYPE_CODE (t) != TYPE_CODE_ARRAY); 196} 197 198/* Should call_function allocate stack space for a struct return? */ 199static int 200v850_use_struct_convention (struct type *type) 201{ 202 int i; 203 struct type *fld_type, *tgt_type; 204 205 /* 1. The value is greater than 8 bytes -> returned by copying. */ 206 if (TYPE_LENGTH (type) > 8) 207 return 1; 208 209 /* 2. The value is a single basic type -> returned in register. */ 210 if (v850_type_is_scalar (type)) 211 return 0; 212 213 /* The value is a structure or union with a single element and that 214 element is either a single basic type or an array of a single basic 215 type whose size is greater than or equal to 4 -> returned in register. */ 216 if ((TYPE_CODE (type) == TYPE_CODE_STRUCT 217 || TYPE_CODE (type) == TYPE_CODE_UNION) 218 && TYPE_NFIELDS (type) == 1) 219 { 220 fld_type = TYPE_FIELD_TYPE (type, 0); 221 if (v850_type_is_scalar (fld_type) && TYPE_LENGTH (fld_type) >= 4) 222 return 0; 223 224 if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY) 225 { 226 tgt_type = TYPE_TARGET_TYPE (fld_type); 227 if (v850_type_is_scalar (tgt_type) && TYPE_LENGTH (tgt_type) >= 4) 228 return 0; 229 } 230 } 231 232 /* The value is a structure whose first element is an integer or a float, 233 and which contains no arrays of more than two elements -> returned in 234 register. */ 235 if (TYPE_CODE (type) == TYPE_CODE_STRUCT 236 && v850_type_is_scalar (TYPE_FIELD_TYPE (type, 0)) 237 && TYPE_LENGTH (TYPE_FIELD_TYPE (type, 0)) == 4) 238 { 239 for (i = 1; i < TYPE_NFIELDS (type); ++i) 240 { 241 fld_type = TYPE_FIELD_TYPE (type, 0); 242 if (TYPE_CODE (fld_type) == TYPE_CODE_ARRAY) 243 { 244 tgt_type = TYPE_TARGET_TYPE (fld_type); 245 if (TYPE_LENGTH (fld_type) >= 0 && TYPE_LENGTH (tgt_type) >= 0 246 && TYPE_LENGTH (fld_type) / TYPE_LENGTH (tgt_type) > 2) 247 return 1; 248 } 249 } 250 return 0; 251 } 252 253 /* The value is a union which contains at least one field which would be 254 returned in registers according to these rules -> returned in register. */ 255 if (TYPE_CODE (type) == TYPE_CODE_UNION) 256 { 257 for (i = 0; i < TYPE_NFIELDS (type); ++i) 258 { 259 fld_type = TYPE_FIELD_TYPE (type, 0); 260 if (!v850_use_struct_convention (fld_type)) 261 return 0; 262 } 263 } 264 265 return 1; 266} 267 268/* Structure for mapping bits in register lists to register numbers. */ 269struct reg_list 270{ 271 long mask; 272 int regno; 273}; 274 275/* Helper function for v850_scan_prologue to handle prepare instruction. */ 276 277static void 278v850_handle_prepare (int insn, int insn2, CORE_ADDR * current_pc_ptr, 279 struct v850_frame_cache *pi, struct pifsr **pifsr_ptr) 280{ 281 CORE_ADDR current_pc = *current_pc_ptr; 282 struct pifsr *pifsr = *pifsr_ptr; 283 long next = insn2 & 0xffff; 284 long list12 = ((insn & 1) << 16) + (next & 0xffe0); 285 long offset = (insn & 0x3e) << 1; 286 static struct reg_list reg_table[] = 287 { 288 {0x00800, 20}, /* r20 */ 289 {0x00400, 21}, /* r21 */ 290 {0x00200, 22}, /* r22 */ 291 {0x00100, 23}, /* r23 */ 292 {0x08000, 24}, /* r24 */ 293 {0x04000, 25}, /* r25 */ 294 {0x02000, 26}, /* r26 */ 295 {0x01000, 27}, /* r27 */ 296 {0x00080, 28}, /* r28 */ 297 {0x00040, 29}, /* r29 */ 298 {0x10000, 30}, /* ep */ 299 {0x00020, 31}, /* lp */ 300 {0, 0} /* end of table */ 301 }; 302 int i; 303 304 if ((next & 0x1f) == 0x0b) /* skip imm16 argument */ 305 current_pc += 2; 306 else if ((next & 0x1f) == 0x13) /* skip imm16 argument */ 307 current_pc += 2; 308 else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */ 309 current_pc += 4; 310 311 /* Calculate the total size of the saved registers, and add it to the 312 immediate value used to adjust SP. */ 313 for (i = 0; reg_table[i].mask != 0; i++) 314 if (list12 & reg_table[i].mask) 315 offset += v850_reg_size; 316 pi->sp_offset -= offset; 317 318 /* Calculate the offsets of the registers relative to the value the SP 319 will have after the registers have been pushed and the imm5 value has 320 been subtracted from it. */ 321 if (pifsr) 322 { 323 for (i = 0; reg_table[i].mask != 0; i++) 324 { 325 if (list12 & reg_table[i].mask) 326 { 327 int reg = reg_table[i].regno; 328 offset -= v850_reg_size; 329 pifsr->reg = reg; 330 pifsr->offset = offset; 331 pifsr->cur_frameoffset = pi->sp_offset; 332 pifsr++; 333 } 334 } 335 } 336 337 /* Set result parameters. */ 338 *current_pc_ptr = current_pc; 339 *pifsr_ptr = pifsr; 340} 341 342 343/* Helper function for v850_scan_prologue to handle pushm/pushl instructions. 344 The SR bit of the register list is not supported. gcc does not generate 345 this bit. */ 346 347static void 348v850_handle_pushm (int insn, int insn2, struct v850_frame_cache *pi, 349 struct pifsr **pifsr_ptr) 350{ 351 struct pifsr *pifsr = *pifsr_ptr; 352 long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0); 353 long offset = 0; 354 static struct reg_list pushml_reg_table[] = 355 { 356 {0x80000, E_PS_REGNUM}, /* PSW */ 357 {0x40000, 1}, /* r1 */ 358 {0x20000, 2}, /* r2 */ 359 {0x10000, 3}, /* r3 */ 360 {0x00800, 4}, /* r4 */ 361 {0x00400, 5}, /* r5 */ 362 {0x00200, 6}, /* r6 */ 363 {0x00100, 7}, /* r7 */ 364 {0x08000, 8}, /* r8 */ 365 {0x04000, 9}, /* r9 */ 366 {0x02000, 10}, /* r10 */ 367 {0x01000, 11}, /* r11 */ 368 {0x00080, 12}, /* r12 */ 369 {0x00040, 13}, /* r13 */ 370 {0x00020, 14}, /* r14 */ 371 {0x00010, 15}, /* r15 */ 372 {0, 0} /* end of table */ 373 }; 374 static struct reg_list pushmh_reg_table[] = 375 { 376 {0x80000, 16}, /* r16 */ 377 {0x40000, 17}, /* r17 */ 378 {0x20000, 18}, /* r18 */ 379 {0x10000, 19}, /* r19 */ 380 {0x00800, 20}, /* r20 */ 381 {0x00400, 21}, /* r21 */ 382 {0x00200, 22}, /* r22 */ 383 {0x00100, 23}, /* r23 */ 384 {0x08000, 24}, /* r24 */ 385 {0x04000, 25}, /* r25 */ 386 {0x02000, 26}, /* r26 */ 387 {0x01000, 27}, /* r27 */ 388 {0x00080, 28}, /* r28 */ 389 {0x00040, 29}, /* r29 */ 390 {0x00010, 30}, /* r30 */ 391 {0x00020, 31}, /* r31 */ 392 {0, 0} /* end of table */ 393 }; 394 struct reg_list *reg_table; 395 int i; 396 397 /* Is this a pushml or a pushmh? */ 398 if ((insn2 & 7) == 1) 399 reg_table = pushml_reg_table; 400 else 401 reg_table = pushmh_reg_table; 402 403 /* Calculate the total size of the saved registers, and add it it to the 404 immediate value used to adjust SP. */ 405 for (i = 0; reg_table[i].mask != 0; i++) 406 if (list12 & reg_table[i].mask) 407 offset += v850_reg_size; 408 pi->sp_offset -= offset; 409 410 /* Calculate the offsets of the registers relative to the value the SP 411 will have after the registers have been pushed and the imm5 value is 412 subtracted from it. */ 413 if (pifsr) 414 { 415 for (i = 0; reg_table[i].mask != 0; i++) 416 { 417 if (list12 & reg_table[i].mask) 418 { 419 int reg = reg_table[i].regno; 420 offset -= v850_reg_size; 421 pifsr->reg = reg; 422 pifsr->offset = offset; 423 pifsr->cur_frameoffset = pi->sp_offset; 424 pifsr++; 425 } 426 } 427 } 428 429 /* Set result parameters. */ 430 *pifsr_ptr = pifsr; 431} 432 433/* Helper function to evaluate if register is one of the "save" registers. 434 This allows to simplify conditionals in v850_analyze_prologue a lot. */ 435 436static int 437v850_is_save_register (int reg) 438{ 439 /* The caller-save registers are R2, R20 - R29 and R31. All other 440 registers are either special purpose (PC, SP), argument registers, 441 or just considered free for use in the caller. */ 442 return reg == E_R2_REGNUM 443 || (reg >= E_R20_REGNUM && reg <= E_R29_REGNUM) 444 || reg == E_R31_REGNUM; 445} 446 447/* Scan the prologue of the function that contains PC, and record what 448 we find in PI. Returns the pc after the prologue. Note that the 449 addresses saved in frame->saved_regs are just frame relative (negative 450 offsets from the frame pointer). This is because we don't know the 451 actual value of the frame pointer yet. In some circumstances, the 452 frame pointer can't be determined till after we have scanned the 453 prologue. */ 454 455static CORE_ADDR 456v850_analyze_prologue (CORE_ADDR func_addr, CORE_ADDR pc, 457 struct v850_frame_cache *pi, ULONGEST ctbp) 458{ 459 CORE_ADDR prologue_end, current_pc; 460 struct pifsr pifsrs[E_NUM_REGS + 1]; 461 struct pifsr *pifsr, *pifsr_tmp; 462 int fp_used; 463 int ep_used; 464 int reg; 465 CORE_ADDR save_pc, save_end; 466 int regsave_func_p; 467 int r12_tmp; 468 469 memset (&pifsrs, 0, sizeof pifsrs); 470 pifsr = &pifsrs[0]; 471 472 prologue_end = pc; 473 474 /* Now, search the prologue looking for instructions that setup fp, save 475 rp, adjust sp and such. We also record the frame offset of any saved 476 registers. */ 477 478 pi->sp_offset = 0; 479 pi->uses_fp = 0; 480 ep_used = 0; 481 regsave_func_p = 0; 482 save_pc = 0; 483 save_end = 0; 484 r12_tmp = 0; 485 486 for (current_pc = func_addr; current_pc < prologue_end;) 487 { 488 int insn; 489 int insn2 = -1; /* dummy value */ 490 491 insn = read_memory_integer (current_pc, 2); 492 current_pc += 2; 493 if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */ 494 { 495 insn2 = read_memory_integer (current_pc, 2); 496 current_pc += 2; 497 } 498 499 if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p) 500 { /* jarl <func>,10 */ 501 long low_disp = insn2 & ~(long) 1; 502 long disp = (((((insn & 0x3f) << 16) + low_disp) 503 & ~(long) 1) ^ 0x00200000) - 0x00200000; 504 505 save_pc = current_pc; 506 save_end = prologue_end; 507 regsave_func_p = 1; 508 current_pc += disp - 4; 509 prologue_end = (current_pc 510 + (2 * 3) /* moves to/from ep */ 511 + 4 /* addi <const>,sp,sp */ 512 + 2 /* jmp [r10] */ 513 + (2 * 12) /* sst.w to save r2, r20-r29, r31 */ 514 + 20); /* slop area */ 515 } 516 else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p) 517 { /* callt <imm6> */ 518 long adr = ctbp + ((insn & 0x3f) << 1); 519 520 save_pc = current_pc; 521 save_end = prologue_end; 522 regsave_func_p = 1; 523 current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff); 524 prologue_end = (current_pc 525 + (2 * 3) /* prepare list2,imm5,sp/imm */ 526 + 4 /* ctret */ 527 + 20); /* slop area */ 528 continue; 529 } 530 else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */ 531 { 532 v850_handle_prepare (insn, insn2, ¤t_pc, pi, &pifsr); 533 continue; 534 } 535 else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144) 536 { /* ctret after processing register save. */ 537 current_pc = save_pc; 538 prologue_end = save_end; 539 regsave_func_p = 0; 540 continue; 541 } 542 else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1) 543 { /* pushml, pushmh */ 544 v850_handle_pushm (insn, insn2, pi, &pifsr); 545 continue; 546 } 547 else if ((insn & 0xffe0) == 0x0060 && regsave_func_p) 548 { /* jmp after processing register save. */ 549 current_pc = save_pc; 550 prologue_end = save_end; 551 regsave_func_p = 0; 552 continue; 553 } 554 else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */ 555 || (insn & 0xffe0) == 0x0060 /* jmp */ 556 || (insn & 0x0780) == 0x0580) /* branch */ 557 { 558 break; /* Ran into end of prologue */ 559 } 560 561 else if ((insn & 0xffe0) == ((E_SP_REGNUM << 11) | 0x0240)) 562 /* add <imm>,sp */ 563 pi->sp_offset += ((insn & 0x1f) ^ 0x10) - 0x10; 564 else if (insn == ((E_SP_REGNUM << 11) | 0x0600 | E_SP_REGNUM)) 565 /* addi <imm>,sp,sp */ 566 pi->sp_offset += insn2; 567 else if (insn == ((E_FP_REGNUM << 11) | 0x0000 | E_SP_REGNUM)) 568 /* mov sp,fp */ 569 pi->uses_fp = 1; 570 else if (insn == ((E_R12_REGNUM << 11) | 0x0640 | E_R0_REGNUM)) 571 /* movhi hi(const),r0,r12 */ 572 r12_tmp = insn2 << 16; 573 else if (insn == ((E_R12_REGNUM << 11) | 0x0620 | E_R12_REGNUM)) 574 /* movea lo(const),r12,r12 */ 575 r12_tmp += insn2; 576 else if (insn == ((E_SP_REGNUM << 11) | 0x01c0 | E_R12_REGNUM) && r12_tmp) 577 /* add r12,sp */ 578 pi->sp_offset += r12_tmp; 579 else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_SP_REGNUM)) 580 /* mov sp,ep */ 581 ep_used = 1; 582 else if (insn == ((E_EP_REGNUM << 11) | 0x0000 | E_R1_REGNUM)) 583 /* mov r1,ep */ 584 ep_used = 0; 585 else if (((insn & 0x07ff) == (0x0760 | E_SP_REGNUM) 586 || (pi->uses_fp 587 && (insn & 0x07ff) == (0x0760 | E_FP_REGNUM))) 588 && pifsr 589 && v850_is_save_register (reg = (insn >> 11) & 0x1f)) 590 { 591 /* st.w <reg>,<offset>[sp] or st.w <reg>,<offset>[fp] */ 592 pifsr->reg = reg; 593 pifsr->offset = insn2 & ~1; 594 pifsr->cur_frameoffset = pi->sp_offset; 595 pifsr++; 596 } 597 else if (ep_used 598 && ((insn & 0x0781) == 0x0501) 599 && pifsr 600 && v850_is_save_register (reg = (insn >> 11) & 0x1f)) 601 { 602 /* sst.w <reg>,<offset>[ep] */ 603 pifsr->reg = reg; 604 pifsr->offset = (insn & 0x007e) << 1; 605 pifsr->cur_frameoffset = pi->sp_offset; 606 pifsr++; 607 } 608 } 609 610 /* Fix up any offsets to the final offset. If a frame pointer was created, 611 use it instead of the stack pointer. */ 612 for (pifsr_tmp = pifsrs; pifsr_tmp != pifsr; pifsr_tmp++) 613 { 614 pifsr_tmp->offset -= pi->sp_offset - pifsr_tmp->cur_frameoffset; 615 pi->saved_regs[pifsr_tmp->reg].addr = pifsr_tmp->offset; 616 } 617 618 return current_pc; 619} 620 621/* Return the address of the first code past the prologue of the function. */ 622 623static CORE_ADDR 624v850_skip_prologue (CORE_ADDR pc) 625{ 626 CORE_ADDR func_addr, func_end; 627 628 /* See what the symbol table says */ 629 630 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) 631 { 632 struct symtab_and_line sal; 633 634 sal = find_pc_line (func_addr, 0); 635 if (sal.line != 0 && sal.end < func_end) 636 return sal.end; 637 638 /* Either there's no line info, or the line after the prologue is after 639 the end of the function. In this case, there probably isn't a 640 prologue. */ 641 return pc; 642 } 643 644 /* We can't find the start of this function, so there's nothing we can do. */ 645 return pc; 646} 647 648static CORE_ADDR 649v850_frame_align (struct gdbarch *ignore, CORE_ADDR sp) 650{ 651 return sp & ~3; 652} 653 654/* Setup arguments and LP for a call to the target. First four args 655 go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs 656 are passed by reference. 64 bit quantities (doubles and long longs) 657 may be split between the regs and the stack. When calling a function 658 that returns a struct, a pointer to the struct is passed in as a secret 659 first argument (always in R6). 660 661 Stack space for the args has NOT been allocated: that job is up to us. */ 662 663static CORE_ADDR 664v850_push_dummy_call (struct gdbarch *gdbarch, 665 struct value *function, 666 struct regcache *regcache, 667 CORE_ADDR bp_addr, 668 int nargs, 669 struct value **args, 670 CORE_ADDR sp, 671 int struct_return, 672 CORE_ADDR struct_addr) 673{ 674 int argreg; 675 int argnum; 676 int len = 0; 677 int stack_offset; 678 679 /* The offset onto the stack at which we will start copying parameters 680 (after the registers are used up) begins at 16 rather than at zero. 681 That's how the ABI is defined, though there's no indication that these 682 16 bytes are used for anything, not even for saving incoming 683 argument registers. */ 684 stack_offset = 16; 685 686 /* Now make space on the stack for the args. */ 687 for (argnum = 0; argnum < nargs; argnum++) 688 len += ((TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3); 689 sp -= len + stack_offset; 690 691 argreg = E_ARG0_REGNUM; 692 /* The struct_return pointer occupies the first parameter register. */ 693 if (struct_return) 694 regcache_cooked_write_unsigned (regcache, argreg++, struct_addr); 695 696 /* Now load as many as possible of the first arguments into 697 registers, and push the rest onto the stack. There are 16 bytes 698 in four registers available. Loop thru args from first to last. */ 699 for (argnum = 0; argnum < nargs; argnum++) 700 { 701 int len; 702 gdb_byte *val; 703 gdb_byte valbuf[v850_reg_size]; 704 705 if (!v850_type_is_scalar (value_type (*args)) 706 && TYPE_LENGTH (value_type (*args)) > E_MAX_RETTYPE_SIZE_IN_REGS) 707 { 708 store_unsigned_integer (valbuf, 4, VALUE_ADDRESS (*args)); 709 len = 4; 710 val = valbuf; 711 } 712 else 713 { 714 len = TYPE_LENGTH (value_type (*args)); 715 val = (gdb_byte *) value_contents (*args); 716 } 717 718 while (len > 0) 719 if (argreg <= E_ARGLAST_REGNUM) 720 { 721 CORE_ADDR regval; 722 723 regval = extract_unsigned_integer (val, v850_reg_size); 724 regcache_cooked_write_unsigned (regcache, argreg, regval); 725 726 len -= v850_reg_size; 727 val += v850_reg_size; 728 argreg++; 729 } 730 else 731 { 732 write_memory (sp + stack_offset, val, 4); 733 734 len -= 4; 735 val += 4; 736 stack_offset += 4; 737 } 738 args++; 739 } 740 741 /* Store return address. */ 742 regcache_cooked_write_unsigned (regcache, E_LP_REGNUM, bp_addr); 743 744 /* Update stack pointer. */ 745 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); 746 747 return sp; 748} 749 750static void 751v850_extract_return_value (struct type *type, struct regcache *regcache, 752 gdb_byte *valbuf) 753{ 754 int len = TYPE_LENGTH (type); 755 756 if (len <= v850_reg_size) 757 { 758 ULONGEST val; 759 760 regcache_cooked_read_unsigned (regcache, E_V0_REGNUM, &val); 761 store_unsigned_integer (valbuf, len, val); 762 } 763 else if (len <= 2 * v850_reg_size) 764 { 765 int i, regnum = E_V0_REGNUM; 766 gdb_byte buf[v850_reg_size]; 767 for (i = 0; len > 0; i += 4, len -= 4) 768 { 769 regcache_raw_read (regcache, regnum++, buf); 770 memcpy (valbuf + i, buf, len > 4 ? 4 : len); 771 } 772 } 773} 774 775static void 776v850_store_return_value (struct type *type, struct regcache *regcache, 777 const gdb_byte *valbuf) 778{ 779 int len = TYPE_LENGTH (type); 780 781 if (len <= v850_reg_size) 782 regcache_cooked_write_unsigned (regcache, E_V0_REGNUM, 783 extract_unsigned_integer (valbuf, len)); 784 else if (len <= 2 * v850_reg_size) 785 { 786 int i, regnum = E_V0_REGNUM; 787 for (i = 0; i < len; i += 4) 788 regcache_raw_write (regcache, regnum++, valbuf + i); 789 } 790} 791 792static enum return_value_convention 793v850_return_value (struct gdbarch *gdbarch, struct type *type, 794 struct regcache *regcache, 795 gdb_byte *readbuf, const gdb_byte *writebuf) 796{ 797 if (v850_use_struct_convention (type)) 798 return RETURN_VALUE_STRUCT_CONVENTION; 799 if (writebuf) 800 v850_store_return_value (type, regcache, writebuf); 801 else if (readbuf) 802 v850_extract_return_value (type, regcache, readbuf); 803 return RETURN_VALUE_REGISTER_CONVENTION; 804} 805 806const static unsigned char * 807v850_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr) 808{ 809 static unsigned char breakpoint[] = { 0x85, 0x05 }; 810 *lenptr = sizeof (breakpoint); 811 return breakpoint; 812} 813 814static struct v850_frame_cache * 815v850_alloc_frame_cache (struct frame_info *next_frame) 816{ 817 struct v850_frame_cache *cache; 818 int i; 819 820 cache = FRAME_OBSTACK_ZALLOC (struct v850_frame_cache); 821 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame); 822 823 /* Base address. */ 824 cache->base = 0; 825 cache->sp_offset = 0; 826 cache->pc = 0; 827 828 /* Frameless until proven otherwise. */ 829 cache->uses_fp = 0; 830 831 return cache; 832} 833 834static struct v850_frame_cache * 835v850_frame_cache (struct frame_info *next_frame, void **this_cache) 836{ 837 struct v850_frame_cache *cache; 838 CORE_ADDR current_pc; 839 int i; 840 841 if (*this_cache) 842 return *this_cache; 843 844 cache = v850_alloc_frame_cache (next_frame); 845 *this_cache = cache; 846 847 /* In principle, for normal frames, fp holds the frame pointer, 848 which holds the base address for the current stack frame. 849 However, for functions that don't need it, the frame pointer is 850 optional. For these "frameless" functions the frame pointer is 851 actually the frame pointer of the calling frame. */ 852 cache->base = frame_unwind_register_unsigned (next_frame, E_FP_REGNUM); 853 if (cache->base == 0) 854 return cache; 855 856 cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME); 857 current_pc = frame_pc_unwind (next_frame); 858 if (cache->pc != 0) 859 { 860 ULONGEST ctbp; 861 ctbp = frame_unwind_register_unsigned (next_frame, E_CTBP_REGNUM); 862 v850_analyze_prologue (cache->pc, current_pc, cache, ctbp); 863 } 864 865 if (!cache->uses_fp) 866 { 867 /* We didn't find a valid frame, which means that CACHE->base 868 currently holds the frame pointer for our calling frame. If 869 we're at the start of a function, or somewhere half-way its 870 prologue, the function's frame probably hasn't been fully 871 setup yet. Try to reconstruct the base address for the stack 872 frame by looking at the stack pointer. For truly "frameless" 873 functions this might work too. */ 874 cache->base = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); 875 } 876 877 /* Now that we have the base address for the stack frame we can 878 calculate the value of sp in the calling frame. */ 879 trad_frame_set_value (cache->saved_regs, E_SP_REGNUM, 880 cache->base - cache->sp_offset); 881 882 /* Adjust all the saved registers such that they contain addresses 883 instead of offsets. */ 884 for (i = 0; i < E_NUM_REGS; i++) 885 if (trad_frame_addr_p (cache->saved_regs, i)) 886 cache->saved_regs[i].addr += cache->base; 887 888 /* The call instruction moves the caller's PC in the callee's LP. 889 Since this is an unwind, do the reverse. Copy the location of LP 890 into PC (the address / regnum) so that a request for PC will be 891 converted into a request for the LP. */ 892 893 cache->saved_regs[E_PC_REGNUM] = cache->saved_regs[E_LP_REGNUM]; 894 895 return cache; 896} 897 898 899static void 900v850_frame_prev_register (struct frame_info *next_frame, void **this_cache, 901 int regnum, int *optimizedp, 902 enum lval_type *lvalp, CORE_ADDR *addrp, 903 int *realnump, gdb_byte *valuep) 904{ 905 struct v850_frame_cache *cache = v850_frame_cache (next_frame, this_cache); 906 907 gdb_assert (regnum >= 0); 908 909 trad_frame_get_prev_register (next_frame, cache->saved_regs, regnum, 910 optimizedp, lvalp, addrp, realnump, valuep); 911} 912 913static void 914v850_frame_this_id (struct frame_info *next_frame, void **this_cache, 915 struct frame_id *this_id) 916{ 917 struct v850_frame_cache *cache = v850_frame_cache (next_frame, this_cache); 918 919 /* This marks the outermost frame. */ 920 if (cache->base == 0) 921 return; 922 923 *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr, cache->pc); 924} 925 926static const struct frame_unwind v850_frame_unwind = { 927 NORMAL_FRAME, 928 v850_frame_this_id, 929 v850_frame_prev_register 930}; 931 932static const struct frame_unwind * 933v850_frame_sniffer (struct frame_info *next_frame) 934{ 935 return &v850_frame_unwind; 936} 937 938static CORE_ADDR 939v850_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 940{ 941 return frame_unwind_register_unsigned (next_frame, 942 gdbarch_sp_regnum (current_gdbarch)); 943} 944 945static CORE_ADDR 946v850_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 947{ 948 return frame_unwind_register_unsigned (next_frame, 949 gdbarch_pc_regnum (current_gdbarch)); 950} 951 952static struct frame_id 953v850_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) 954{ 955 return frame_id_build (v850_unwind_sp (gdbarch, next_frame), 956 frame_pc_unwind (next_frame)); 957} 958 959static CORE_ADDR 960v850_frame_base_address (struct frame_info *next_frame, void **this_cache) 961{ 962 struct v850_frame_cache *cache = v850_frame_cache (next_frame, this_cache); 963 964 return cache->base; 965} 966 967static const struct frame_base v850_frame_base = { 968 &v850_frame_unwind, 969 v850_frame_base_address, 970 v850_frame_base_address, 971 v850_frame_base_address 972}; 973 974static struct gdbarch * 975v850_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 976{ 977 struct gdbarch *gdbarch; 978 979 /* Change the register names based on the current machine type. */ 980 if (info.bfd_arch_info->arch != bfd_arch_v850) 981 return NULL; 982 983 gdbarch = gdbarch_alloc (&info, NULL); 984 985 switch (info.bfd_arch_info->mach) 986 { 987 case bfd_mach_v850: 988 set_gdbarch_register_name (gdbarch, v850_register_name); 989 break; 990 case bfd_mach_v850e: 991 case bfd_mach_v850e1: 992 set_gdbarch_register_name (gdbarch, v850e_register_name); 993 break; 994 } 995 996 set_gdbarch_num_regs (gdbarch, E_NUM_REGS); 997 set_gdbarch_num_pseudo_regs (gdbarch, 0); 998 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); 999 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); 1000 set_gdbarch_fp0_regnum (gdbarch, -1); 1001 1002 set_gdbarch_register_type (gdbarch, v850_register_type); 1003 1004 set_gdbarch_char_signed (gdbarch, 0); 1005 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); 1006 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1007 set_gdbarch_long_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1008 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); 1009 1010 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1011 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); 1012 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); 1013 1014 set_gdbarch_ptr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1015 set_gdbarch_addr_bit (gdbarch, 4 * TARGET_CHAR_BIT); 1016 1017 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1018 set_gdbarch_breakpoint_from_pc (gdbarch, v850_breakpoint_from_pc); 1019 1020 set_gdbarch_return_value (gdbarch, v850_return_value); 1021 set_gdbarch_push_dummy_call (gdbarch, v850_push_dummy_call); 1022 set_gdbarch_skip_prologue (gdbarch, v850_skip_prologue); 1023 1024 set_gdbarch_print_insn (gdbarch, print_insn_v850); 1025 1026 set_gdbarch_frame_align (gdbarch, v850_frame_align); 1027 set_gdbarch_unwind_sp (gdbarch, v850_unwind_sp); 1028 set_gdbarch_unwind_pc (gdbarch, v850_unwind_pc); 1029 set_gdbarch_unwind_dummy_id (gdbarch, v850_unwind_dummy_id); 1030 frame_base_set_default (gdbarch, &v850_frame_base); 1031 1032 /* Hook in ABI-specific overrides, if they have been registered. */ 1033 gdbarch_init_osabi (info, gdbarch); 1034 1035 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); 1036 frame_unwind_append_sniffer (gdbarch, v850_frame_sniffer); 1037 1038 return gdbarch; 1039} 1040 1041extern initialize_file_ftype _initialize_v850_tdep; /* -Wmissing-prototypes */ 1042 1043void 1044_initialize_v850_tdep (void) 1045{ 1046 register_gdbarch_init (bfd_arch_v850, v850_gdbarch_init); 1047} 1048