1/* Target-dependent code for Morpho mt processor, for GDB. 2 3 Copyright (C) 2005, 2007 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */ 19 20/* Contributed by Michael Snyder, msnyder@redhat.com. */ 21 22#include "defs.h" 23#include "frame.h" 24#include "frame-unwind.h" 25#include "frame-base.h" 26#include "symtab.h" 27#include "dis-asm.h" 28#include "arch-utils.h" 29#include "gdbtypes.h" 30#include "gdb_string.h" 31#include "regcache.h" 32#include "reggroups.h" 33#include "gdbcore.h" 34#include "trad-frame.h" 35#include "inferior.h" 36#include "dwarf2-frame.h" 37#include "infcall.h" 38#include "gdb_assert.h" 39 40enum mt_arch_constants 41{ 42 MT_MAX_STRUCT_SIZE = 16 43}; 44 45enum mt_gdb_regnums 46{ 47 MT_R0_REGNUM, /* 32 bit regs. */ 48 MT_R1_REGNUM, 49 MT_1ST_ARGREG = MT_R1_REGNUM, 50 MT_R2_REGNUM, 51 MT_R3_REGNUM, 52 MT_R4_REGNUM, 53 MT_LAST_ARGREG = MT_R4_REGNUM, 54 MT_R5_REGNUM, 55 MT_R6_REGNUM, 56 MT_R7_REGNUM, 57 MT_R8_REGNUM, 58 MT_R9_REGNUM, 59 MT_R10_REGNUM, 60 MT_R11_REGNUM, 61 MT_R12_REGNUM, 62 MT_FP_REGNUM = MT_R12_REGNUM, 63 MT_R13_REGNUM, 64 MT_SP_REGNUM = MT_R13_REGNUM, 65 MT_R14_REGNUM, 66 MT_RA_REGNUM = MT_R14_REGNUM, 67 MT_R15_REGNUM, 68 MT_IRA_REGNUM = MT_R15_REGNUM, 69 MT_PC_REGNUM, 70 71 /* Interrupt Enable pseudo-register, exported by SID. */ 72 MT_INT_ENABLE_REGNUM, 73 /* End of CPU regs. */ 74 75 MT_NUM_CPU_REGS, 76 77 /* Co-processor registers. */ 78 MT_COPRO_REGNUM = MT_NUM_CPU_REGS, /* 16 bit regs. */ 79 MT_CPR0_REGNUM, 80 MT_CPR1_REGNUM, 81 MT_CPR2_REGNUM, 82 MT_CPR3_REGNUM, 83 MT_CPR4_REGNUM, 84 MT_CPR5_REGNUM, 85 MT_CPR6_REGNUM, 86 MT_CPR7_REGNUM, 87 MT_CPR8_REGNUM, 88 MT_CPR9_REGNUM, 89 MT_CPR10_REGNUM, 90 MT_CPR11_REGNUM, 91 MT_CPR12_REGNUM, 92 MT_CPR13_REGNUM, 93 MT_CPR14_REGNUM, 94 MT_CPR15_REGNUM, 95 MT_BYPA_REGNUM, /* 32 bit regs. */ 96 MT_BYPB_REGNUM, 97 MT_BYPC_REGNUM, 98 MT_FLAG_REGNUM, 99 MT_CONTEXT_REGNUM, /* 38 bits (treat as array of 100 six bytes). */ 101 MT_MAC_REGNUM, /* 32 bits. */ 102 MT_Z1_REGNUM, /* 16 bits. */ 103 MT_Z2_REGNUM, /* 16 bits. */ 104 MT_ICHANNEL_REGNUM, /* 32 bits. */ 105 MT_ISCRAMB_REGNUM, /* 32 bits. */ 106 MT_QSCRAMB_REGNUM, /* 32 bits. */ 107 MT_OUT_REGNUM, /* 16 bits. */ 108 MT_EXMAC_REGNUM, /* 32 bits (8 used). */ 109 MT_QCHANNEL_REGNUM, /* 32 bits. */ 110 MT_ZI2_REGNUM, /* 16 bits. */ 111 MT_ZQ2_REGNUM, /* 16 bits. */ 112 MT_CHANNEL2_REGNUM, /* 32 bits. */ 113 MT_ISCRAMB2_REGNUM, /* 32 bits. */ 114 MT_QSCRAMB2_REGNUM, /* 32 bits. */ 115 MT_QCHANNEL2_REGNUM, /* 32 bits. */ 116 117 /* Number of real registers. */ 118 MT_NUM_REGS, 119 120 /* Pseudo-registers. */ 121 MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS, 122 MT_MAC_PSEUDOREG_REGNUM, 123 MT_COPRO_PSEUDOREG_ARRAY, 124 125 MT_COPRO_PSEUDOREG_DIM_1 = 2, 126 MT_COPRO_PSEUDOREG_DIM_2 = 8, 127 /* The number of pseudo-registers for each coprocessor. These 128 include the real coprocessor registers, the pseudo-registe for 129 the coprocessor number, and the pseudo-register for the MAC. */ 130 MT_COPRO_PSEUDOREG_REGS = MT_NUM_REGS - MT_NUM_CPU_REGS + 2, 131 /* The register number of the MAC, relative to a given coprocessor. */ 132 MT_COPRO_PSEUDOREG_MAC_REGNUM = MT_COPRO_PSEUDOREG_REGS - 1, 133 134 /* Two pseudo-regs ('coprocessor' and 'mac'). */ 135 MT_NUM_PSEUDO_REGS = 2 + (MT_COPRO_PSEUDOREG_REGS 136 * MT_COPRO_PSEUDOREG_DIM_1 137 * MT_COPRO_PSEUDOREG_DIM_2) 138}; 139 140/* Return name of register number specified by REGNUM. */ 141 142static const char * 143mt_register_name (int regnum) 144{ 145 static const char *const register_names[] = { 146 /* CPU regs. */ 147 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 148 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", 149 "pc", "IE", 150 /* Co-processor regs. */ 151 "", /* copro register. */ 152 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", 153 "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", 154 "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2", 155 "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel", 156 "zi2", "zq2", "Ichannel2", "Iscramb2", "Qscramb2", "Qchannel2", 157 /* Pseudo-registers. */ 158 "coprocessor", "MAC" 159 }; 160 static const char *array_names[MT_COPRO_PSEUDOREG_REGS 161 * MT_COPRO_PSEUDOREG_DIM_1 162 * MT_COPRO_PSEUDOREG_DIM_2]; 163 164 if (regnum < 0) 165 return ""; 166 if (regnum < ARRAY_SIZE (register_names)) 167 return register_names[regnum]; 168 if (array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY]) 169 return array_names[regnum - MT_COPRO_PSEUDOREG_ARRAY]; 170 171 { 172 char *name; 173 const char *stub; 174 unsigned dim_1; 175 unsigned dim_2; 176 unsigned index; 177 178 regnum -= MT_COPRO_PSEUDOREG_ARRAY; 179 index = regnum % MT_COPRO_PSEUDOREG_REGS; 180 dim_2 = (regnum / MT_COPRO_PSEUDOREG_REGS) % MT_COPRO_PSEUDOREG_DIM_2; 181 dim_1 = ((regnum / MT_COPRO_PSEUDOREG_REGS / MT_COPRO_PSEUDOREG_DIM_2) 182 % MT_COPRO_PSEUDOREG_DIM_1); 183 184 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM) 185 stub = register_names[MT_MAC_PSEUDOREG_REGNUM]; 186 else if (index >= MT_NUM_REGS - MT_CPR0_REGNUM) 187 stub = ""; 188 else 189 stub = register_names[index + MT_CPR0_REGNUM]; 190 if (!*stub) 191 { 192 array_names[regnum] = stub; 193 return stub; 194 } 195 name = xmalloc (30); 196 sprintf (name, "copro_%d_%d_%s", dim_1, dim_2, stub); 197 array_names[regnum] = name; 198 return name; 199 } 200} 201 202/* Return the type of a coprocessor register. */ 203 204static struct type * 205mt_copro_register_type (struct gdbarch *arch, int regnum) 206{ 207 switch (regnum) 208 { 209 case MT_INT_ENABLE_REGNUM: 210 case MT_ICHANNEL_REGNUM: 211 case MT_QCHANNEL_REGNUM: 212 case MT_ISCRAMB_REGNUM: 213 case MT_QSCRAMB_REGNUM: 214 return builtin_type_int32; 215 case MT_BYPA_REGNUM: 216 case MT_BYPB_REGNUM: 217 case MT_BYPC_REGNUM: 218 case MT_Z1_REGNUM: 219 case MT_Z2_REGNUM: 220 case MT_OUT_REGNUM: 221 case MT_ZI2_REGNUM: 222 case MT_ZQ2_REGNUM: 223 return builtin_type_int16; 224 case MT_EXMAC_REGNUM: 225 case MT_MAC_REGNUM: 226 return builtin_type_uint32; 227 case MT_CONTEXT_REGNUM: 228 return builtin_type_long_long; 229 case MT_FLAG_REGNUM: 230 return builtin_type_unsigned_char; 231 default: 232 if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM) 233 return builtin_type_int16; 234 else if (regnum == MT_CPR0_REGNUM + MT_COPRO_PSEUDOREG_MAC_REGNUM) 235 { 236 if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2 237 || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2) 238 return builtin_type_uint64; 239 else 240 return builtin_type_uint32; 241 } 242 else 243 return builtin_type_uint32; 244 } 245} 246 247/* Given ARCH and a register number specified by REGNUM, return the 248 type of that register. */ 249 250static struct type * 251mt_register_type (struct gdbarch *arch, int regnum) 252{ 253 static struct type *void_func_ptr = NULL; 254 static struct type *void_ptr = NULL; 255 static struct type *copro_type; 256 257 if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS) 258 { 259 if (void_func_ptr == NULL) 260 { 261 struct type *temp; 262 263 void_ptr = lookup_pointer_type (builtin_type_void); 264 void_func_ptr = 265 lookup_pointer_type (lookup_function_type (builtin_type_void)); 266 temp = create_range_type (NULL, builtin_type_unsigned_int, 0, 1); 267 copro_type = create_array_type (NULL, builtin_type_int16, temp); 268 } 269 switch (regnum) 270 { 271 case MT_PC_REGNUM: 272 case MT_RA_REGNUM: 273 case MT_IRA_REGNUM: 274 return void_func_ptr; 275 case MT_SP_REGNUM: 276 case MT_FP_REGNUM: 277 return void_ptr; 278 case MT_COPRO_REGNUM: 279 case MT_COPRO_PSEUDOREG_REGNUM: 280 return copro_type; 281 case MT_MAC_PSEUDOREG_REGNUM: 282 return mt_copro_register_type (arch, 283 MT_CPR0_REGNUM 284 + MT_COPRO_PSEUDOREG_MAC_REGNUM); 285 default: 286 if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM) 287 return builtin_type_int32; 288 else if (regnum < MT_COPRO_PSEUDOREG_ARRAY) 289 return mt_copro_register_type (arch, regnum); 290 else 291 { 292 regnum -= MT_COPRO_PSEUDOREG_ARRAY; 293 regnum %= MT_COPRO_PSEUDOREG_REGS; 294 regnum += MT_CPR0_REGNUM; 295 return mt_copro_register_type (arch, regnum); 296 } 297 } 298 } 299 internal_error (__FILE__, __LINE__, 300 _("mt_register_type: illegal register number %d"), regnum); 301} 302 303/* Return true if register REGNUM is a member of the register group 304 specified by GROUP. */ 305 306static int 307mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum, 308 struct reggroup *group) 309{ 310 /* Groups of registers that can be displayed via "info reg". */ 311 if (group == all_reggroup) 312 return (regnum >= 0 313 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS 314 && mt_register_name (regnum)[0] != '\0'); 315 316 if (group == general_reggroup) 317 return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM); 318 319 if (group == float_reggroup) 320 return 0; /* No float regs. */ 321 322 if (group == vector_reggroup) 323 return 0; /* No vector regs. */ 324 325 /* For any that are not handled above. */ 326 return default_register_reggroup_p (gdbarch, regnum, group); 327} 328 329/* Return the return value convention used for a given type TYPE. 330 Optionally, fetch or set the return value via READBUF or 331 WRITEBUF respectively using REGCACHE for the register 332 values. */ 333 334static enum return_value_convention 335mt_return_value (struct gdbarch *gdbarch, struct type *type, 336 struct regcache *regcache, gdb_byte *readbuf, 337 const gdb_byte *writebuf) 338{ 339 if (TYPE_LENGTH (type) > 4) 340 { 341 /* Return values > 4 bytes are returned in memory, 342 pointed to by R11. */ 343 if (readbuf) 344 { 345 ULONGEST addr; 346 347 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr); 348 read_memory (addr, readbuf, TYPE_LENGTH (type)); 349 } 350 351 if (writebuf) 352 { 353 ULONGEST addr; 354 355 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr); 356 write_memory (addr, writebuf, TYPE_LENGTH (type)); 357 } 358 359 return RETURN_VALUE_ABI_RETURNS_ADDRESS; 360 } 361 else 362 { 363 if (readbuf) 364 { 365 ULONGEST temp; 366 367 /* Return values of <= 4 bytes are returned in R11. */ 368 regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp); 369 store_unsigned_integer (readbuf, TYPE_LENGTH (type), temp); 370 } 371 372 if (writebuf) 373 { 374 if (TYPE_LENGTH (type) < 4) 375 { 376 gdb_byte buf[4]; 377 /* Add leading zeros to the value. */ 378 memset (buf, 0, sizeof (buf)); 379 memcpy (buf + sizeof (buf) - TYPE_LENGTH (type), 380 writebuf, TYPE_LENGTH (type)); 381 regcache_cooked_write (regcache, MT_R11_REGNUM, buf); 382 } 383 else /* (TYPE_LENGTH (type) == 4 */ 384 regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf); 385 } 386 387 return RETURN_VALUE_REGISTER_CONVENTION; 388 } 389} 390 391/* If the input address, PC, is in a function prologue, return the 392 address of the end of the prologue, otherwise return the input 393 address. 394 395 Note: PC is likely to be the function start, since this function 396 is mainly used for advancing a breakpoint to the first line, or 397 stepping to the first line when we have stepped into a function 398 call. */ 399 400static CORE_ADDR 401mt_skip_prologue (CORE_ADDR pc) 402{ 403 CORE_ADDR func_addr = 0, func_end = 0; 404 char *func_name; 405 unsigned long instr; 406 407 if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end)) 408 { 409 struct symtab_and_line sal; 410 struct symbol *sym; 411 412 /* Found a function. */ 413 sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL, NULL); 414 if (sym && SYMBOL_LANGUAGE (sym) != language_asm) 415 { 416 /* Don't use this trick for assembly source files. */ 417 sal = find_pc_line (func_addr, 0); 418 419 if (sal.end && sal.end < func_end) 420 { 421 /* Found a line number, use it as end of prologue. */ 422 return sal.end; 423 } 424 } 425 } 426 427 /* No function symbol, or no line symbol. Use prologue scanning method. */ 428 for (;; pc += 4) 429 { 430 instr = read_memory_unsigned_integer (pc, 4); 431 if (instr == 0x12000000) /* nop */ 432 continue; 433 if (instr == 0x12ddc000) /* copy sp into fp */ 434 continue; 435 instr >>= 16; 436 if (instr == 0x05dd) /* subi sp, sp, imm */ 437 continue; 438 if (instr >= 0x43c0 && instr <= 0x43df) /* push */ 439 continue; 440 /* Not an obvious prologue instruction. */ 441 break; 442 } 443 444 return pc; 445} 446 447/* The breakpoint instruction must be the same size as the smallest 448 instruction in the instruction set. 449 450 The BP for ms1 is defined as 0x68000000 (BREAK). 451 The BP for ms2 is defined as 0x69000000 (illegal) */ 452 453static const gdb_byte * 454mt_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) 455{ 456 static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 }; 457 static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 }; 458 459 *bp_size = 4; 460 if (gdbarch_bfd_arch_info (current_gdbarch)->mach == bfd_mach_ms2) 461 return ms2_breakpoint; 462 463 return ms1_breakpoint; 464} 465 466/* Select the correct coprocessor register bank. Return the pseudo 467 regnum we really want to read. */ 468 469static int 470mt_select_coprocessor (struct gdbarch *gdbarch, 471 struct regcache *regcache, int regno) 472{ 473 unsigned index, base; 474 gdb_byte copro[4]; 475 476 /* Get the copro pseudo regnum. */ 477 regcache_raw_read (regcache, MT_COPRO_REGNUM, copro); 478 base = (extract_signed_integer (&copro[0], 2) * MT_COPRO_PSEUDOREG_DIM_2 479 + extract_signed_integer (&copro[2], 2)); 480 481 regno -= MT_COPRO_PSEUDOREG_ARRAY; 482 index = regno % MT_COPRO_PSEUDOREG_REGS; 483 regno /= MT_COPRO_PSEUDOREG_REGS; 484 if (base != regno) 485 { 486 /* Select the correct coprocessor register bank. Invalidate the 487 coprocessor register cache. */ 488 unsigned ix; 489 490 store_signed_integer (&copro[0], 2, regno / MT_COPRO_PSEUDOREG_DIM_2); 491 store_signed_integer (&copro[2], 2, regno % MT_COPRO_PSEUDOREG_DIM_2); 492 regcache_raw_write (regcache, MT_COPRO_REGNUM, copro); 493 494 /* We must flush the cache, as it is now invalid. */ 495 for (ix = MT_NUM_CPU_REGS; ix != MT_NUM_REGS; ix++) 496 regcache_invalidate (regcache, ix); 497 } 498 499 return index; 500} 501 502/* Fetch the pseudo registers: 503 504 There are two regular pseudo-registers: 505 1) The 'coprocessor' pseudo-register (which mirrors the 506 "real" coprocessor register sent by the target), and 507 2) The 'MAC' pseudo-register (which represents the union 508 of the original 32 bit target MAC register and the new 509 8-bit extended-MAC register). 510 511 Additionally there is an array of coprocessor registers which track 512 the coprocessor registers for each coprocessor. */ 513 514static void 515mt_pseudo_register_read (struct gdbarch *gdbarch, 516 struct regcache *regcache, int regno, gdb_byte *buf) 517{ 518 switch (regno) 519 { 520 case MT_COPRO_REGNUM: 521 case MT_COPRO_PSEUDOREG_REGNUM: 522 regcache_raw_read (regcache, MT_COPRO_REGNUM, buf); 523 break; 524 case MT_MAC_REGNUM: 525 case MT_MAC_PSEUDOREG_REGNUM: 526 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2 527 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2) 528 { 529 ULONGEST oldmac = 0, ext_mac = 0; 530 ULONGEST newmac; 531 532 regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac); 533 regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac); 534 newmac = 535 (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32); 536 store_signed_integer (buf, 8, newmac); 537 } 538 else 539 regcache_raw_read (regcache, MT_MAC_REGNUM, buf); 540 break; 541 default: 542 { 543 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno); 544 545 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM) 546 mt_pseudo_register_read (gdbarch, regcache, 547 MT_MAC_PSEUDOREG_REGNUM, buf); 548 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM) 549 regcache_raw_read (regcache, index + MT_CPR0_REGNUM, buf); 550 } 551 break; 552 } 553} 554 555/* Write the pseudo registers: 556 557 Mt pseudo-registers are stored directly to the target. The 558 'coprocessor' register is special, because when it is modified, all 559 the other coprocessor regs must be flushed from the reg cache. */ 560 561static void 562mt_pseudo_register_write (struct gdbarch *gdbarch, 563 struct regcache *regcache, 564 int regno, const gdb_byte *buf) 565{ 566 int i; 567 568 switch (regno) 569 { 570 case MT_COPRO_REGNUM: 571 case MT_COPRO_PSEUDOREG_REGNUM: 572 regcache_raw_write (regcache, MT_COPRO_REGNUM, buf); 573 for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++) 574 regcache_invalidate (regcache, i); 575 break; 576 case MT_MAC_REGNUM: 577 case MT_MAC_PSEUDOREG_REGNUM: 578 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2 579 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2) 580 { 581 /* The 8-byte MAC pseudo-register must be broken down into two 582 32-byte registers. */ 583 unsigned int oldmac, ext_mac; 584 ULONGEST newmac; 585 586 newmac = extract_unsigned_integer (buf, 8); 587 oldmac = newmac & 0xffffffff; 588 ext_mac = (newmac >> 32) & 0xff; 589 regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac); 590 regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac); 591 } 592 else 593 regcache_raw_write (regcache, MT_MAC_REGNUM, buf); 594 break; 595 default: 596 { 597 unsigned index = mt_select_coprocessor (gdbarch, regcache, regno); 598 599 if (index == MT_COPRO_PSEUDOREG_MAC_REGNUM) 600 mt_pseudo_register_write (gdbarch, regcache, 601 MT_MAC_PSEUDOREG_REGNUM, buf); 602 else if (index < MT_NUM_REGS - MT_CPR0_REGNUM) 603 regcache_raw_write (regcache, index + MT_CPR0_REGNUM, buf); 604 } 605 break; 606 } 607} 608 609static CORE_ADDR 610mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) 611{ 612 /* Register size is 4 bytes. */ 613 return align_down (sp, 4); 614} 615 616/* Implements the "info registers" command. When ``all'' is non-zero, 617 the coprocessor registers will be printed in addition to the rest 618 of the registers. */ 619 620static void 621mt_registers_info (struct gdbarch *gdbarch, 622 struct ui_file *file, 623 struct frame_info *frame, int regnum, int all) 624{ 625 if (regnum == -1) 626 { 627 int lim; 628 629 lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS; 630 631 for (regnum = 0; regnum < lim; regnum++) 632 { 633 /* Don't display the Qchannel register since it will be displayed 634 along with Ichannel. (See below.) */ 635 if (regnum == MT_QCHANNEL_REGNUM) 636 continue; 637 638 mt_registers_info (gdbarch, file, frame, regnum, all); 639 640 /* Display the Qchannel register immediately after Ichannel. */ 641 if (regnum == MT_ICHANNEL_REGNUM) 642 mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all); 643 } 644 } 645 else 646 { 647 if (regnum == MT_EXMAC_REGNUM) 648 return; 649 else if (regnum == MT_CONTEXT_REGNUM) 650 { 651 /* Special output handling for 38-bit context register. */ 652 unsigned char *buff; 653 unsigned int *bytes, i, regsize; 654 655 regsize = register_size (gdbarch, regnum); 656 657 buff = alloca (regsize); 658 bytes = alloca (regsize * sizeof (*bytes)); 659 660 frame_register_read (frame, regnum, buff); 661 662 fputs_filtered (gdbarch_register_name 663 (current_gdbarch, regnum), file); 664 print_spaces_filtered (15 - strlen (gdbarch_register_name 665 (current_gdbarch, regnum)), 666 file); 667 fputs_filtered ("0x", file); 668 669 for (i = 0; i < regsize; i++) 670 fprintf_filtered (file, "%02x", (unsigned int) 671 extract_unsigned_integer (buff + i, 1)); 672 fputs_filtered ("\t", file); 673 print_longest (file, 'd', 0, 674 extract_unsigned_integer (buff, regsize)); 675 fputs_filtered ("\n", file); 676 } 677 else if (regnum == MT_COPRO_REGNUM 678 || regnum == MT_COPRO_PSEUDOREG_REGNUM) 679 { 680 /* Special output handling for the 'coprocessor' register. */ 681 gdb_byte *buf; 682 683 buf = alloca (register_size (gdbarch, MT_COPRO_REGNUM)); 684 frame_register_read (frame, MT_COPRO_REGNUM, buf); 685 /* And print. */ 686 regnum = MT_COPRO_PSEUDOREG_REGNUM; 687 fputs_filtered (gdbarch_register_name (current_gdbarch, regnum), 688 file); 689 print_spaces_filtered (15 - strlen (gdbarch_register_name 690 (current_gdbarch, regnum)), 691 file); 692 val_print (register_type (gdbarch, regnum), buf, 693 0, 0, file, 0, 1, 0, Val_no_prettyprint); 694 fputs_filtered ("\n", file); 695 } 696 else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM) 697 { 698 ULONGEST oldmac, ext_mac, newmac; 699 gdb_byte buf[3 * sizeof (LONGEST)]; 700 701 /* Get the two "real" mac registers. */ 702 frame_register_read (frame, MT_MAC_REGNUM, buf); 703 oldmac = extract_unsigned_integer 704 (buf, register_size (gdbarch, MT_MAC_REGNUM)); 705 if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2 706 || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2) 707 { 708 frame_register_read (frame, MT_EXMAC_REGNUM, buf); 709 ext_mac = extract_unsigned_integer 710 (buf, register_size (gdbarch, MT_EXMAC_REGNUM)); 711 } 712 else 713 ext_mac = 0; 714 715 /* Add them together. */ 716 newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32); 717 718 /* And print. */ 719 regnum = MT_MAC_PSEUDOREG_REGNUM; 720 fputs_filtered (gdbarch_register_name (current_gdbarch, regnum), 721 file); 722 print_spaces_filtered (15 - strlen (gdbarch_register_name 723 (current_gdbarch, regnum)), 724 file); 725 fputs_filtered ("0x", file); 726 print_longest (file, 'x', 0, newmac); 727 fputs_filtered ("\t", file); 728 print_longest (file, 'u', 0, newmac); 729 fputs_filtered ("\n", file); 730 } 731 else 732 default_print_registers_info (gdbarch, file, frame, regnum, all); 733 } 734} 735 736/* Set up the callee's arguments for an inferior function call. The 737 arguments are pushed on the stack or are placed in registers as 738 appropriate. It also sets up the return address (which points to 739 the call dummy breakpoint). 740 741 Returns the updated (and aligned) stack pointer. */ 742 743static CORE_ADDR 744mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function, 745 struct regcache *regcache, CORE_ADDR bp_addr, 746 int nargs, struct value **args, CORE_ADDR sp, 747 int struct_return, CORE_ADDR struct_addr) 748{ 749#define wordsize 4 750 gdb_byte buf[MT_MAX_STRUCT_SIZE]; 751 int argreg = MT_1ST_ARGREG; 752 int split_param_len = 0; 753 int stack_dest = sp; 754 int slacklen; 755 int typelen; 756 int i, j; 757 758 /* First handle however many args we can fit into MT_1ST_ARGREG thru 759 MT_LAST_ARGREG. */ 760 for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++) 761 { 762 const gdb_byte *val; 763 typelen = TYPE_LENGTH (value_type (args[i])); 764 switch (typelen) 765 { 766 case 1: 767 case 2: 768 case 3: 769 case 4: 770 regcache_cooked_write_unsigned (regcache, argreg++, 771 extract_unsigned_integer 772 (value_contents (args[i]), 773 wordsize)); 774 break; 775 case 8: 776 case 12: 777 case 16: 778 val = value_contents (args[i]); 779 while (typelen > 0) 780 { 781 if (argreg <= MT_LAST_ARGREG) 782 { 783 /* This word of the argument is passed in a register. */ 784 regcache_cooked_write_unsigned (regcache, argreg++, 785 extract_unsigned_integer 786 (val, wordsize)); 787 typelen -= wordsize; 788 val += wordsize; 789 } 790 else 791 { 792 /* Remainder of this arg must be passed on the stack 793 (deferred to do later). */ 794 split_param_len = typelen; 795 memcpy (buf, val, typelen); 796 break; /* No more args can be handled in regs. */ 797 } 798 } 799 break; 800 default: 801 /* By reverse engineering of gcc output, args bigger than 802 16 bytes go on the stack, and their address is passed 803 in the argreg. */ 804 stack_dest -= typelen; 805 write_memory (stack_dest, value_contents (args[i]), typelen); 806 regcache_cooked_write_unsigned (regcache, argreg++, stack_dest); 807 break; 808 } 809 } 810 811 /* Next, the rest of the arguments go onto the stack, in reverse order. */ 812 for (j = nargs - 1; j >= i; j--) 813 { 814 gdb_byte *val; 815 816 /* Right-justify the value in an aligned-length buffer. */ 817 typelen = TYPE_LENGTH (value_type (args[j])); 818 slacklen = (wordsize - (typelen % wordsize)) % wordsize; 819 val = alloca (typelen + slacklen); 820 memcpy (val, value_contents (args[j]), typelen); 821 memset (val + typelen, 0, slacklen); 822 /* Now write this data to the stack. */ 823 stack_dest -= typelen + slacklen; 824 write_memory (stack_dest, val, typelen + slacklen); 825 } 826 827 /* Finally, if a param needs to be split between registers and stack, 828 write the second half to the stack now. */ 829 if (split_param_len != 0) 830 { 831 stack_dest -= split_param_len; 832 write_memory (stack_dest, buf, split_param_len); 833 } 834 835 /* Set up return address (provided to us as bp_addr). */ 836 regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr); 837 838 /* Store struct return address, if given. */ 839 if (struct_return && struct_addr != 0) 840 regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr); 841 842 /* Set aside 16 bytes for the callee to save regs 1-4. */ 843 stack_dest -= 16; 844 845 /* Update the stack pointer. */ 846 regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest); 847 848 /* And that should do it. Return the new stack pointer. */ 849 return stack_dest; 850} 851 852 853/* The 'unwind_cache' data structure. */ 854 855struct mt_unwind_cache 856{ 857 /* The previous frame's inner most stack address. 858 Used as this frame ID's stack_addr. */ 859 CORE_ADDR prev_sp; 860 CORE_ADDR frame_base; 861 int framesize; 862 int frameless_p; 863 864 /* Table indicating the location of each and every register. */ 865 struct trad_frame_saved_reg *saved_regs; 866}; 867 868/* Initialize an unwind_cache. Build up the saved_regs table etc. for 869 the frame. */ 870 871static struct mt_unwind_cache * 872mt_frame_unwind_cache (struct frame_info *next_frame, 873 void **this_prologue_cache) 874{ 875 struct gdbarch *gdbarch; 876 struct mt_unwind_cache *info; 877 CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr; 878 unsigned long instr, upper_half, delayed_store = 0; 879 int regnum, offset; 880 ULONGEST sp, fp; 881 882 if ((*this_prologue_cache)) 883 return (*this_prologue_cache); 884 885 gdbarch = get_frame_arch (next_frame); 886 info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache); 887 (*this_prologue_cache) = info; 888 889 info->prev_sp = 0; 890 info->framesize = 0; 891 info->frame_base = 0; 892 info->frameless_p = 1; 893 info->saved_regs = trad_frame_alloc_saved_regs (next_frame); 894 895 /* Grab the frame-relative values of SP and FP, needed below. 896 The frame_saved_register function will find them on the 897 stack or in the registers as appropriate. */ 898 frame_unwind_unsigned_register (next_frame, MT_SP_REGNUM, &sp); 899 frame_unwind_unsigned_register (next_frame, MT_FP_REGNUM, &fp); 900 901 start_addr = frame_func_unwind (next_frame, NORMAL_FRAME); 902 903 /* Return early if GDB couldn't find the function. */ 904 if (start_addr == 0) 905 return info; 906 907 end_addr = frame_pc_unwind (next_frame); 908 prologue_end_addr = skip_prologue_using_sal (start_addr); 909 if (end_addr == 0) 910 for (next_addr = start_addr; next_addr < end_addr; next_addr += 4) 911 { 912 instr = get_frame_memory_unsigned (next_frame, next_addr, 4); 913 if (delayed_store) /* previous instr was a push */ 914 { 915 upper_half = delayed_store >> 16; 916 regnum = upper_half & 0xf; 917 offset = delayed_store & 0xffff; 918 switch (upper_half & 0xfff0) 919 { 920 case 0x43c0: /* push using frame pointer */ 921 info->saved_regs[regnum].addr = offset; 922 break; 923 case 0x43d0: /* push using stack pointer */ 924 info->saved_regs[regnum].addr = offset; 925 break; 926 default: /* lint */ 927 break; 928 } 929 delayed_store = 0; 930 } 931 932 switch (instr) 933 { 934 case 0x12000000: /* NO-OP */ 935 continue; 936 case 0x12ddc000: /* copy sp into fp */ 937 info->frameless_p = 0; /* Record that the frame pointer is in use. */ 938 continue; 939 default: 940 upper_half = instr >> 16; 941 if (upper_half == 0x05dd || /* subi sp, sp, imm */ 942 upper_half == 0x07dd) /* subui sp, sp, imm */ 943 { 944 /* Record the frame size. */ 945 info->framesize = instr & 0xffff; 946 continue; 947 } 948 if ((upper_half & 0xfff0) == 0x43c0 || /* frame push */ 949 (upper_half & 0xfff0) == 0x43d0) /* stack push */ 950 { 951 /* Save this instruction, but don't record the 952 pushed register as 'saved' until we see the 953 next instruction. That's because of deferred stores 954 on this target -- GDB won't be able to read the register 955 from the stack until one instruction later. */ 956 delayed_store = instr; 957 continue; 958 } 959 /* Not a prologue instruction. Is this the end of the prologue? 960 This is the most difficult decision; when to stop scanning. 961 962 If we have no line symbol, then the best thing we can do 963 is to stop scanning when we encounter an instruction that 964 is not likely to be a part of the prologue. 965 966 But if we do have a line symbol, then we should 967 keep scanning until we reach it (or we reach end_addr). */ 968 969 if (prologue_end_addr && (prologue_end_addr > (next_addr + 4))) 970 continue; /* Keep scanning, recording saved_regs etc. */ 971 else 972 break; /* Quit scanning: breakpoint can be set here. */ 973 } 974 } 975 976 /* Special handling for the "saved" address of the SP: 977 The SP is of course never saved on the stack at all, so 978 by convention what we put here is simply the previous 979 _value_ of the SP (as opposed to an address where the 980 previous value would have been pushed). This will also 981 give us the frame base address. */ 982 983 if (info->frameless_p) 984 { 985 info->frame_base = sp + info->framesize; 986 info->prev_sp = sp + info->framesize; 987 } 988 else 989 { 990 info->frame_base = fp + info->framesize; 991 info->prev_sp = fp + info->framesize; 992 } 993 /* Save prev_sp in saved_regs as a value, not as an address. */ 994 trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp); 995 996 /* Now convert frame offsets to actual addresses (not offsets). */ 997 for (regnum = 0; regnum < MT_NUM_REGS; regnum++) 998 if (trad_frame_addr_p (info->saved_regs, regnum)) 999 info->saved_regs[regnum].addr += info->frame_base - info->framesize; 1000 1001 /* The call instruction moves the caller's PC in the callee's RA reg. 1002 Since this is an unwind, do the reverse. Copy the location of RA 1003 into PC (the address / regnum) so that a request for PC will be 1004 converted into a request for the RA. */ 1005 info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM]; 1006 1007 return info; 1008} 1009 1010static CORE_ADDR 1011mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) 1012{ 1013 ULONGEST pc; 1014 1015 frame_unwind_unsigned_register (next_frame, MT_PC_REGNUM, &pc); 1016 return pc; 1017} 1018 1019static CORE_ADDR 1020mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) 1021{ 1022 ULONGEST sp; 1023 1024 frame_unwind_unsigned_register (next_frame, MT_SP_REGNUM, &sp); 1025 return sp; 1026} 1027 1028/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that 1029 dummy frame. The frame ID's base needs to match the TOS value 1030 saved by save_dummy_frame_tos(), and the PC match the dummy frame's 1031 breakpoint. */ 1032 1033static struct frame_id 1034mt_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) 1035{ 1036 return frame_id_build (mt_unwind_sp (gdbarch, next_frame), 1037 frame_pc_unwind (next_frame)); 1038} 1039 1040/* Given a GDB frame, determine the address of the calling function's 1041 frame. This will be used to create a new GDB frame struct. */ 1042 1043static void 1044mt_frame_this_id (struct frame_info *next_frame, 1045 void **this_prologue_cache, struct frame_id *this_id) 1046{ 1047 struct mt_unwind_cache *info = 1048 mt_frame_unwind_cache (next_frame, this_prologue_cache); 1049 1050 if (!(info == NULL || info->prev_sp == 0)) 1051 (*this_id) = frame_id_build (info->prev_sp, 1052 frame_func_unwind (next_frame, NORMAL_FRAME)); 1053 1054 return; 1055} 1056 1057static void 1058mt_frame_prev_register (struct frame_info *next_frame, 1059 void **this_prologue_cache, 1060 int regnum, int *optimizedp, 1061 enum lval_type *lvalp, CORE_ADDR *addrp, 1062 int *realnump, gdb_byte *bufferp) 1063{ 1064 struct mt_unwind_cache *info = 1065 mt_frame_unwind_cache (next_frame, this_prologue_cache); 1066 1067 trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, 1068 optimizedp, lvalp, addrp, realnump, bufferp); 1069} 1070 1071static CORE_ADDR 1072mt_frame_base_address (struct frame_info *next_frame, 1073 void **this_prologue_cache) 1074{ 1075 struct mt_unwind_cache *info = 1076 mt_frame_unwind_cache (next_frame, this_prologue_cache); 1077 1078 return info->frame_base; 1079} 1080 1081/* This is a shared interface: the 'frame_unwind' object is what's 1082 returned by the 'sniffer' function, and in turn specifies how to 1083 get a frame's ID and prev_regs. 1084 1085 This exports the 'prev_register' and 'this_id' methods. */ 1086 1087static const struct frame_unwind mt_frame_unwind = { 1088 NORMAL_FRAME, 1089 mt_frame_this_id, 1090 mt_frame_prev_register 1091}; 1092 1093/* The sniffer is a registered function that identifies our family of 1094 frame unwind functions (this_id and prev_register). */ 1095 1096static const struct frame_unwind * 1097mt_frame_sniffer (struct frame_info *next_frame) 1098{ 1099 return &mt_frame_unwind; 1100} 1101 1102/* Another shared interface: the 'frame_base' object specifies how to 1103 unwind a frame and secure the base addresses for frame objects 1104 (locals, args). */ 1105 1106static struct frame_base mt_frame_base = { 1107 &mt_frame_unwind, 1108 mt_frame_base_address, 1109 mt_frame_base_address, 1110 mt_frame_base_address 1111}; 1112 1113static struct gdbarch * 1114mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) 1115{ 1116 struct gdbarch *gdbarch; 1117 1118 /* Find a candidate among the list of pre-declared architectures. */ 1119 arches = gdbarch_list_lookup_by_info (arches, &info); 1120 if (arches != NULL) 1121 return arches->gdbarch; 1122 1123 /* None found, create a new architecture from the information 1124 provided. */ 1125 gdbarch = gdbarch_alloc (&info, NULL); 1126 1127 set_gdbarch_float_format (gdbarch, floatformats_ieee_single); 1128 set_gdbarch_double_format (gdbarch, floatformats_ieee_double); 1129 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); 1130 1131 set_gdbarch_register_name (gdbarch, mt_register_name); 1132 set_gdbarch_num_regs (gdbarch, MT_NUM_REGS); 1133 set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS); 1134 set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM); 1135 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM); 1136 set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read); 1137 set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write); 1138 set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue); 1139 set_gdbarch_inner_than (gdbarch, core_addr_lessthan); 1140 set_gdbarch_breakpoint_from_pc (gdbarch, mt_breakpoint_from_pc); 1141 set_gdbarch_decr_pc_after_break (gdbarch, 0); 1142 set_gdbarch_frame_args_skip (gdbarch, 0); 1143 set_gdbarch_print_insn (gdbarch, print_insn_mt); 1144 set_gdbarch_register_type (gdbarch, mt_register_type); 1145 set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p); 1146 1147 set_gdbarch_return_value (gdbarch, mt_return_value); 1148 set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM); 1149 1150 set_gdbarch_frame_align (gdbarch, mt_frame_align); 1151 1152 set_gdbarch_print_registers_info (gdbarch, mt_registers_info); 1153 1154 set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call); 1155 1156 /* Target builtin data types. */ 1157 set_gdbarch_short_bit (gdbarch, 16); 1158 set_gdbarch_int_bit (gdbarch, 32); 1159 set_gdbarch_long_bit (gdbarch, 32); 1160 set_gdbarch_long_long_bit (gdbarch, 64); 1161 set_gdbarch_float_bit (gdbarch, 32); 1162 set_gdbarch_double_bit (gdbarch, 64); 1163 set_gdbarch_long_double_bit (gdbarch, 64); 1164 set_gdbarch_ptr_bit (gdbarch, 32); 1165 1166 /* Register the DWARF 2 sniffer first, and then the traditional prologue 1167 based sniffer. */ 1168 frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); 1169 frame_unwind_append_sniffer (gdbarch, mt_frame_sniffer); 1170 frame_base_set_default (gdbarch, &mt_frame_base); 1171 1172 /* Register the 'unwind_pc' method. */ 1173 set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc); 1174 set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp); 1175 1176 /* Methods for saving / extracting a dummy frame's ID. 1177 The ID's stack address must match the SP value returned by 1178 PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ 1179 set_gdbarch_unwind_dummy_id (gdbarch, mt_unwind_dummy_id); 1180 1181 return gdbarch; 1182} 1183 1184void 1185_initialize_mt_tdep (void) 1186{ 1187 register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init); 1188} 1189