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1/*
2 * C-Media CMI8788 driver for C-Media's reference design and similar models
3 *
4 * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
5 *
6 *
7 *  This driver is free software; you can redistribute it and/or modify
8 *  it under the terms of the GNU General Public License, version 2.
9 *
10 *  This driver is distributed in the hope that it will be useful,
11 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
12 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 *  GNU General Public License for more details.
14 *
15 *  You should have received a copy of the GNU General Public License
16 *  along with this driver; if not, write to the Free Software
17 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
18 */
19
20/*
21 * CMI8788:
22 *
23 * SPI 0 -> 1st AK4396 (front)
24 * SPI 1 -> 2nd AK4396 (surround)
25 * SPI 2 -> 3rd AK4396 (center/LFE)
26 * SPI 3 -> WM8785
27 * SPI 4 -> 4th AK4396 (back)
28 *
29 * GPIO 0 -> DFS0 of AK5385
30 * GPIO 1 -> DFS1 of AK5385
31 * GPIO 8 -> enable headphone amplifier on HT-Omega models
32 *
33 * CM9780:
34 *
35 * GPO 0 -> route line-in (0) or AC97 output (1) to ADC input
36 */
37
38#include <linux/delay.h>
39#include <linux/mutex.h>
40#include <linux/pci.h>
41#include <sound/ac97_codec.h>
42#include <sound/control.h>
43#include <sound/core.h>
44#include <sound/initval.h>
45#include <sound/pcm.h>
46#include <sound/pcm_params.h>
47#include <sound/tlv.h>
48#include "oxygen.h"
49#include "ak4396.h"
50#include "wm8785.h"
51
52MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
53MODULE_DESCRIPTION("C-Media CMI8788 driver");
54MODULE_LICENSE("GPL v2");
55MODULE_SUPPORTED_DEVICE("{{C-Media,CMI8788}}");
56
57static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
58static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
59static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
60
61module_param_array(index, int, NULL, 0444);
62MODULE_PARM_DESC(index, "card index");
63module_param_array(id, charp, NULL, 0444);
64MODULE_PARM_DESC(id, "ID string");
65module_param_array(enable, bool, NULL, 0444);
66MODULE_PARM_DESC(enable, "enable card");
67
68enum {
69	MODEL_CMEDIA_REF,	/* C-Media's reference design */
70	MODEL_MERIDIAN,		/* AuzenTech X-Meridian */
71	MODEL_CLARO,		/* HT-Omega Claro */
72	MODEL_CLARO_HALO,	/* HT-Omega Claro halo */
73};
74
75static DEFINE_PCI_DEVICE_TABLE(oxygen_ids) = {
76	{ OXYGEN_PCI_SUBID(0x10b0, 0x0216), .driver_data = MODEL_CMEDIA_REF },
77	{ OXYGEN_PCI_SUBID(0x10b0, 0x0218), .driver_data = MODEL_CMEDIA_REF },
78	{ OXYGEN_PCI_SUBID(0x10b0, 0x0219), .driver_data = MODEL_CMEDIA_REF },
79	{ OXYGEN_PCI_SUBID(0x13f6, 0x0001), .driver_data = MODEL_CMEDIA_REF },
80	{ OXYGEN_PCI_SUBID(0x13f6, 0x0010), .driver_data = MODEL_CMEDIA_REF },
81	{ OXYGEN_PCI_SUBID(0x13f6, 0x8788), .driver_data = MODEL_CMEDIA_REF },
82	{ OXYGEN_PCI_SUBID(0x147a, 0xa017), .driver_data = MODEL_CMEDIA_REF },
83	{ OXYGEN_PCI_SUBID(0x1a58, 0x0910), .driver_data = MODEL_CMEDIA_REF },
84	{ OXYGEN_PCI_SUBID(0x415a, 0x5431), .driver_data = MODEL_MERIDIAN },
85	{ OXYGEN_PCI_SUBID(0x7284, 0x9761), .driver_data = MODEL_CLARO },
86	{ OXYGEN_PCI_SUBID(0x7284, 0x9781), .driver_data = MODEL_CLARO_HALO },
87	{ }
88};
89MODULE_DEVICE_TABLE(pci, oxygen_ids);
90
91
92#define GPIO_AK5385_DFS_MASK	0x0003
93#define GPIO_AK5385_DFS_NORMAL	0x0000
94#define GPIO_AK5385_DFS_DOUBLE	0x0001
95#define GPIO_AK5385_DFS_QUAD	0x0002
96
97#define GPIO_CLARO_HP		0x0100
98
99struct generic_data {
100	u8 ak4396_regs[4][5];
101	u16 wm8785_regs[3];
102};
103
104static void ak4396_write(struct oxygen *chip, unsigned int codec,
105			 u8 reg, u8 value)
106{
107	/* maps ALSA channel pair number to SPI output */
108	static const u8 codec_spi_map[4] = {
109		0, 1, 2, 4
110	};
111	struct generic_data *data = chip->model_data;
112
113	oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
114			 OXYGEN_SPI_DATA_LENGTH_2 |
115			 OXYGEN_SPI_CLOCK_160 |
116			 (codec_spi_map[codec] << OXYGEN_SPI_CODEC_SHIFT) |
117			 OXYGEN_SPI_CEN_LATCH_CLOCK_HI,
118			 AK4396_WRITE | (reg << 8) | value);
119	data->ak4396_regs[codec][reg] = value;
120}
121
122static void ak4396_write_cached(struct oxygen *chip, unsigned int codec,
123				u8 reg, u8 value)
124{
125	struct generic_data *data = chip->model_data;
126
127	if (value != data->ak4396_regs[codec][reg])
128		ak4396_write(chip, codec, reg, value);
129}
130
131static void wm8785_write(struct oxygen *chip, u8 reg, unsigned int value)
132{
133	struct generic_data *data = chip->model_data;
134
135	oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
136			 OXYGEN_SPI_DATA_LENGTH_2 |
137			 OXYGEN_SPI_CLOCK_160 |
138			 (3 << OXYGEN_SPI_CODEC_SHIFT) |
139			 OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
140			 (reg << 9) | value);
141	if (reg < ARRAY_SIZE(data->wm8785_regs))
142		data->wm8785_regs[reg] = value;
143}
144
145static void ak4396_registers_init(struct oxygen *chip)
146{
147	struct generic_data *data = chip->model_data;
148	unsigned int i;
149
150	for (i = 0; i < 4; ++i) {
151		ak4396_write(chip, i, AK4396_CONTROL_1,
152			     AK4396_DIF_24_MSB | AK4396_RSTN);
153		ak4396_write(chip, i, AK4396_CONTROL_2,
154			     data->ak4396_regs[0][AK4396_CONTROL_2]);
155		ak4396_write(chip, i, AK4396_CONTROL_3,
156			     AK4396_PCM);
157		ak4396_write(chip, i, AK4396_LCH_ATT,
158			     chip->dac_volume[i * 2]);
159		ak4396_write(chip, i, AK4396_RCH_ATT,
160			     chip->dac_volume[i * 2 + 1]);
161	}
162}
163
164static void ak4396_init(struct oxygen *chip)
165{
166	struct generic_data *data = chip->model_data;
167
168	data->ak4396_regs[0][AK4396_CONTROL_2] =
169		AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
170	ak4396_registers_init(chip);
171	snd_component_add(chip->card, "AK4396");
172}
173
174static void ak5385_init(struct oxygen *chip)
175{
176	oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_AK5385_DFS_MASK);
177	oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_AK5385_DFS_MASK);
178	snd_component_add(chip->card, "AK5385");
179}
180
181static void wm8785_registers_init(struct oxygen *chip)
182{
183	struct generic_data *data = chip->model_data;
184
185	wm8785_write(chip, WM8785_R7, 0);
186	wm8785_write(chip, WM8785_R0, data->wm8785_regs[0]);
187	wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
188}
189
190static void wm8785_init(struct oxygen *chip)
191{
192	struct generic_data *data = chip->model_data;
193
194	data->wm8785_regs[0] =
195		WM8785_MCR_SLAVE | WM8785_OSR_SINGLE | WM8785_FORMAT_LJUST;
196	data->wm8785_regs[2] = WM8785_HPFR | WM8785_HPFL;
197	wm8785_registers_init(chip);
198	snd_component_add(chip->card, "WM8785");
199}
200
201static void generic_init(struct oxygen *chip)
202{
203	ak4396_init(chip);
204	wm8785_init(chip);
205}
206
207static void meridian_init(struct oxygen *chip)
208{
209	ak4396_init(chip);
210	ak5385_init(chip);
211}
212
213static void claro_enable_hp(struct oxygen *chip)
214{
215	msleep(300);
216	oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_CLARO_HP);
217	oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
218}
219
220static void claro_init(struct oxygen *chip)
221{
222	ak4396_init(chip);
223	wm8785_init(chip);
224	claro_enable_hp(chip);
225}
226
227static void claro_halo_init(struct oxygen *chip)
228{
229	ak4396_init(chip);
230	ak5385_init(chip);
231	claro_enable_hp(chip);
232}
233
234static void generic_cleanup(struct oxygen *chip)
235{
236}
237
238static void claro_disable_hp(struct oxygen *chip)
239{
240	oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA, GPIO_CLARO_HP);
241}
242
243static void claro_cleanup(struct oxygen *chip)
244{
245	claro_disable_hp(chip);
246}
247
248static void claro_suspend(struct oxygen *chip)
249{
250	claro_disable_hp(chip);
251}
252
253static void generic_resume(struct oxygen *chip)
254{
255	ak4396_registers_init(chip);
256	wm8785_registers_init(chip);
257}
258
259static void meridian_resume(struct oxygen *chip)
260{
261	ak4396_registers_init(chip);
262}
263
264static void claro_resume(struct oxygen *chip)
265{
266	ak4396_registers_init(chip);
267	claro_enable_hp(chip);
268}
269
270static void set_ak4396_params(struct oxygen *chip,
271			      struct snd_pcm_hw_params *params)
272{
273	struct generic_data *data = chip->model_data;
274	unsigned int i;
275	u8 value;
276
277	value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_DFS_MASK;
278	if (params_rate(params) <= 54000)
279		value |= AK4396_DFS_NORMAL;
280	else if (params_rate(params) <= 108000)
281		value |= AK4396_DFS_DOUBLE;
282	else
283		value |= AK4396_DFS_QUAD;
284
285	msleep(1); /* wait for the new MCLK to become stable */
286
287	if (value != data->ak4396_regs[0][AK4396_CONTROL_2]) {
288		for (i = 0; i < 4; ++i) {
289			ak4396_write(chip, i, AK4396_CONTROL_1,
290				     AK4396_DIF_24_MSB);
291			ak4396_write(chip, i, AK4396_CONTROL_2, value);
292			ak4396_write(chip, i, AK4396_CONTROL_1,
293				     AK4396_DIF_24_MSB | AK4396_RSTN);
294		}
295	}
296}
297
298static void update_ak4396_volume(struct oxygen *chip)
299{
300	unsigned int i;
301
302	for (i = 0; i < 4; ++i) {
303		ak4396_write_cached(chip, i, AK4396_LCH_ATT,
304				    chip->dac_volume[i * 2]);
305		ak4396_write_cached(chip, i, AK4396_RCH_ATT,
306				    chip->dac_volume[i * 2 + 1]);
307	}
308}
309
310static void update_ak4396_mute(struct oxygen *chip)
311{
312	struct generic_data *data = chip->model_data;
313	unsigned int i;
314	u8 value;
315
316	value = data->ak4396_regs[0][AK4396_CONTROL_2] & ~AK4396_SMUTE;
317	if (chip->dac_mute)
318		value |= AK4396_SMUTE;
319	for (i = 0; i < 4; ++i)
320		ak4396_write_cached(chip, i, AK4396_CONTROL_2, value);
321}
322
323static void set_wm8785_params(struct oxygen *chip,
324			      struct snd_pcm_hw_params *params)
325{
326	struct generic_data *data = chip->model_data;
327	unsigned int value;
328
329	value = WM8785_MCR_SLAVE | WM8785_FORMAT_LJUST;
330	if (params_rate(params) <= 48000)
331		value |= WM8785_OSR_SINGLE;
332	else if (params_rate(params) <= 96000)
333		value |= WM8785_OSR_DOUBLE;
334	else
335		value |= WM8785_OSR_QUAD;
336	if (value != data->wm8785_regs[0]) {
337		wm8785_write(chip, WM8785_R7, 0);
338		wm8785_write(chip, WM8785_R0, value);
339		wm8785_write(chip, WM8785_R2, data->wm8785_regs[2]);
340	}
341}
342
343static void set_ak5385_params(struct oxygen *chip,
344			      struct snd_pcm_hw_params *params)
345{
346	unsigned int value;
347
348	if (params_rate(params) <= 54000)
349		value = GPIO_AK5385_DFS_NORMAL;
350	else if (params_rate(params) <= 108000)
351		value = GPIO_AK5385_DFS_DOUBLE;
352	else
353		value = GPIO_AK5385_DFS_QUAD;
354	oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
355			      value, GPIO_AK5385_DFS_MASK);
356}
357
358static int rolloff_info(struct snd_kcontrol *ctl,
359			struct snd_ctl_elem_info *info)
360{
361	static const char *const names[2] = {
362		"Sharp Roll-off", "Slow Roll-off"
363	};
364
365	info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
366	info->count = 1;
367	info->value.enumerated.items = 2;
368	if (info->value.enumerated.item >= 2)
369		info->value.enumerated.item = 1;
370	strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
371	return 0;
372}
373
374static int rolloff_get(struct snd_kcontrol *ctl,
375		       struct snd_ctl_elem_value *value)
376{
377	struct oxygen *chip = ctl->private_data;
378	struct generic_data *data = chip->model_data;
379
380	value->value.enumerated.item[0] =
381		(data->ak4396_regs[0][AK4396_CONTROL_2] & AK4396_SLOW) != 0;
382	return 0;
383}
384
385static int rolloff_put(struct snd_kcontrol *ctl,
386		       struct snd_ctl_elem_value *value)
387{
388	struct oxygen *chip = ctl->private_data;
389	struct generic_data *data = chip->model_data;
390	unsigned int i;
391	int changed;
392	u8 reg;
393
394	mutex_lock(&chip->mutex);
395	reg = data->ak4396_regs[0][AK4396_CONTROL_2];
396	if (value->value.enumerated.item[0])
397		reg |= AK4396_SLOW;
398	else
399		reg &= ~AK4396_SLOW;
400	changed = reg != data->ak4396_regs[0][AK4396_CONTROL_2];
401	if (changed) {
402		for (i = 0; i < 4; ++i)
403			ak4396_write(chip, i, AK4396_CONTROL_2, reg);
404	}
405	mutex_unlock(&chip->mutex);
406	return changed;
407}
408
409static const struct snd_kcontrol_new rolloff_control = {
410	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
411	.name = "DAC Filter Playback Enum",
412	.info = rolloff_info,
413	.get = rolloff_get,
414	.put = rolloff_put,
415};
416
417static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
418{
419	static const char *const names[2] = {
420		"None", "High-pass Filter"
421	};
422
423	info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
424	info->count = 1;
425	info->value.enumerated.items = 2;
426	if (info->value.enumerated.item >= 2)
427		info->value.enumerated.item = 1;
428	strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
429	return 0;
430}
431
432static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
433{
434	struct oxygen *chip = ctl->private_data;
435	struct generic_data *data = chip->model_data;
436
437	value->value.enumerated.item[0] =
438		(data->wm8785_regs[WM8785_R2] & WM8785_HPFR) != 0;
439	return 0;
440}
441
442static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
443{
444	struct oxygen *chip = ctl->private_data;
445	struct generic_data *data = chip->model_data;
446	unsigned int reg;
447	int changed;
448
449	mutex_lock(&chip->mutex);
450	reg = data->wm8785_regs[WM8785_R2] & ~(WM8785_HPFR | WM8785_HPFL);
451	if (value->value.enumerated.item[0])
452		reg |= WM8785_HPFR | WM8785_HPFL;
453	changed = reg != data->wm8785_regs[WM8785_R2];
454	if (changed)
455		wm8785_write(chip, WM8785_R2, reg);
456	mutex_unlock(&chip->mutex);
457	return changed;
458}
459
460static const struct snd_kcontrol_new hpf_control = {
461	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
462	.name = "ADC Filter Capture Enum",
463	.info = hpf_info,
464	.get = hpf_get,
465	.put = hpf_put,
466};
467
468static int generic_mixer_init(struct oxygen *chip)
469{
470	return snd_ctl_add(chip->card, snd_ctl_new1(&rolloff_control, chip));
471}
472
473static int generic_wm8785_mixer_init(struct oxygen *chip)
474{
475	int err;
476
477	err = generic_mixer_init(chip);
478	if (err < 0)
479		return err;
480	err = snd_ctl_add(chip->card, snd_ctl_new1(&hpf_control, chip));
481	if (err < 0)
482		return err;
483	return 0;
484}
485
486static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0);
487
488static const struct oxygen_model model_generic = {
489	.shortname = "C-Media CMI8788",
490	.longname = "C-Media Oxygen HD Audio",
491	.chip = "CMI8788",
492	.init = generic_init,
493	.mixer_init = generic_wm8785_mixer_init,
494	.cleanup = generic_cleanup,
495	.resume = generic_resume,
496	.get_i2s_mclk = oxygen_default_i2s_mclk,
497	.set_dac_params = set_ak4396_params,
498	.set_adc_params = set_wm8785_params,
499	.update_dac_volume = update_ak4396_volume,
500	.update_dac_mute = update_ak4396_mute,
501	.dac_tlv = ak4396_db_scale,
502	.model_data_size = sizeof(struct generic_data),
503	.device_config = PLAYBACK_0_TO_I2S |
504			 PLAYBACK_1_TO_SPDIF |
505			 PLAYBACK_2_TO_AC97_1 |
506			 CAPTURE_0_FROM_I2S_1 |
507			 CAPTURE_1_FROM_SPDIF |
508			 CAPTURE_2_FROM_AC97_1,
509	.dac_channels = 8,
510	.dac_volume_min = 0,
511	.dac_volume_max = 255,
512	.function_flags = OXYGEN_FUNCTION_SPI |
513			  OXYGEN_FUNCTION_ENABLE_SPI_4_5,
514	.dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
515	.adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
516};
517
518static int __devinit get_oxygen_model(struct oxygen *chip,
519				      const struct pci_device_id *id)
520{
521	chip->model = model_generic;
522	switch (id->driver_data) {
523	case MODEL_MERIDIAN:
524		chip->model.init = meridian_init;
525		chip->model.mixer_init = generic_mixer_init;
526		chip->model.resume = meridian_resume;
527		chip->model.set_adc_params = set_ak5385_params;
528		chip->model.device_config = PLAYBACK_0_TO_I2S |
529					    PLAYBACK_1_TO_SPDIF |
530					    CAPTURE_0_FROM_I2S_2 |
531					    CAPTURE_1_FROM_SPDIF;
532		break;
533	case MODEL_CLARO:
534		chip->model.init = claro_init;
535		chip->model.cleanup = claro_cleanup;
536		chip->model.suspend = claro_suspend;
537		chip->model.resume = claro_resume;
538		break;
539	case MODEL_CLARO_HALO:
540		chip->model.init = claro_halo_init;
541		chip->model.mixer_init = generic_mixer_init;
542		chip->model.cleanup = claro_cleanup;
543		chip->model.suspend = claro_suspend;
544		chip->model.resume = claro_resume;
545		chip->model.set_adc_params = set_ak5385_params;
546		chip->model.device_config = PLAYBACK_0_TO_I2S |
547					    PLAYBACK_1_TO_SPDIF |
548					    CAPTURE_0_FROM_I2S_2 |
549					    CAPTURE_1_FROM_SPDIF;
550		break;
551	}
552	if (id->driver_data == MODEL_MERIDIAN ||
553	    id->driver_data == MODEL_CLARO_HALO) {
554		chip->model.misc_flags = OXYGEN_MISC_MIDI;
555		chip->model.device_config |= MIDI_OUTPUT | MIDI_INPUT;
556	}
557	return 0;
558}
559
560static int __devinit generic_oxygen_probe(struct pci_dev *pci,
561					  const struct pci_device_id *pci_id)
562{
563	static int dev;
564	int err;
565
566	if (dev >= SNDRV_CARDS)
567		return -ENODEV;
568	if (!enable[dev]) {
569		++dev;
570		return -ENOENT;
571	}
572	err = oxygen_pci_probe(pci, index[dev], id[dev], THIS_MODULE,
573			       oxygen_ids, get_oxygen_model);
574	if (err >= 0)
575		++dev;
576	return err;
577}
578
579static struct pci_driver oxygen_driver = {
580	.name = "CMI8788",
581	.id_table = oxygen_ids,
582	.probe = generic_oxygen_probe,
583	.remove = __devexit_p(oxygen_pci_remove),
584#ifdef CONFIG_PM
585	.suspend = oxygen_pci_suspend,
586	.resume = oxygen_pci_resume,
587#endif
588};
589
590static int __init alsa_card_oxygen_init(void)
591{
592	return pci_register_driver(&oxygen_driver);
593}
594
595static void __exit alsa_card_oxygen_exit(void)
596{
597	pci_unregister_driver(&oxygen_driver);
598}
599
600module_init(alsa_card_oxygen_init)
601module_exit(alsa_card_oxygen_exit)
602