1/* Modified by Broadcom Corp. Portions Copyright (c) Broadcom Corp, 2012. */ 2#ifndef _LINUX_IRQ_H 3#define _LINUX_IRQ_H 4 5/* 6 * Please do not include this file in generic code. There is currently 7 * no requirement for any architecture to implement anything held 8 * within this file. 9 * 10 * Thanks. --rmk 11 */ 12 13#include <linux/smp.h> 14 15#ifndef CONFIG_S390 16 17#include <linux/linkage.h> 18#include <linux/cache.h> 19#include <linux/spinlock.h> 20#include <linux/cpumask.h> 21#include <linux/gfp.h> 22#include <linux/irqreturn.h> 23#include <linux/irqnr.h> 24#include <linux/errno.h> 25#include <linux/topology.h> 26#include <linux/wait.h> 27 28#include <asm/irq.h> 29#include <asm/ptrace.h> 30#include <asm/irq_regs.h> 31 32struct irq_desc; 33typedef void (*irq_flow_handler_t)(unsigned int irq, 34 struct irq_desc *desc); 35 36 37/* 38 * IRQ line status. 39 * 40 * Bits 0-7 are reserved for the IRQF_* bits in linux/interrupt.h 41 * 42 * IRQ types 43 */ 44#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */ 45#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */ 46#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */ 47#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING) 48#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */ 49#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */ 50#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */ 51#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */ 52 53/* Internal flags */ 54#define IRQ_INPROGRESS 0x00000100 /* IRQ handler active - do not enter! */ 55#define IRQ_DISABLED 0x00000200 /* IRQ disabled - do not enter! */ 56#define IRQ_PENDING 0x00000400 /* IRQ pending - replay on enable */ 57#define IRQ_REPLAY 0x00000800 /* IRQ has been replayed but not acked yet */ 58#define IRQ_AUTODETECT 0x00001000 /* IRQ is being autodetected */ 59#define IRQ_WAITING 0x00002000 /* IRQ not yet seen - for autodetection */ 60#define IRQ_LEVEL 0x00004000 /* IRQ level triggered */ 61#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */ 62#define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ 63#define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ 64#define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ 65#define IRQ_NOAUTOEN 0x00080000 /* IRQ will not be enabled on request irq */ 66#define IRQ_WAKEUP 0x00100000 /* IRQ triggers system wakeup */ 67#define IRQ_MOVE_PENDING 0x00200000 /* need to re-target IRQ destination */ 68#define IRQ_NO_BALANCING 0x00400000 /* IRQ is excluded from balancing */ 69#define IRQ_SPURIOUS_DISABLED 0x00800000 /* IRQ was disabled by the spurious trap */ 70#define IRQ_MOVE_PCNTXT 0x01000000 /* IRQ migration from process context */ 71#define IRQ_AFFINITY_SET 0x02000000 /* IRQ affinity was set from userspace*/ 72#define IRQ_SUSPENDED 0x04000000 /* IRQ has gone through suspend sequence */ 73#define IRQ_ONESHOT 0x08000000 /* IRQ is not unmasked after hardirq */ 74#define IRQ_NESTED_THREAD 0x10000000 /* IRQ is nested into another, no own handler thread */ 75 76#ifdef CONFIG_IRQ_PER_CPU 77# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU) 78# define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING) 79#else 80# define CHECK_IRQ_PER_CPU(var) 0 81# define IRQ_NO_BALANCING_MASK IRQ_NO_BALANCING 82#endif 83 84struct proc_dir_entry; 85struct msi_desc; 86 87/** 88 * struct irq_chip - hardware interrupt chip descriptor 89 * 90 * @name: name for /proc/interrupts 91 * @startup: start up the interrupt (defaults to ->enable if NULL) 92 * @shutdown: shut down the interrupt (defaults to ->disable if NULL) 93 * @enable: enable the interrupt (defaults to chip->unmask if NULL) 94 * @disable: disable the interrupt 95 * @ack: start of a new interrupt 96 * @mask: mask an interrupt source 97 * @mask_ack: ack and mask an interrupt source 98 * @unmask: unmask an interrupt source 99 * @eoi: end of interrupt - chip level 100 * @end: end of interrupt - flow level 101 * @set_affinity: set the CPU affinity on SMP machines 102 * @retrigger: resend an IRQ to the CPU 103 * @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ 104 * @set_wake: enable/disable power-management wake-on of an IRQ 105 * 106 * @bus_lock: function to lock access to slow bus (i2c) chips 107 * @bus_sync_unlock: function to sync and unlock slow bus (i2c) chips 108 * 109 * @release: release function solely used by UML 110 * @typename: obsoleted by name, kept as migration helper 111 */ 112struct irq_chip { 113 const char *name; 114 unsigned int (*startup)(unsigned int irq); 115 void (*shutdown)(unsigned int irq); 116 void (*enable)(unsigned int irq); 117 void (*disable)(unsigned int irq); 118 119 void (*ack)(unsigned int irq); 120 void (*mask)(unsigned int irq); 121 void (*mask_ack)(unsigned int irq); 122 void (*unmask)(unsigned int irq); 123 void (*eoi)(unsigned int irq); 124 125 void (*end)(unsigned int irq); 126 int (*set_affinity)(unsigned int irq, 127 const struct cpumask *dest); 128 int (*retrigger)(unsigned int irq); 129 int (*set_type)(unsigned int irq, unsigned int flow_type); 130 int (*set_wake)(unsigned int irq, unsigned int on); 131 132 void (*bus_lock)(unsigned int irq); 133 void (*bus_sync_unlock)(unsigned int irq); 134 135 /* Currently used only by UML, might disappear one day.*/ 136#ifdef CONFIG_IRQ_RELEASE_METHOD 137 void (*release)(unsigned int irq, void *dev_id); 138#endif 139 /* 140 * For compatibility, ->typename is copied into ->name. 141 * Will disappear. 142 */ 143 const char *typename; 144}; 145 146struct timer_rand_state; 147struct irq_2_iommu; 148/** 149 * struct irq_desc - interrupt descriptor 150 * @irq: interrupt number for this descriptor 151 * @timer_rand_state: pointer to timer rand state struct 152 * @kstat_irqs: irq stats per cpu 153 * @irq_2_iommu: iommu with this irq 154 * @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()] 155 * @chip: low level interrupt hardware access 156 * @msi_desc: MSI descriptor 157 * @handler_data: per-IRQ data for the irq_chip methods 158 * @chip_data: platform-specific per-chip private data for the chip 159 * methods, to allow shared chip implementations 160 * @action: the irq action chain 161 * @status: status information 162 * @depth: disable-depth, for nested irq_disable() calls 163 * @wake_depth: enable depth, for multiple set_irq_wake() callers 164 * @irq_count: stats field to detect stalled irqs 165 * @last_unhandled: aging timer for unhandled count 166 * @irqs_unhandled: stats field for spurious unhandled interrupts 167 * @lock: locking for SMP 168 * @affinity: IRQ affinity on SMP 169 * @node: node index useful for balancing 170 * @pending_mask: pending rebalanced interrupts 171 * @threads_active: number of irqaction threads currently running 172 * @wait_for_threads: wait queue for sync_irq to wait for threaded handlers 173 * @dir: /proc/irq/ procfs entry 174 * @name: flow handler name for /proc/interrupts output 175 */ 176struct irq_desc { 177 unsigned int irq; 178 struct timer_rand_state *timer_rand_state; 179 unsigned int *kstat_irqs; 180#ifdef CONFIG_INTR_REMAP 181 struct irq_2_iommu *irq_2_iommu; 182#endif 183 irq_flow_handler_t handle_irq; 184 struct irq_chip *chip; 185 struct msi_desc *msi_desc; 186 void *handler_data; 187 void *chip_data; 188 struct irqaction *action; /* IRQ action list */ 189 unsigned int status; /* IRQ status */ 190 191 unsigned int depth; /* nested irq disables */ 192 unsigned int wake_depth; /* nested wake enables */ 193 unsigned int irq_count; /* For detecting broken IRQs */ 194 unsigned long last_unhandled; /* Aging timer for unhandled count */ 195 unsigned int irqs_unhandled; 196 raw_spinlock_t lock; 197#ifdef CONFIG_SMP 198 cpumask_var_t affinity; 199 const struct cpumask *affinity_hint; 200 unsigned int node; 201#ifdef CONFIG_GENERIC_PENDING_IRQ 202 cpumask_var_t pending_mask; 203#endif 204#endif 205 atomic_t threads_active; 206 wait_queue_head_t wait_for_threads; 207#ifdef CONFIG_PROC_FS 208 struct proc_dir_entry *dir; 209#endif 210 const char *name; 211} ____cacheline_internodealigned_in_smp; 212 213extern void arch_init_copy_chip_data(struct irq_desc *old_desc, 214 struct irq_desc *desc, int node); 215extern void arch_free_chip_data(struct irq_desc *old_desc, struct irq_desc *desc); 216 217#ifndef CONFIG_SPARSE_IRQ 218extern struct irq_desc irq_desc[NR_IRQS]; 219#endif 220 221#ifdef CONFIG_NUMA_IRQ_DESC 222extern struct irq_desc *move_irq_desc(struct irq_desc *old_desc, int node); 223#else 224static inline struct irq_desc *move_irq_desc(struct irq_desc *desc, int node) 225{ 226 return desc; 227} 228#endif 229 230extern struct irq_desc *irq_to_desc_alloc_node(unsigned int irq, int node); 231 232/* 233 * Pick up the arch-dependent methods: 234 */ 235#include <asm/hw_irq.h> 236 237extern int setup_irq(unsigned int irq, struct irqaction *new); 238extern void remove_irq(unsigned int irq, struct irqaction *act); 239 240#ifdef CONFIG_GENERIC_HARDIRQS 241 242#ifdef CONFIG_SMP 243 244#ifdef CONFIG_GENERIC_PENDING_IRQ 245 246void move_native_irq(int irq); 247void move_masked_irq(int irq); 248 249#else /* CONFIG_GENERIC_PENDING_IRQ */ 250 251static inline void move_irq(int irq) 252{ 253} 254 255static inline void move_native_irq(int irq) 256{ 257} 258 259static inline void move_masked_irq(int irq) 260{ 261} 262 263#endif /* CONFIG_GENERIC_PENDING_IRQ */ 264 265#else /* CONFIG_SMP */ 266 267#define move_native_irq(x) 268#define move_masked_irq(x) 269 270#endif /* CONFIG_SMP */ 271 272extern int no_irq_affinity; 273 274static inline int irq_balancing_disabled(unsigned int irq) 275{ 276 struct irq_desc *desc; 277 278 desc = irq_to_desc(irq); 279 return desc->status & IRQ_NO_BALANCING_MASK; 280} 281 282/* Handle irq action chains: */ 283extern irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action); 284 285/* 286 * Built-in IRQ handlers for various IRQ types, 287 * callable via desc->handle_irq() 288 */ 289extern void handle_level_irq(unsigned int irq, struct irq_desc *desc); 290extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc); 291extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc); 292extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc); 293extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc); 294extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc); 295extern void handle_nested_irq(unsigned int irq); 296 297/* 298 * Monolithic do_IRQ implementation. 299 */ 300#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 301extern unsigned int __do_IRQ(unsigned int irq); 302#endif 303 304/* 305 * Architectures call this to let the generic IRQ layer 306 * handle an interrupt. If the descriptor is attached to an 307 * irqchip-style controller then we call the ->handle_irq() handler, 308 * and it calls __do_IRQ() if it's attached to an irqtype-style controller. 309 */ 310static inline void generic_handle_irq_desc(unsigned int irq, struct irq_desc *desc) 311{ 312#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ 313 desc->handle_irq(irq, desc); 314#else 315 if (likely(desc->handle_irq)) 316 desc->handle_irq(irq, desc); 317 else 318 __do_IRQ(irq); 319#endif 320} 321 322static inline void generic_handle_irq(unsigned int irq) 323{ 324 generic_handle_irq_desc(irq, irq_to_desc(irq)); 325} 326 327/* Handling of unhandled and spurious interrupts: */ 328extern void note_interrupt(unsigned int irq, struct irq_desc *desc, 329 irqreturn_t action_ret); 330 331/* Resending of interrupts :*/ 332void check_irq_resend(struct irq_desc *desc, unsigned int irq); 333 334/* Enable/disable irq debugging output: */ 335extern int noirqdebug_setup(char *str); 336 337/* Checks whether the interrupt can be requested by request_irq(): */ 338extern int can_request_irq(unsigned int irq, unsigned long irqflags); 339 340/* Dummy irq-chip implementations: */ 341extern struct irq_chip no_irq_chip; 342extern struct irq_chip dummy_irq_chip; 343 344extern void 345set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, 346 irq_flow_handler_t handle); 347extern void 348set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, 349 irq_flow_handler_t handle, const char *name); 350 351extern void 352__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, 353 const char *name); 354 355/* caller has locked the irq_desc and both params are valid */ 356static inline void __set_irq_handler_unlocked(int irq, 357 irq_flow_handler_t handler) 358{ 359 struct irq_desc *desc; 360 361 desc = irq_to_desc(irq); 362 desc->handle_irq = handler; 363} 364 365/* 366 * Set a highlevel flow handler for a given IRQ: 367 */ 368static inline void 369set_irq_handler(unsigned int irq, irq_flow_handler_t handle) 370{ 371 __set_irq_handler(irq, handle, 0, NULL); 372} 373 374/* 375 * Set a highlevel chained flow handler for a given IRQ. 376 * (a chained handler is automatically enabled and set to 377 * IRQ_NOREQUEST and IRQ_NOPROBE) 378 */ 379static inline void 380set_irq_chained_handler(unsigned int irq, 381 irq_flow_handler_t handle) 382{ 383 __set_irq_handler(irq, handle, 1, NULL); 384} 385 386extern void set_irq_nested_thread(unsigned int irq, int nest); 387 388extern void set_irq_noprobe(unsigned int irq); 389extern void set_irq_probe(unsigned int irq); 390 391/* Handle dynamic irq creation and destruction */ 392extern unsigned int create_irq_nr(unsigned int irq_want, int node); 393extern int create_irq(void); 394extern void destroy_irq(unsigned int irq); 395 396/* Test to see if a driver has successfully requested an irq */ 397static inline int irq_has_action(unsigned int irq) 398{ 399 struct irq_desc *desc = irq_to_desc(irq); 400 return desc->action != NULL; 401} 402 403/* Dynamic irq helper functions */ 404extern void dynamic_irq_init(unsigned int irq); 405void dynamic_irq_init_keep_chip_data(unsigned int irq); 406extern void dynamic_irq_cleanup(unsigned int irq); 407void dynamic_irq_cleanup_keep_chip_data(unsigned int irq); 408 409/* Set/get chip/data for an IRQ: */ 410extern int set_irq_chip(unsigned int irq, struct irq_chip *chip); 411extern int set_irq_data(unsigned int irq, void *data); 412extern int set_irq_chip_data(unsigned int irq, void *data); 413extern int set_irq_type(unsigned int irq, unsigned int type); 414extern int set_irq_msi(unsigned int irq, struct msi_desc *entry); 415 416#define get_irq_chip(irq) (irq_to_desc(irq)->chip) 417#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data) 418#define get_irq_data(irq) (irq_to_desc(irq)->handler_data) 419#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc) 420 421#define get_irq_desc_chip(desc) ((desc)->chip) 422#define get_irq_desc_chip_data(desc) ((desc)->chip_data) 423#define get_irq_desc_data(desc) ((desc)->handler_data) 424#define get_irq_desc_msi(desc) ((desc)->msi_desc) 425 426#endif /* CONFIG_GENERIC_HARDIRQS */ 427 428#endif /* !CONFIG_S390 */ 429 430#ifdef CONFIG_SMP 431/** 432 * alloc_desc_masks - allocate cpumasks for irq_desc 433 * @desc: pointer to irq_desc struct 434 * @node: node which will be handling the cpumasks 435 * @boot: true if need bootmem 436 * 437 * Allocates affinity and pending_mask cpumask if required. 438 * Returns true if successful (or not required). 439 */ 440static inline bool alloc_desc_masks(struct irq_desc *desc, int node, 441 bool boot) 442{ 443#ifdef CONFIG_CPUMASK_OFFSTACK 444 gfp_t gfp = GFP_ATOMIC; 445 446 if (boot) 447 gfp = GFP_NOWAIT; 448 449 if (!alloc_cpumask_var_node(&desc->affinity, gfp, node)) 450 return false; 451 452#ifdef CONFIG_GENERIC_PENDING_IRQ 453 if (!alloc_cpumask_var_node(&desc->pending_mask, gfp, node)) { 454 free_cpumask_var(desc->affinity); 455 return false; 456 } 457#endif 458#endif 459 return true; 460} 461 462static inline void init_desc_masks(struct irq_desc *desc) 463{ 464 cpumask_setall(desc->affinity); 465#ifdef CONFIG_GENERIC_PENDING_IRQ 466 cpumask_clear(desc->pending_mask); 467#endif 468} 469 470/** 471 * init_copy_desc_masks - copy cpumasks for irq_desc 472 * @old_desc: pointer to old irq_desc struct 473 * @new_desc: pointer to new irq_desc struct 474 * 475 * Insures affinity and pending_masks are copied to new irq_desc. 476 * If !CONFIG_CPUMASKS_OFFSTACK the cpumasks are embedded in the 477 * irq_desc struct so the copy is redundant. 478 */ 479 480static inline void init_copy_desc_masks(struct irq_desc *old_desc, 481 struct irq_desc *new_desc) 482{ 483#ifdef CONFIG_CPUMASK_OFFSTACK 484 cpumask_copy(new_desc->affinity, old_desc->affinity); 485 486#ifdef CONFIG_GENERIC_PENDING_IRQ 487 cpumask_copy(new_desc->pending_mask, old_desc->pending_mask); 488#endif 489#endif 490} 491 492static inline void free_desc_masks(struct irq_desc *old_desc, 493 struct irq_desc *new_desc) 494{ 495 free_cpumask_var(old_desc->affinity); 496 497#ifdef CONFIG_GENERIC_PENDING_IRQ 498 free_cpumask_var(old_desc->pending_mask); 499#endif 500} 501 502#else /* !CONFIG_SMP */ 503 504static inline bool alloc_desc_masks(struct irq_desc *desc, int node, 505 bool boot) 506{ 507 return true; 508} 509 510static inline void init_desc_masks(struct irq_desc *desc) 511{ 512} 513 514static inline void init_copy_desc_masks(struct irq_desc *old_desc, 515 struct irq_desc *new_desc) 516{ 517} 518 519static inline void free_desc_masks(struct irq_desc *old_desc, 520 struct irq_desc *new_desc) 521{ 522} 523#endif /* CONFIG_SMP */ 524 525#endif /* _LINUX_IRQ_H */ 526