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1/*
2 * Definitions for MCT (Magic Control Technology) USB-RS232 Converter Driver
3 *
4 *   Copyright (C) 2000 Wolfgang Grandegger (wolfgang@ces.ch)
5 *
6 *   This program is free software; you can redistribute it and/or modify
7 *   it under the terms of the GNU General Public License as published by
8 *   the Free Software Foundation; either version 2 of the License, or
9 *   (at your option) any later version.
10 *
11 * This driver is for the device MCT USB-RS232 Converter (25 pin, Model No.
12 * U232-P25) from Magic Control Technology Corp. (there is also a 9 pin
13 * Model No. U232-P9). See http://www.mct.com.tw/p_u232.html for further
14 * information. The properties of this device are listed at the end of this
15 * file. This device is available from various distributors. I know Hana,
16 * http://www.hana.de and D-Link, http://www.dlink.com/products/usb/dsbs25.
17 *
18 * All of the information about the device was acquired by using SniffUSB
19 * on Windows98. The technical details of the reverse engineering are
20 * summarized at the end of this file.
21 */
22
23#ifndef __LINUX_USB_SERIAL_MCT_U232_H
24#define __LINUX_USB_SERIAL_MCT_U232_H
25
26#define MCT_U232_VID	                0x0711	/* Vendor Id */
27#define MCT_U232_PID	                0x0210	/* Original MCT Product Id */
28
29/* U232-P25, Sitecom */
30#define MCT_U232_SITECOM_PID		0x0230	/* Sitecom Product Id */
31
32/* DU-H3SP USB BAY hub */
33#define MCT_U232_DU_H3SP_PID		0x0200	/* D-Link DU-H3SP USB BAY */
34
35/* Belkin badge the MCT U232-P9 as the F5U109 */
36#define MCT_U232_BELKIN_F5U109_VID	0x050d	/* Vendor Id */
37#define MCT_U232_BELKIN_F5U109_PID	0x0109	/* Product Id */
38
39/*
40 * Vendor Request Interface
41 */
42#define MCT_U232_SET_REQUEST_TYPE	0x40
43#define MCT_U232_GET_REQUEST_TYPE	0xc0
44
45/* Get Modem Status Register (MSR) */
46#define MCT_U232_GET_MODEM_STAT_REQUEST	2
47#define MCT_U232_GET_MODEM_STAT_SIZE	1
48
49/* Get Line Control Register (LCR) */
50/* ... not used by this driver */
51#define MCT_U232_GET_LINE_CTRL_REQUEST	6
52#define MCT_U232_GET_LINE_CTRL_SIZE	1
53
54/* Set Baud Rate Divisor */
55#define MCT_U232_SET_BAUD_RATE_REQUEST	5
56#define MCT_U232_SET_BAUD_RATE_SIZE	4
57
58/* Set Line Control Register (LCR) */
59#define MCT_U232_SET_LINE_CTRL_REQUEST	7
60#define MCT_U232_SET_LINE_CTRL_SIZE	1
61
62/* Set Modem Control Register (MCR) */
63#define MCT_U232_SET_MODEM_CTRL_REQUEST	10
64#define MCT_U232_SET_MODEM_CTRL_SIZE	1
65
66/*
67 * This USB device request code is not well understood.  It is transmitted by
68 * the MCT-supplied Windows driver whenever the baud rate changes.
69 */
70#define MCT_U232_SET_UNKNOWN1_REQUEST	11  /* Unknown functionality */
71#define MCT_U232_SET_UNKNOWN1_SIZE	1
72
73/*
74 * This USB device request code appears to control whether CTS is required
75 * during transmission.
76 *
77 * Sending a zero byte allows data transmission to a device which is not
78 * asserting CTS.  Sending a '1' byte will cause transmission to be deferred
79 * until the device asserts CTS.
80 */
81#define MCT_U232_SET_CTS_REQUEST	12
82#define MCT_U232_SET_CTS_SIZE		1
83
84#define MCT_U232_MAX_SIZE		4	/* of MCT_XXX_SIZE */
85
86/*
87 * Baud rate (divisor)
88 * Actually, there are two of them, MCT website calls them "Philips solution"
89 * and "Intel solution". They are the regular MCT and "Sitecom" for us.
90 * This is pointless to document in the header, see the code for the bits.
91 */
92static int mct_u232_calculate_baud_rate(struct usb_serial *serial,
93					speed_t value, speed_t *result);
94
95/*
96 * Line Control Register (LCR)
97 */
98#define MCT_U232_SET_BREAK              0x40
99
100#define MCT_U232_PARITY_SPACE		0x38
101#define MCT_U232_PARITY_MARK		0x28
102#define MCT_U232_PARITY_EVEN		0x18
103#define MCT_U232_PARITY_ODD		0x08
104#define MCT_U232_PARITY_NONE		0x00
105
106#define MCT_U232_DATA_BITS_5            0x00
107#define MCT_U232_DATA_BITS_6            0x01
108#define MCT_U232_DATA_BITS_7            0x02
109#define MCT_U232_DATA_BITS_8            0x03
110
111#define MCT_U232_STOP_BITS_2            0x04
112#define MCT_U232_STOP_BITS_1            0x00
113
114/*
115 * Modem Control Register (MCR)
116 */
117#define MCT_U232_MCR_NONE               0x8     /* Deactivate DTR and RTS */
118#define MCT_U232_MCR_RTS                0xa     /* Activate RTS */
119#define MCT_U232_MCR_DTR                0x9     /* Activate DTR */
120
121/*
122 * Modem Status Register (MSR)
123 */
124#define MCT_U232_MSR_INDEX              0x0     /* data[index] */
125#define MCT_U232_MSR_CD                 0x80    /* Current CD */
126#define MCT_U232_MSR_RI                 0x40    /* Current RI */
127#define MCT_U232_MSR_DSR                0x20    /* Current DSR */
128#define MCT_U232_MSR_CTS                0x10    /* Current CTS */
129#define MCT_U232_MSR_DCD                0x08    /* Delta CD */
130#define MCT_U232_MSR_DRI                0x04    /* Delta RI */
131#define MCT_U232_MSR_DDSR               0x02    /* Delta DSR */
132#define MCT_U232_MSR_DCTS               0x01    /* Delta CTS */
133
134/*
135 * Line Status Register (LSR)
136 */
137#define MCT_U232_LSR_INDEX	1	/* data[index] */
138#define MCT_U232_LSR_ERR	0x80	/* OE | PE | FE | BI */
139#define MCT_U232_LSR_TEMT	0x40	/* transmit register empty */
140#define MCT_U232_LSR_THRE	0x20	/* transmit holding register empty */
141#define MCT_U232_LSR_BI		0x10	/* break indicator */
142#define MCT_U232_LSR_FE		0x08	/* framing error */
143#define MCT_U232_LSR_OE		0x02	/* overrun error */
144#define MCT_U232_LSR_PE		0x04	/* parity error */
145#define MCT_U232_LSR_OE		0x02	/* overrun error */
146#define MCT_U232_LSR_DR		0x01	/* receive data ready */
147
148
149/* -----------------------------------------------------------------------------
150 * Technical Specification reverse engineered with SniffUSB on Windows98
151 * =====================================================================
152 *
153 *  The technical details of the device have been acquired be using "SniffUSB"
154 *  and the vendor-supplied device driver (version 2.3A) under Windows98. To
155 *  identify the USB vendor-specific requests and to assign them to terminal
156 *  settings (flow control, baud rate, etc.) the program "SerialSettings" from
157 *  William G. Greathouse has been proven to be very useful. I also used the
158 *  Win98 "HyperTerminal" and "usb-robot" on Linux for testing. The results and
159 *  observations are summarized below:
160 *
161 *  The USB requests seem to be directly mapped to the registers of a 8250,
162 *  16450 or 16550 UART. The FreeBSD handbook (appendix F.4 "Input/Output
163 *  devices") contains a comprehensive description of UARTs and its registers.
164 *  The bit descriptions are actually taken from there.
165 *
166 *
167 * Baud rate (divisor)
168 * -------------------
169 *
170 *   BmRequestType:  0x40 (0100 0000B)
171 *   bRequest:       0x05
172 *   wValue:         0x0000
173 *   wIndex:         0x0000
174 *   wLength:        0x0004
175 *   Data:           divisor = 115200 / baud_rate
176 *
177 *   SniffUSB observations (Nov 2003): Contrary to the 'wLength' value of 4
178 *   shown above, observations with a Belkin F5U109 adapter, using the
179 *   MCT-supplied Windows98 driver (U2SPORT.VXD, "File version: 1.21P.0104 for
180 *   Win98/Me"), show this request has a length of 1 byte, presumably because
181 *   of the fact that the Belkin adapter and the 'Sitecom U232-P25' adapter
182 *   use a baud-rate code instead of a conventional RS-232 baud rate divisor.
183 *   The current source code for this driver does not reflect this fact, but
184 *   the driver works fine with this adapter/driver combination nonetheless.
185 *
186 *
187 * Line Control Register (LCR)
188 * ---------------------------
189 *
190 *  BmRequestType:  0x40 (0100 0000B)    0xc0 (1100 0000B)
191 *  bRequest:       0x07                 0x06
192 *  wValue:         0x0000
193 *  wIndex:         0x0000
194 *  wLength:        0x0001
195 *  Data:           LCR (see below)
196 *
197 *  Bit 7: Divisor Latch Access Bit (DLAB). When set, access to the data
198 *	   transmit/receive register (THR/RBR) and the Interrupt Enable Register
199 *	   (IER) is disabled. Any access to these ports is now redirected to the
200 *	   Divisor Latch Registers. Setting this bit, loading the Divisor
201 *	   Registers, and clearing DLAB should be done with interrupts disabled.
202 *  Bit 6: Set Break. When set to "1", the transmitter begins to transmit
203 *	   continuous Spacing until this bit is set to "0". This overrides any
204 *	   bits of characters that are being transmitted.
205 *  Bit 5: Stick Parity. When parity is enabled, setting this bit causes parity
206 *	   to always be "1" or "0", based on the value of Bit 4.
207 *  Bit 4: Even Parity Select (EPS). When parity is enabled and Bit 5 is "0",
208 *	   setting this bit causes even parity to be transmitted and expected.
209 *	   Otherwise, odd parity is used.
210 *  Bit 3: Parity Enable (PEN). When set to "1", a parity bit is inserted
211 *	   between the last bit of the data and the Stop Bit. The UART will also
212 *	   expect parity to be present in the received data.
213 *  Bit 2: Number of Stop Bits (STB). If set to "1" and using 5-bit data words,
214 *	   1.5 Stop Bits are transmitted and expected in each data word. For
215 *	   6, 7 and 8-bit data words, 2 Stop Bits are transmitted and expected.
216 *	   When this bit is set to "0", one Stop Bit is used on each data word.
217 *  Bit 1: Word Length Select Bit #1 (WLSB1)
218 *  Bit 0: Word Length Select Bit #0 (WLSB0)
219 *	   Together these bits specify the number of bits in each data word.
220 *	     1 0  Word Length
221 *	     0 0  5 Data Bits
222 *	     0 1  6 Data Bits
223 *	     1 0  7 Data Bits
224 *	     1 1  8 Data Bits
225 *
226 *  SniffUSB observations: Bit 7 seems not to be used. There seem to be two bugs
227 *  in the Win98 driver: the break does not work (bit 6 is not asserted) and the
228 *  stick parity bit is not cleared when set once. The LCR can also be read
229 *  back with USB request 6 but this has never been observed with SniffUSB.
230 *
231 *
232 * Modem Control Register (MCR)
233 * ----------------------------
234 *
235 *  BmRequestType:  0x40  (0100 0000B)
236 *  bRequest:       0x0a
237 *  wValue:         0x0000
238 *  wIndex:         0x0000
239 *  wLength:        0x0001
240 *  Data:           MCR (Bit 4..7, see below)
241 *
242 *  Bit 7: Reserved, always 0.
243 *  Bit 6: Reserved, always 0.
244 *  Bit 5: Reserved, always 0.
245 *  Bit 4: Loop-Back Enable. When set to "1", the UART transmitter and receiver
246 *	   are internally connected together to allow diagnostic operations. In
247 *	   addition, the UART modem control outputs are connected to the UART
248 *	   modem control inputs. CTS is connected to RTS, DTR is connected to
249 *	   DSR, OUT1 is connected to RI, and OUT 2 is connected to DCD.
250 *  Bit 3: OUT 2. An auxiliary output that the host processor may set high or
251 *	   low. In the IBM PC serial adapter (and most clones), OUT 2 is used
252 *	   to tri-state (disable) the interrupt signal from the
253 *	   8250/16450/16550 UART.
254 *  Bit 2: OUT 1. An auxiliary output that the host processor may set high or
255 *	   low. This output is not used on the IBM PC serial adapter.
256 *  Bit 1: Request to Send (RTS). When set to "1", the output of the UART -RTS
257 *	   line is Low (Active).
258 *  Bit 0: Data Terminal Ready (DTR). When set to "1", the output of the UART
259 *	   -DTR line is Low (Active).
260 *
261 *  SniffUSB observations: Bit 2 and 4 seem not to be used but bit 3 has been
262 *  seen _always_ set.
263 *
264 *
265 * Modem Status Register (MSR)
266 * ---------------------------
267 *
268 *  BmRequestType:  0xc0  (1100 0000B)
269 *  bRequest:       0x02
270 *  wValue:         0x0000
271 *  wIndex:         0x0000
272 *  wLength:        0x0001
273 *  Data:           MSR (see below)
274 *
275 *  Bit 7: Data Carrier Detect (CD). Reflects the state of the DCD line on the
276 *	   UART.
277 *  Bit 6: Ring Indicator (RI). Reflects the state of the RI line on the UART.
278 *  Bit 5: Data Set Ready (DSR). Reflects the state of the DSR line on the UART.
279 *  Bit 4: Clear To Send (CTS). Reflects the state of the CTS line on the UART.
280 *  Bit 3: Delta Data Carrier Detect (DDCD). Set to "1" if the -DCD line has
281 *	   changed state one more more times since the last time the MSR was
282 *	   read by the host.
283 *  Bit 2: Trailing Edge Ring Indicator (TERI). Set to "1" if the -RI line has
284 *	   had a low to high transition since the last time the MSR was read by
285 *	   the host.
286 *  Bit 1: Delta Data Set Ready (DDSR). Set to "1" if the -DSR line has changed
287 *	   state one more more times since the last time the MSR was read by the
288 *	   host.
289 *  Bit 0: Delta Clear To Send (DCTS). Set to "1" if the -CTS line has changed
290 *	   state one more times since the last time the MSR was read by the
291 *	   host.
292 *
293 *  SniffUSB observations: the MSR is also returned as first byte on the
294 *  interrupt-in endpoint 0x83 to signal changes of modem status lines. The USB
295 *  request to read MSR cannot be applied during normal device operation.
296 *
297 *
298 * Line Status Register (LSR)
299 * --------------------------
300 *
301 *  Bit 7   Error in Receiver FIFO. On the 8250/16450 UART, this bit is zero.
302 *	    This bit is set to "1" when any of the bytes in the FIFO have one
303 *	    or more of the following error conditions: PE, FE, or BI.
304 *  Bit 6   Transmitter Empty (TEMT). When set to "1", there are no words
305 *	    remaining in the transmit FIFO or the transmit shift register. The
306 *	    transmitter is completely idle.
307 *  Bit 5   Transmitter Holding Register Empty (THRE). When set to "1", the
308 *	    FIFO (or holding register) now has room for at least one additional
309 *	    word to transmit. The transmitter may still be transmitting when
310 *	    this bit is set to "1".
311 *  Bit 4   Break Interrupt (BI). The receiver has detected a Break signal.
312 *  Bit 3   Framing Error (FE). A Start Bit was detected but the Stop Bit did
313 *	    not appear at the expected time. The received word is probably
314 *	    garbled.
315 *  Bit 2   Parity Error (PE). The parity bit was incorrect for the word
316 *	    received.
317 *  Bit 1   Overrun Error (OE). A new word was received and there was no room
318 *	    in the receive buffer. The newly-arrived word in the shift register
319 *	    is discarded. On 8250/16450 UARTs, the word in the holding register
320 *	    is discarded and the newly- arrived word is put in the holding
321 *	    register.
322 *  Bit 0   Data Ready (DR). One or more words are in the receive FIFO that the
323 *	    host may read. A word must be completely received and moved from
324 *	    the shift register into the FIFO (or holding register for
325 *	    8250/16450 designs) before this bit is set.
326 *
327 *  SniffUSB observations: the LSR is returned as second byte on the
328 *  interrupt-in endpoint 0x83 to signal error conditions. Such errors have
329 *  been seen with minicom/zmodem transfers (CRC errors).
330 *
331 *
332 * Unknown #1
333 * -------------------
334 *
335 *   BmRequestType:  0x40 (0100 0000B)
336 *   bRequest:       0x0b
337 *   wValue:         0x0000
338 *   wIndex:         0x0000
339 *   wLength:        0x0001
340 *   Data:           0x00
341 *
342 *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
343 *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
344 *   occurs immediately after a "Baud rate (divisor)" message.  It was not
345 *   observed at any other time.  It is unclear what purpose this message
346 *   serves.
347 *
348 *
349 * Unknown #2
350 * -------------------
351 *
352 *   BmRequestType:  0x40 (0100 0000B)
353 *   bRequest:       0x0c
354 *   wValue:         0x0000
355 *   wIndex:         0x0000
356 *   wLength:        0x0001
357 *   Data:           0x00
358 *
359 *   SniffUSB observations (Nov 2003): With the MCT-supplied Windows98 driver
360 *   (U2SPORT.VXD, "File version: 1.21P.0104 for Win98/Me"), this request
361 *   occurs immediately after the 'Unknown #1' message (see above).  It was
362 *   not observed at any other time.  It is unclear what other purpose (if
363 *   any) this message might serve, but without it, the USB/RS-232 adapter
364 *   will not write to RS-232 devices which do not assert the 'CTS' signal.
365 *
366 *
367 * Flow control
368 * ------------
369 *
370 *  SniffUSB observations: no flow control specific requests have been realized
371 *  apart from DTR/RTS settings. Both signals are dropped for no flow control
372 *  but asserted for hardware or software flow control.
373 *
374 *
375 * Endpoint usage
376 * --------------
377 *
378 *  SniffUSB observations: the bulk-out endpoint 0x1 and interrupt-in endpoint
379 *  0x81 is used to transmit and receive characters. The second interrupt-in
380 *  endpoint 0x83 signals exceptional conditions like modem line changes and
381 *  errors. The first byte returned is the MSR and the second byte the LSR.
382 *
383 *
384 * Other observations
385 * ------------------
386 *
387 *  Queued bulk transfers like used in visor.c did not work.
388 *
389 *
390 * Properties of the USB device used (as found in /var/log/messages)
391 * -----------------------------------------------------------------
392 *
393 *  Manufacturer: MCT Corporation.
394 *  Product: USB-232 Interfact Controller
395 *  SerialNumber: U2S22050
396 *
397 *    Length              = 18
398 *    DescriptorType      = 01
399 *    USB version         = 1.00
400 *    Vendor:Product      = 0711:0210
401 *    MaxPacketSize0      = 8
402 *    NumConfigurations   = 1
403 *    Device version      = 1.02
404 *    Device Class:SubClass:Protocol = 00:00:00
405 *      Per-interface classes
406 *  Configuration:
407 *    bLength             =    9
408 *    bDescriptorType     =   02
409 *    wTotalLength        = 0027
410 *    bNumInterfaces      =   01
411 *    bConfigurationValue =   01
412 *    iConfiguration      =   00
413 *    bmAttributes        =   c0
414 *    MaxPower            =  100mA
415 *
416 *    Interface: 0
417 *    Alternate Setting:  0
418 *      bLength             =    9
419 *      bDescriptorType     =   04
420 *      bInterfaceNumber    =   00
421 *      bAlternateSetting   =   00
422 *      bNumEndpoints       =   03
423 *      bInterface Class:SubClass:Protocol =   00:00:00
424 *      iInterface          =   00
425 *      Endpoint:
426 *	  bLength             =    7
427 *	  bDescriptorType     =   05
428 *	  bEndpointAddress    =   81 (in)
429 *	  bmAttributes        =   03 (Interrupt)
430 *	  wMaxPacketSize      = 0040
431 *	  bInterval           =   02
432 *      Endpoint:
433 *	  bLength             =    7
434 *	  bDescriptorType     =   05
435 *	  bEndpointAddress    =   01 (out)
436 *	  bmAttributes        =   02 (Bulk)
437 *	  wMaxPacketSize      = 0040
438 *	  bInterval           =   00
439 *      Endpoint:
440 *	  bLength             =    7
441 *	  bDescriptorType     =   05
442 *	  bEndpointAddress    =   83 (in)
443 *	  bmAttributes        =   03 (Interrupt)
444 *	  wMaxPacketSize      = 0002
445 *	  bInterval           =   02
446 *
447 *
448 * Hardware details (added by Martin Hamilton, 2001/12/06)
449 * -----------------------------------------------------------------
450 *
451 * This info was gleaned from opening a Belkin F5U109 DB9 USB serial
452 * adaptor, which turns out to simply be a re-badged U232-P9.  We
453 * know this because there is a sticky label on the circuit board
454 * which says "U232-P9" ;-)
455 *
456 * The circuit board inside the adaptor contains a Philips PDIUSBD12
457 * USB endpoint chip and a Philips P87C52UBAA microcontroller with
458 * embedded UART.  Exhaustive documentation for these is available at:
459 *
460 *   http://www.semiconductors.philips.com/pip/p87c52ubaa
461 *   http://www.semiconductors.philips.com/pip/pdiusbd12
462 *
463 * Thanks to Julian Highfield for the pointer to the Philips database.
464 *
465 */
466
467#endif /* __LINUX_USB_SERIAL_MCT_U232_H */
468