1/* 2 * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com 3 * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net> 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 */ 19 20#ifndef __SOLO6010_H 21#define __SOLO6010_H 22 23#include <linux/version.h> 24#include <linux/pci.h> 25#include <linux/i2c.h> 26#include <linux/semaphore.h> 27#include <linux/mutex.h> 28#include <linux/list.h> 29#include <linux/delay.h> 30#include <linux/wait.h> 31#include <asm/io.h> 32#include <asm/atomic.h> 33 34#include <linux/videodev2.h> 35#include <media/v4l2-dev.h> 36#include <media/videobuf-core.h> 37 38#include "solo6010-registers.h" 39 40#ifndef PCI_VENDOR_ID_SOFTLOGIC 41#define PCI_VENDOR_ID_SOFTLOGIC 0x9413 42#define PCI_DEVICE_ID_SOLO6010 0x6010 43#endif 44 45#ifndef PCI_VENDOR_ID_BLUECHERRY 46#define PCI_VENDOR_ID_BLUECHERRY 0x1BB3 47/* Neugent Softlogic 6010 based cards */ 48#define PCI_DEVICE_ID_NEUSOLO_4 0x4304 49#define PCI_DEVICE_ID_NEUSOLO_9 0x4309 50#define PCI_DEVICE_ID_NEUSOLO_16 0x4310 51/* Commell Softlogic 6010 based cards */ 52#define PCI_DEVICE_ID_COMMSOLO_4 0x4E04 53#define PCI_DEVICE_ID_COMMSOLO_9 0x4E09 54#define PCI_DEVICE_ID_COMMSOLO_16 0x4E10 55#endif /* Bluecherry */ 56 57#define SOLO6010_NAME "solo6010" 58 59#define SOLO_MAX_CHANNELS 16 60 61/* Make sure these two match */ 62#define SOLO6010_VERSION "2.0.0" 63#define SOLO6010_VER_MAJOR 2 64#define SOLO6010_VER_MINOR 0 65#define SOLO6010_VER_SUB 0 66#define SOLO6010_VER_NUM \ 67 KERNEL_VERSION(SOLO6010_VER_MAJOR, SOLO6010_VER_MINOR, SOLO6010_VER_SUB) 68 69/* 70 * The SOLO6010 actually has 8 i2c channels, but we only use 2. 71 * 0 - Techwell chip(s) 72 * 1 - SAA7128 73 */ 74#define SOLO_I2C_ADAPTERS 2 75#define SOLO_I2C_TW 0 76#define SOLO_I2C_SAA 1 77 78/* DMA Engine setup */ 79#define SOLO_NR_P2M 4 80#define SOLO_NR_P2M_DESC 256 81#define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16) 82/* MPEG and JPEG share the same interrupt and locks so they must be together 83 * in the same dma channel. */ 84#define SOLO_P2M_DMA_ID_MP4E 0 85#define SOLO_P2M_DMA_ID_JPEG 0 86#define SOLO_P2M_DMA_ID_MP4D 1 87#define SOLO_P2M_DMA_ID_G723D 1 88#define SOLO_P2M_DMA_ID_DISP 2 89#define SOLO_P2M_DMA_ID_OSG 2 90#define SOLO_P2M_DMA_ID_G723E 3 91#define SOLO_P2M_DMA_ID_VIN 3 92 93/* Encoder standard modes */ 94#define SOLO_ENC_MODE_CIF 2 95#define SOLO_ENC_MODE_HD1 1 96#define SOLO_ENC_MODE_D1 9 97 98#define SOLO_DEFAULT_GOP 30 99#define SOLO_DEFAULT_QP 3 100 101/* There is 8MB memory available for solo to buffer MPEG4 frames. 102 * This gives us 512 * 16kbyte queues. */ 103#define SOLO_NR_RING_BUFS 512 104 105#define SOLO_CLOCK_MHZ 108 106 107#ifndef V4L2_BUF_FLAG_MOTION_ON 108#define V4L2_BUF_FLAG_MOTION_ON 0x0400 109#define V4L2_BUF_FLAG_MOTION_DETECTED 0x0800 110#endif 111#ifndef V4L2_CID_MOTION_ENABLE 112#define PRIVATE_CIDS 113#define V4L2_CID_MOTION_ENABLE (V4L2_CID_PRIVATE_BASE+0) 114#define V4L2_CID_MOTION_THRESHOLD (V4L2_CID_PRIVATE_BASE+1) 115#define V4L2_CID_MOTION_TRACE (V4L2_CID_PRIVATE_BASE+2) 116#endif 117 118enum SOLO_I2C_STATE { 119 IIC_STATE_IDLE, 120 IIC_STATE_START, 121 IIC_STATE_READ, 122 IIC_STATE_WRITE, 123 IIC_STATE_STOP 124}; 125 126struct solo_p2m_dev { 127 struct semaphore sem; 128 struct completion completion; 129 int error; 130 u8 desc[SOLO_P2M_DESC_SIZE]; 131}; 132 133#define OSD_TEXT_MAX 30 134 135enum solo_enc_types { 136 SOLO_ENC_TYPE_STD, 137 SOLO_ENC_TYPE_EXT, 138}; 139 140struct solo_enc_dev { 141 struct solo6010_dev *solo_dev; 142 /* V4L2 Items */ 143 struct video_device *vfd; 144 /* General accounting */ 145 wait_queue_head_t thread_wait; 146 spinlock_t lock; 147 atomic_t readers; 148 u8 ch; 149 u8 mode, gop, qp, interlaced, interval; 150 u8 reset_gop; 151 u8 bw_weight; 152 u8 motion_detected; 153 u16 motion_thresh; 154 u16 width; 155 u16 height; 156 char osd_text[OSD_TEXT_MAX + 1]; 157}; 158 159struct solo_enc_buf { 160 u8 vop; 161 u8 ch; 162 enum solo_enc_types type; 163 u32 off; 164 u32 size; 165 u32 jpeg_off; 166 u32 jpeg_size; 167 struct timeval ts; 168}; 169 170/* The SOLO6010 PCI Device */ 171struct solo6010_dev { 172 /* General stuff */ 173 struct pci_dev *pdev; 174 u8 __iomem *reg_base; 175 int nr_chans; 176 int nr_ext; 177 u32 irq_mask; 178 u32 motion_mask; 179 spinlock_t reg_io_lock; 180 181 /* tw28xx accounting */ 182 u8 tw2865, tw2864, tw2815; 183 u8 tw28_cnt; 184 185 /* i2c related items */ 186 struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS]; 187 enum SOLO_I2C_STATE i2c_state; 188 struct semaphore i2c_sem; 189 int i2c_id; 190 wait_queue_head_t i2c_wait; 191 struct i2c_msg *i2c_msg; 192 unsigned int i2c_msg_num; 193 unsigned int i2c_msg_ptr; 194 195 /* P2M DMA Engine */ 196 struct solo_p2m_dev p2m_dev[SOLO_NR_P2M]; 197 198 /* V4L2 Display items */ 199 struct video_device *vfd; 200 unsigned int erasing; 201 unsigned int frame_blank; 202 u8 cur_disp_ch; 203 wait_queue_head_t disp_thread_wait; 204 205 /* V4L2 Encoder items */ 206 struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS]; 207 u16 enc_bw_remain; 208 /* IDX into hw mp4 encoder */ 209 u8 enc_idx; 210 /* Our software ring of enc buf references */ 211 u16 enc_wr_idx; 212 struct solo_enc_buf enc_buf[SOLO_NR_RING_BUFS]; 213 214 /* Current video settings */ 215 u32 video_type; 216 u16 video_hsize, video_vsize; 217 u16 vout_hstart, vout_vstart; 218 u16 vin_hstart, vin_vstart; 219 u8 fps; 220 221 /* Audio components */ 222 struct snd_card *snd_card; 223 struct snd_pcm *snd_pcm; 224 atomic_t snd_users; 225 int g723_hw_idx; 226}; 227 228static inline u32 solo_reg_read(struct solo6010_dev *solo_dev, int reg) 229{ 230 unsigned long flags; 231 u32 ret; 232 u16 val; 233 234 spin_lock_irqsave(&solo_dev->reg_io_lock, flags); 235 236 ret = readl(solo_dev->reg_base + reg); 237 rmb(); 238 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val); 239 rmb(); 240 241 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags); 242 243 return ret; 244} 245 246static inline void solo_reg_write(struct solo6010_dev *solo_dev, int reg, 247 u32 data) 248{ 249 unsigned long flags; 250 u16 val; 251 252 spin_lock_irqsave(&solo_dev->reg_io_lock, flags); 253 254 writel(data, solo_dev->reg_base + reg); 255 wmb(); 256 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val); 257 rmb(); 258 259 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags); 260} 261 262void solo6010_irq_on(struct solo6010_dev *solo_dev, u32 mask); 263void solo6010_irq_off(struct solo6010_dev *solo_dev, u32 mask); 264 265/* Init/exit routeines for subsystems */ 266int solo_disp_init(struct solo6010_dev *solo_dev); 267void solo_disp_exit(struct solo6010_dev *solo_dev); 268 269int solo_gpio_init(struct solo6010_dev *solo_dev); 270void solo_gpio_exit(struct solo6010_dev *solo_dev); 271 272int solo_i2c_init(struct solo6010_dev *solo_dev); 273void solo_i2c_exit(struct solo6010_dev *solo_dev); 274 275int solo_p2m_init(struct solo6010_dev *solo_dev); 276void solo_p2m_exit(struct solo6010_dev *solo_dev); 277 278int solo_v4l2_init(struct solo6010_dev *solo_dev); 279void solo_v4l2_exit(struct solo6010_dev *solo_dev); 280 281int solo_enc_init(struct solo6010_dev *solo_dev); 282void solo_enc_exit(struct solo6010_dev *solo_dev); 283 284int solo_enc_v4l2_init(struct solo6010_dev *solo_dev); 285void solo_enc_v4l2_exit(struct solo6010_dev *solo_dev); 286 287int solo_g723_init(struct solo6010_dev *solo_dev); 288void solo_g723_exit(struct solo6010_dev *solo_dev); 289 290/* ISR's */ 291int solo_i2c_isr(struct solo6010_dev *solo_dev); 292void solo_p2m_isr(struct solo6010_dev *solo_dev, int id); 293void solo_p2m_error_isr(struct solo6010_dev *solo_dev, u32 status); 294void solo_enc_v4l2_isr(struct solo6010_dev *solo_dev); 295void solo_g723_isr(struct solo6010_dev *solo_dev); 296void solo_motion_isr(struct solo6010_dev *solo_dev); 297void solo_video_in_isr(struct solo6010_dev *solo_dev); 298 299/* i2c read/write */ 300u8 solo_i2c_readbyte(struct solo6010_dev *solo_dev, int id, u8 addr, u8 off); 301void solo_i2c_writebyte(struct solo6010_dev *solo_dev, int id, u8 addr, u8 off, 302 u8 data); 303 304/* P2M DMA */ 305int solo_p2m_dma_t(struct solo6010_dev *solo_dev, u8 id, int wr, 306 dma_addr_t dma_addr, u32 ext_addr, u32 size); 307int solo_p2m_dma(struct solo6010_dev *solo_dev, u8 id, int wr, 308 void *sys_addr, u32 ext_addr, u32 size); 309 310/* Set the threshold for motion detection */ 311void solo_set_motion_threshold(struct solo6010_dev *solo_dev, u8 ch, u16 val); 312#define SOLO_DEF_MOT_THRESH 0x0300 313 314/* Write text on OSD */ 315int solo_osd_print(struct solo_enc_dev *solo_enc); 316 317#endif /* __SOLO6010_H */ 318