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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192su/ieee80211/
1#ifndef __IEEE80211_R8192S_H
2#define __IEEE80211_R8192S_H
3
4/* added for rtl819x tx procedure */
5#define MAX_QUEUE_SIZE		0x10
6
7/* 8190 queue mapping */
8enum {
9	BK_QUEUE	= 0,
10	BE_QUEUE	= 1,
11	VI_QUEUE	= 2,
12	VO_QUEUE	= 3,
13	HCCA_QUEUE	= 4,
14	TXCMD_QUEUE	= 5,
15	MGNT_QUEUE	= 6,
16	HIGH_QUEUE	= 7,
17	BEACON_QUEUE	= 8,
18
19	LOW_QUEUE	= BE_QUEUE,
20	NORMAL_QUEUE	= MGNT_QUEUE
21};
22
23#define SWRF_TIMEOUT		50
24
25/* LEAP related */
26/* Flag byte: byte 8, numbered from 0. */
27#define IE_CISCO_FLAG_POSITION		0x08
28#define SUPPORT_CKIP_MIC		0x08	/* bit3 */
29#define SUPPORT_CKIP_PK			0x10	/* bit4 */
30
31/* defined for skb cb field, at most 28 byte */
32typedef struct cb_desc {
33	/* Tx Desc Related flags (8-9) */
34	u8 bLastIniPkt:1;
35	u8 bCmdOrInit:1;
36	u8 bFirstSeg:1;
37	u8 bLastSeg:1;
38	u8 bEncrypt:1;
39	u8 bTxDisableRateFallBack:1;
40	u8 bTxUseDriverAssingedRate:1;
41	u8 bHwSec:1; /* indicate whether use Hw security */
42
43	u8 reserved1;
44
45	/* Tx Firmware Relaged flags (10-11) */
46	u8 bCTSEnable:1;
47	u8 bRTSEnable:1;
48	u8 bUseShortGI:1;
49	u8 bUseShortPreamble:1;
50	u8 bTxEnableFwCalcDur:1;
51	u8 bAMPDUEnable:1;
52	u8 bRTSSTBC:1;
53	u8 RTSSC:1;
54
55	u8 bRTSBW:1;
56	u8 bPacketBW:1;
57	u8 bRTSUseShortPreamble:1;
58	u8 bRTSUseShortGI:1;
59	u8 bMulticast:1;
60	u8 bBroadcast:1;
61	u8 drv_agg_enable:1;
62	u8 reserved2:1;
63
64	/* Tx Desc related element(12-19) */
65	u8 rata_index;
66	u8 queue_index;
67	u16 txbuf_size;
68	u8 RATRIndex;
69	u8 reserved6;
70	u8 reserved7;
71	u8 reserved8;
72
73	/* Tx firmware related element(20-27) */
74	u8 data_rate;
75	u8 rts_rate;
76	u8 ampdu_factor;
77	u8 ampdu_density;
78	u8 DrvAggrNum;
79	u16 pkt_size;
80	u8 reserved12;
81} cb_desc, *pcb_desc;
82
83enum {
84	MGN_1M		= 0x02,
85	MGN_2M		= 0x04,
86	MGN_5_5M	= 0x0b,
87	MGN_11M		= 0x16,
88
89	MGN_6M		= 0x0c,
90	MGN_9M		= 0x12,
91	MGN_12M		= 0x18,
92	MGN_18M		= 0x24,
93	MGN_24M		= 0x30,
94	MGN_36M		= 0x48,
95	MGN_48M		= 0x60,
96	MGN_54M		= 0x6c,
97
98	MGN_MCS0	= 0x80,
99	MGN_MCS1	= 0x81,
100	MGN_MCS2	= 0x82,
101	MGN_MCS3	= 0x83,
102	MGN_MCS4	= 0x84,
103	MGN_MCS5	= 0x85,
104	MGN_MCS6	= 0x86,
105	MGN_MCS7	= 0x87,
106	MGN_MCS8	= 0x88,
107	MGN_MCS9	= 0x89,
108	MGN_MCS10	= 0x8a,
109	MGN_MCS11	= 0x8b,
110	MGN_MCS12	= 0x8c,
111	MGN_MCS13	= 0x8d,
112	MGN_MCS14	= 0x8e,
113	MGN_MCS15	= 0x8f,
114
115	MGN_MCS0_SG	= 0x90,
116	MGN_MCS1_SG	= 0x91,
117	MGN_MCS2_SG	= 0x92,
118	MGN_MCS3_SG	= 0x93,
119	MGN_MCS4_SG	= 0x94,
120	MGN_MCS5_SG	= 0x95,
121	MGN_MCS6_SG	= 0x96,
122	MGN_MCS7_SG	= 0x97,
123	MGN_MCS8_SG	= 0x98,
124	MGN_MCS9_SG	= 0x99,
125	MGN_MCS10_SG	= 0x9a,
126	MGN_MCS11_SG	= 0x9b,
127	MGN_MCS12_SG	= 0x9c,
128	MGN_MCS13_SG	= 0x9d,
129	MGN_MCS14_SG	= 0x9e,
130	MGN_MCS15_SG	= 0x9f,
131};
132
133#define FC_QOS_BIT		BIT7
134
135#define IsDataFrame(pdu)	(((pdu[0] & 0x0C) == 0x08) ? true : false)
136#define IsLegacyDataFrame(pdu)	(IsDataFrame(pdu) && (!(pdu[0] & FC_QOS_BIT)))
137#define IsQoSDataFrame(pframe) \
138	((*(u16 *)pframe & (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA)) \
139	 == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
140
141#define Frame_Order(pframe)	(*(u16 *)pframe & IEEE80211_FCTL_ORDER)
142
143#define SN_LESS(a, b)		(((a - b) & 0x800) != 0)
144#define SN_EQUAL(a, b)		(a == b)
145
146#define MAX_DEV_ADDR_SIZE 8
147
148enum {
149	/* ACT_CATEGORY */
150	ACT_CAT_QOS	= 1,
151	ACT_CAT_DLS	= 2,
152	ACT_CAT_BA	= 3,
153	ACT_CAT_HT	= 7,
154	ACT_CAT_WMM	= 17,
155
156	/* TS_ACTION */
157	ACT_ADDTSREQ	= 0,
158	ACT_ADDTSRSP	= 1,
159	ACT_DELTS	= 2,
160	ACT_SCHEDULE	= 3,
161
162	/* BA_ACTION */
163	ACT_ADDBAREQ	= 0,
164	ACT_ADDBARSP	= 1,
165	ACT_DELBA	= 2,
166};
167
168/* InitialGainOpType */
169enum {
170	IG_Backup = 0,
171	IG_Restore,
172	IG_Max
173};
174
175typedef enum _LED_CTL_MODE{
176	LED_CTL_POWER_ON = 1,
177	LED_CTL_LINK = 2,
178	LED_CTL_NO_LINK = 3,
179	LED_CTL_TX = 4,
180	LED_CTL_RX = 5,
181	LED_CTL_SITE_SURVEY = 6,
182	LED_CTL_POWER_OFF = 7,
183	LED_CTL_START_TO_LINK = 8,
184	LED_CTL_START_WPS = 9,
185	LED_CTL_STOP_WPS = 10,
186	LED_CTL_START_WPS_BOTTON = 11,
187	LED_CTL_STOP_WPS_FAIL = 12,
188	LED_CTL_STOP_WPS_FAIL_OVERLAP = 13,
189} LED_CTL_MODE;
190
191typedef union _frameqos {
192	u16 shortdata;
193	u8  chardata[2];
194	struct {
195		u16 tid:4;
196		u16 eosp:1;
197		u16 ack_policy:2;
198		u16 reserved:1;
199		u16 txop:8;
200	} field;
201} frameqos;
202
203static inline u8 Frame_QoSTID(u8 *buf)
204{
205	struct ieee80211_hdr_3addr *hdr = (struct ieee80211_hdr_3addr *)buf;
206	u16 fc = le16_to_cpu(hdr->frame_control);
207
208	return (u8)((frameqos *)(buf +
209		(((fc & IEEE80211_FCTL_TODS) &&
210		  (fc & IEEE80211_FCTL_FROMDS)) ? 30 : 24)))->field.tid;
211}
212
213enum {
214	ERP_NonERPpresent	= 1,
215	ERP_UseProtection	= 2,
216	ERP_BarkerPreambleMode	= 4,
217};
218
219struct bandwidth_autoswitch {
220	long threshold_20Mhzto40Mhz;
221	long threshold_40Mhzto20Mhz;
222	bool bforced_tx20Mhz;
223	bool bautoswitch_enable;
224};
225
226#define REORDER_WIN_SIZE	128
227#define REORDER_ENTRY_NUM	128
228typedef struct _RX_REORDER_ENTRY {
229	struct list_head	List;
230	u16			SeqNum;
231	struct ieee80211_rxb	*prxb;
232} RX_REORDER_ENTRY, *PRX_REORDER_ENTRY;
233
234typedef enum _Fsync_State{
235	Default_Fsync,
236	HW_Fsync,
237	SW_Fsync
238} Fsync_State;
239
240/* Power save mode configured. */
241typedef enum _RT_PS_MODE {
242	eActive,	/* Active/Continuous access. */
243	eMaxPs,		/* Max power save mode. */
244	eFastPs		/* Fast power save mode. */
245} RT_PS_MODE;
246
247typedef enum _IPS_CALLBACK_FUNCION {
248	IPS_CALLBACK_NONE = 0,
249	IPS_CALLBACK_MGNT_LINK_REQUEST = 1,
250	IPS_CALLBACK_JOIN_REQUEST = 2,
251} IPS_CALLBACK_FUNCION;
252
253typedef enum _RT_JOIN_ACTION {
254	RT_JOIN_INFRA = 1,
255	RT_JOIN_IBSS  = 2,
256	RT_START_IBSS = 3,
257	RT_NO_ACTION  = 4,
258} RT_JOIN_ACTION;
259
260struct ibss_parms {
261	u16 atimWin;
262};
263
264/* Max num of support rates element: 8,  Max num of ext. support rate: 255. */
265#define MAX_NUM_RATES	264
266
267typedef enum _RT_RF_POWER_STATE {
268	eRfOn,
269	eRfSleep,
270	eRfOff
271} RT_RF_POWER_STATE;
272
273struct rt_power_save_control {
274	/* Inactive Power Save (IPS): disable RF when disconnected */
275	bool			bInactivePs;
276	bool			bIPSModeBackup;
277	bool			bHaltAdapterClkRQ;
278	bool			bSwRfProcessing;
279	RT_RF_POWER_STATE	eInactivePowerState;
280	struct work_struct 	InactivePsWorkItem;
281	struct timer_list	InactivePsTimer;
282
283	/* return point for join action */
284	IPS_CALLBACK_FUNCION	ReturnPoint;
285
286	/* Recored Parameters for rescheduled JoinRequest */
287	bool			bTmpBssDesc;
288	RT_JOIN_ACTION		tmpJoinAction;
289	struct ieee80211_network tmpBssDesc;
290
291	/* Recored Parameters for rescheduled MgntLinkRequest */
292	bool			bTmpScanOnly;
293	bool			bTmpActiveScan;
294	bool			bTmpFilterHiddenAP;
295	bool			bTmpUpdateParms;
296	u8			tmpSsidBuf[33];
297	OCTET_STRING		tmpSsid2Scan;
298	bool			bTmpSsid2Scan;
299	u8			tmpNetworkType;
300	u8			tmpChannelNumber;
301	u16			tmpBcnPeriod;
302	u8			tmpDtimPeriod;
303	u16			tmpmCap;
304	OCTET_STRING		tmpSuppRateSet;
305	u8			tmpSuppRateBuf[MAX_NUM_RATES];
306	bool			bTmpSuppRate;
307	struct ibss_parms	tmpIbpm;
308	bool			bTmpIbpm;
309
310	/* Leisre Poswer Save: disable RF if connected but traffic isn't busy */
311	bool			bLeisurePs;
312	u32			PowerProfile;
313	u8			LpsIdleCount;
314	u8			RegMaxLPSAwakeIntvl;
315	u8			LPSAwakeIntvl;
316
317	/* RF OFF Level */
318	u32			CurPsLevel;
319	u32			RegRfPsLevel;
320
321	/* Fw Control LPS */
322	bool			bFwCtrlLPS;
323	u8			FWCtrlPSMode;
324
325	/* Record if there is a link request in IPS RF off progress. */
326	bool			LinkReqInIPSRFOffPgs;
327	/*
328	 * To make sure that connect info should be executed, so we set the
329	 * bit to filter the link info which comes after the connect info.
330	 */
331	bool			BufConnectinfoBefore;
332};
333
334enum {
335	RF_CHANGE_BY_SW		= BIT31,
336	RF_CHANGE_BY_HW		= BIT30,
337	RF_CHANGE_BY_PS		= BIT29,
338	RF_CHANGE_BY_IPS	= BIT28,
339};
340
341/* Firmware related CMD IO. */
342typedef	enum _FW_CMD_IO_TYPE{
343	FW_CMD_DIG_ENABLE = 0, /* for DIG DM */
344	FW_CMD_DIG_DISABLE = 1,
345	FW_CMD_DIG_HALT = 2,
346	FW_CMD_DIG_RESUME = 3,
347	FW_CMD_HIGH_PWR_ENABLE = 4, /* for DIG DM */
348	FW_CMD_HIGH_PWR_DISABLE = 5,
349	FW_CMD_RA_RESET = 6, /* for DIG DM */
350	FW_CMD_RA_ACTIVE= 7,
351	FW_CMD_RA_REFRESH_N= 8,
352	FW_CMD_RA_REFRESH_BG= 9,
353	FW_CMD_RA_INIT= 10, /* for FW supported IQK */
354	FW_CMD_IQK_ENABLE = 11, /* Tx power tracking switch */
355	FW_CMD_TXPWR_TRACK_ENABLE = 12, /* Tx power tracking switch */
356	FW_CMD_TXPWR_TRACK_DISABLE = 13,
357	FW_CMD_TXPWR_TRACK_THERMAL = 14,
358	FW_CMD_PAUSE_DM_BY_SCAN = 15,
359	/* indicate firmware that driver enters LPS, for PS-Poll hardware bug */
360	FW_CMD_RESUME_DM_BY_SCAN = 16,
361	/* indicate firmware that driver leave LPS */
362	FW_CMD_RA_REFRESH_N_COMB = 17,
363	FW_CMD_RA_REFRESH_BG_COMB = 18,
364	FW_CMD_ANTENNA_SW_ENABLE = 19,
365	FW_CMD_ANTENNA_SW_DISABLE = 20,
366	FW_CMD_TX_FEEDBACK_CCX_ENABLE = 21,
367	FW_CMD_LPS_ENTER = 22,
368	FW_CMD_LPS_LEAVE = 23,
369	FW_CMD_DIG_MODE_SS = 24,
370	FW_CMD_DIG_MODE_FA = 25,
371	FW_CMD_ADD_A2_ENTRY = 26,
372	FW_CMD_CTRL_DM_BY_DRIVER = 27,
373	FW_CMD_CTRL_DM_BY_DRIVER_NEW = 28,
374}FW_CMD_IO_TYPE,*PFW_CMD_IO_TYPE;
375
376#define RT_MAX_LD_SLOT_NUM	10
377struct rt_link_detect {
378	u32	NumRecvBcnInPeriod;
379	u32	NumRecvDataInPeriod;
380
381	/* number of Rx beacon / CheckForHang_period to determine link status */
382	u32	RxBcnNum[RT_MAX_LD_SLOT_NUM];
383	/* number of Rx data / CheckForHang_period to determine link status */
384	u32	RxDataNum[RT_MAX_LD_SLOT_NUM];
385	/* number of CheckForHang period to determine link status */
386	u16	SlotNum;
387	u16	SlotIndex;
388
389	u32	NumTxOkInPeriod;
390	u32	NumRxOkInPeriod;
391	bool	bBusyTraffic;
392};
393
394/* HT */
395#define MAX_RECEIVE_BUFFER_SIZE 9100
396extern void HTDebugHTCapability(u8 *CapIE, u8 *TitleString);
397extern void HTDebugHTInfo(u8 *InfoIE, u8 *TitleString);
398
399extern void HTSetConnectBwMode(struct ieee80211_device *ieee,
400			       HT_CHANNEL_WIDTH Bandwidth,
401			       HT_EXTCHNL_OFFSET Offset);
402extern void HTUpdateDefaultSetting(struct ieee80211_device *ieee);
403extern void HTConstructCapabilityElement(struct ieee80211_device *ieee,
404					 u8 *posHTCap, u8 *len, u8 isEncrypt);
405extern void HTConstructInfoElement(struct ieee80211_device *ieee,
406				   u8 *posHTInfo, u8 *len, u8 isEncrypt);
407extern void HTConstructRT2RTAggElement(struct ieee80211_device *ieee,
408				       u8 *posRT2RTAgg, u8 *len);
409extern void HTOnAssocRsp(struct ieee80211_device *ieee);
410extern void HTInitializeHTInfo(struct ieee80211_device *ieee);
411extern void HTInitializeBssDesc(PBSS_HT pBssHT);
412extern void HTResetSelfAndSavePeerSetting(struct ieee80211_device *ieee,
413					  struct ieee80211_network *pNetwork);
414extern void HTUpdateSelfAndPeerSetting(struct ieee80211_device *ieee,
415				       struct ieee80211_network *pNetwork);
416extern u8 HTGetHighestMCSRate(struct ieee80211_device *ieee, u8 *pMCSRateSet,
417			      u8 *pMCSFilter);
418extern u8 MCS_FILTER_ALL[];
419extern u16 MCS_DATA_RATE[2][2][77] ;
420extern u8 HTCCheck(struct ieee80211_device *ieee, u8 *pFrame);
421extern void HTResetIOTSetting(PRT_HIGH_THROUGHPUT pHTInfo);
422extern bool IsHTHalfNmodeAPs(struct ieee80211_device *ieee);
423extern u16 HTHalfMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate);
424extern u16 HTMcsToDataRate(struct ieee80211_device *ieee, u8 nMcsRate);
425extern u16  TxCountToDataRate(struct ieee80211_device *ieee, u8 nDataRate);
426extern int ieee80211_rx_ADDBAReq(struct ieee80211_device *ieee,
427				 struct sk_buff *skb);
428extern int ieee80211_rx_ADDBARsp(struct ieee80211_device *ieee,
429				 struct sk_buff *skb);
430extern int ieee80211_rx_DELBA(struct ieee80211_device *ieee,
431			      struct sk_buff *skb);
432extern void TsInitAddBA(struct ieee80211_device *ieee, PTX_TS_RECORD pTS,
433			u8 Policy, u8 bOverwritePending);
434extern void TsInitDelBA(struct ieee80211_device *ieee,
435			PTS_COMMON_INFO pTsCommonInfo, TR_SELECT TxRxSelect);
436extern void BaSetupTimeOut(unsigned long data);
437extern void TxBaInactTimeout(unsigned long data);
438extern void RxBaInactTimeout(unsigned long data);
439extern void ResetBaEntry(PBA_RECORD pBA);
440extern bool GetTs(struct ieee80211_device *ieee, PTS_COMMON_INFO *ppTS,
441		  u8 *Addr, u8 TID, TR_SELECT TxRxSelect,  /* Rx:1, Tx:0 */
442		  bool bAddNewTs);
443extern void TSInitialize(struct ieee80211_device *ieee);
444extern void TsStartAddBaProcess(struct ieee80211_device *ieee,
445				PTX_TS_RECORD pTxTS);
446extern void RemovePeerTS(struct ieee80211_device *ieee, u8 *Addr);
447extern void RemoveAllTS(struct ieee80211_device *ieee);
448
449#endif /* __IEEE80211_R8192S_H */
450