1/* 2 * LIRC driver for ITE IT8712/IT8705 CIR port 3 * 4 * Copyright (C) 2001 Hans-Gunter Lutke Uphues <hg_lu@web.de> 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation; either version 2 of the 9 * License, or (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, but 12 * WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 14 * General Public License for more details. 15 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 19 * USA 20 * 21 * ITE IT8705 and IT8712(not tested) and IT8720 CIR-port support for lirc based 22 * via cut and paste from lirc_sir.c (C) 2000 Milan Pikula 23 * 24 * Attention: Sendmode only tested with debugging logs 25 * 26 * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> : 27 * reimplemented read function 28 * 2005/06/05 Andrew Calkin implemented support for Asus Digimatrix, 29 * based on work of the following member of the Outertrack Digimatrix 30 * Forum: Art103 <r_tay@hotmail.com> 31 * 2009/12/24 James Edwards <jimbo-lirc@edwardsclan.net> implemeted support 32 * for ITE8704/ITE8718, on my machine, the DSDT reports 8704, but the 33 * chip identifies as 18. 34 */ 35 36#include <linux/module.h> 37#include <linux/sched.h> 38#include <linux/errno.h> 39#include <linux/signal.h> 40#include <linux/fs.h> 41#include <linux/interrupt.h> 42#include <linux/ioport.h> 43#include <linux/kernel.h> 44#include <linux/time.h> 45#include <linux/string.h> 46#include <linux/types.h> 47#include <linux/wait.h> 48#include <linux/mm.h> 49#include <linux/delay.h> 50#include <linux/poll.h> 51#include <asm/system.h> 52#include <linux/io.h> 53#include <linux/irq.h> 54#include <linux/fcntl.h> 55 56#include <linux/timer.h> 57#include <linux/pnp.h> 58 59#include <media/lirc.h> 60#include <media/lirc_dev.h> 61 62#include "lirc_it87.h" 63 64#ifdef LIRC_IT87_DIGIMATRIX 65static int digimatrix = 1; 66static int it87_freq = 36; /* kHz */ 67static int irq = 9; 68#else 69static int digimatrix; 70static int it87_freq = 38; /* kHz */ 71static int irq = IT87_CIR_DEFAULT_IRQ; 72#endif 73 74static unsigned long it87_bits_in_byte_out; 75static unsigned long it87_send_counter; 76static unsigned char it87_RXEN_mask = IT87_CIR_RCR_RXEN; 77 78#define RBUF_LEN 1024 79 80#define LIRC_DRIVER_NAME "lirc_it87" 81 82/* timeout for sequences in jiffies (=5/100s) */ 83/* must be longer than TIME_CONST */ 84#define IT87_TIMEOUT (HZ*5/100) 85 86/* module parameters */ 87static int debug; 88#define dprintk(fmt, args...) \ 89 do { \ 90 if (debug) \ 91 printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \ 92 fmt, ## args); \ 93 } while (0) 94 95static int io = IT87_CIR_DEFAULT_IOBASE; 96/* receiver demodulator default: off */ 97static int it87_enable_demodulator; 98 99static int timer_enabled; 100static DEFINE_SPINLOCK(timer_lock); 101static struct timer_list timerlist; 102/* time of last signal change detected */ 103static struct timeval last_tv = {0, 0}; 104/* time of last UART data ready interrupt */ 105static struct timeval last_intr_tv = {0, 0}; 106static int last_value; 107 108static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue); 109 110static DEFINE_SPINLOCK(hardware_lock); 111static DEFINE_SPINLOCK(dev_lock); 112static bool device_open; 113 114static int rx_buf[RBUF_LEN]; 115unsigned int rx_tail, rx_head; 116 117static struct pnp_driver it87_pnp_driver; 118 119/* SECTION: Prototypes */ 120 121/* Communication with user-space */ 122static int lirc_open(struct inode *inode, struct file *file); 123static int lirc_close(struct inode *inode, struct file *file); 124static unsigned int lirc_poll(struct file *file, poll_table *wait); 125static ssize_t lirc_read(struct file *file, char *buf, 126 size_t count, loff_t *ppos); 127static ssize_t lirc_write(struct file *file, const char *buf, 128 size_t n, loff_t *pos); 129static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg); 130static void add_read_queue(int flag, unsigned long val); 131static int init_chrdev(void); 132static void drop_chrdev(void); 133/* Hardware */ 134static irqreturn_t it87_interrupt(int irq, void *dev_id); 135static void send_space(unsigned long len); 136static void send_pulse(unsigned long len); 137static void init_send(void); 138static void terminate_send(unsigned long len); 139static int init_hardware(void); 140static void drop_hardware(void); 141/* Initialisation */ 142static int init_port(void); 143static void drop_port(void); 144 145 146/* SECTION: Communication with user-space */ 147 148static int lirc_open(struct inode *inode, struct file *file) 149{ 150 spin_lock(&dev_lock); 151 if (device_open) { 152 spin_unlock(&dev_lock); 153 return -EBUSY; 154 } 155 device_open = true; 156 spin_unlock(&dev_lock); 157 return 0; 158} 159 160 161static int lirc_close(struct inode *inode, struct file *file) 162{ 163 spin_lock(&dev_lock); 164 device_open = false; 165 spin_unlock(&dev_lock); 166 return 0; 167} 168 169 170static unsigned int lirc_poll(struct file *file, poll_table *wait) 171{ 172 poll_wait(file, &lirc_read_queue, wait); 173 if (rx_head != rx_tail) 174 return POLLIN | POLLRDNORM; 175 return 0; 176} 177 178 179static ssize_t lirc_read(struct file *file, char *buf, 180 size_t count, loff_t *ppos) 181{ 182 int n = 0; 183 int retval = 0; 184 185 while (n < count) { 186 if (file->f_flags & O_NONBLOCK && rx_head == rx_tail) { 187 retval = -EAGAIN; 188 break; 189 } 190 retval = wait_event_interruptible(lirc_read_queue, 191 rx_head != rx_tail); 192 if (retval) 193 break; 194 195 if (copy_to_user((void *) buf + n, (void *) (rx_buf + rx_head), 196 sizeof(int))) { 197 retval = -EFAULT; 198 break; 199 } 200 rx_head = (rx_head + 1) & (RBUF_LEN - 1); 201 n += sizeof(int); 202 } 203 if (n) 204 return n; 205 return retval; 206} 207 208 209static ssize_t lirc_write(struct file *file, const char *buf, 210 size_t n, loff_t *pos) 211{ 212 int i = 0; 213 int *tx_buf; 214 215 if (n % sizeof(int)) 216 return -EINVAL; 217 tx_buf = memdup_user(buf, n); 218 if (IS_ERR(tx_buf)) 219 return PTR_ERR(tx_buf); 220 n /= sizeof(int); 221 init_send(); 222 while (1) { 223 if (i >= n) 224 break; 225 if (tx_buf[i]) 226 send_pulse(tx_buf[i]); 227 i++; 228 if (i >= n) 229 break; 230 if (tx_buf[i]) 231 send_space(tx_buf[i]); 232 i++; 233 } 234 terminate_send(tx_buf[i - 1]); 235 return n; 236} 237 238 239static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg) 240{ 241 int retval = 0; 242 unsigned long value = 0; 243 unsigned int ivalue; 244 unsigned long hw_flags; 245 246 if (cmd == LIRC_GET_FEATURES) 247 value = LIRC_CAN_SEND_PULSE | 248 LIRC_CAN_SET_SEND_CARRIER | 249 LIRC_CAN_REC_MODE2; 250 else if (cmd == LIRC_GET_SEND_MODE) 251 value = LIRC_MODE_PULSE; 252 else if (cmd == LIRC_GET_REC_MODE) 253 value = LIRC_MODE_MODE2; 254 255 switch (cmd) { 256 case LIRC_GET_FEATURES: 257 case LIRC_GET_SEND_MODE: 258 case LIRC_GET_REC_MODE: 259 retval = put_user(value, (unsigned long *) arg); 260 break; 261 262 case LIRC_SET_SEND_MODE: 263 case LIRC_SET_REC_MODE: 264 retval = get_user(value, (unsigned long *) arg); 265 break; 266 267 case LIRC_SET_SEND_CARRIER: 268 retval = get_user(ivalue, (unsigned int *) arg); 269 if (retval) 270 return retval; 271 ivalue /= 1000; 272 if (ivalue > IT87_CIR_FREQ_MAX || 273 ivalue < IT87_CIR_FREQ_MIN) 274 return -EINVAL; 275 276 it87_freq = ivalue; 277 278 spin_lock_irqsave(&hardware_lock, hw_flags); 279 outb(((inb(io + IT87_CIR_TCR2) & IT87_CIR_TCR2_TXMPW) | 280 (it87_freq - IT87_CIR_FREQ_MIN) << 3), 281 io + IT87_CIR_TCR2); 282 spin_unlock_irqrestore(&hardware_lock, hw_flags); 283 dprintk("demodulation frequency: %d kHz\n", it87_freq); 284 285 break; 286 287 default: 288 retval = -EINVAL; 289 } 290 291 if (retval) 292 return retval; 293 294 if (cmd == LIRC_SET_REC_MODE) { 295 if (value != LIRC_MODE_MODE2) 296 retval = -ENOSYS; 297 } else if (cmd == LIRC_SET_SEND_MODE) { 298 if (value != LIRC_MODE_PULSE) 299 retval = -ENOSYS; 300 } 301 return retval; 302} 303 304static void add_read_queue(int flag, unsigned long val) 305{ 306 unsigned int new_rx_tail; 307 int newval; 308 309 dprintk("add flag %d with val %lu\n", flag, val); 310 311 newval = val & PULSE_MASK; 312 313 /* 314 * statistically, pulses are ~TIME_CONST/2 too long. we could 315 * maybe make this more exact, but this is good enough 316 */ 317 if (flag) { 318 /* pulse */ 319 if (newval > TIME_CONST / 2) 320 newval -= TIME_CONST / 2; 321 else /* should not ever happen */ 322 newval = 1; 323 newval |= PULSE_BIT; 324 } else 325 newval += TIME_CONST / 2; 326 new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1); 327 if (new_rx_tail == rx_head) { 328 dprintk("Buffer overrun.\n"); 329 return; 330 } 331 rx_buf[rx_tail] = newval; 332 rx_tail = new_rx_tail; 333 wake_up_interruptible(&lirc_read_queue); 334} 335 336 337static const struct file_operations lirc_fops = { 338 .owner = THIS_MODULE, 339 .read = lirc_read, 340 .write = lirc_write, 341 .poll = lirc_poll, 342 .unlocked_ioctl = lirc_ioctl, 343 .open = lirc_open, 344 .release = lirc_close, 345}; 346 347static int set_use_inc(void *data) 348{ 349 return 0; 350} 351 352static void set_use_dec(void *data) 353{ 354} 355 356static struct lirc_driver driver = { 357 .name = LIRC_DRIVER_NAME, 358 .minor = -1, 359 .code_length = 1, 360 .sample_rate = 0, 361 .data = NULL, 362 .add_to_buf = NULL, 363 .set_use_inc = set_use_inc, 364 .set_use_dec = set_use_dec, 365 .fops = &lirc_fops, 366 .dev = NULL, 367 .owner = THIS_MODULE, 368}; 369 370 371static int init_chrdev(void) 372{ 373 driver.minor = lirc_register_driver(&driver); 374 375 if (driver.minor < 0) { 376 printk(KERN_ERR LIRC_DRIVER_NAME ": init_chrdev() failed.\n"); 377 return -EIO; 378 } 379 return 0; 380} 381 382 383static void drop_chrdev(void) 384{ 385 lirc_unregister_driver(driver.minor); 386} 387 388 389/* SECTION: Hardware */ 390static long delta(struct timeval *tv1, struct timeval *tv2) 391{ 392 unsigned long deltv; 393 394 deltv = tv2->tv_sec - tv1->tv_sec; 395 if (deltv > 15) 396 deltv = 0xFFFFFF; 397 else 398 deltv = deltv*1000000 + tv2->tv_usec - tv1->tv_usec; 399 return deltv; 400} 401 402static void it87_timeout(unsigned long data) 403{ 404 unsigned long flags; 405 406 /* avoid interference with interrupt */ 407 spin_lock_irqsave(&timer_lock, flags); 408 409 if (digimatrix) { 410 /* We have timed out. Disable the RX mechanism. */ 411 412 outb((inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN) | 413 IT87_CIR_RCR_RXACT, io + IT87_CIR_RCR); 414 if (it87_RXEN_mask) 415 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN, 416 io + IT87_CIR_RCR); 417 dprintk(" TIMEOUT\n"); 418 timer_enabled = 0; 419 420 /* fifo clear */ 421 outb(inb(io + IT87_CIR_TCR1) | IT87_CIR_TCR1_FIFOCLR, 422 io+IT87_CIR_TCR1); 423 424 } else { 425 /* 426 * if last received signal was a pulse, but receiving stopped 427 * within the 9 bit frame, we need to finish this pulse and 428 * simulate a signal change to from pulse to space. Otherwise 429 * upper layers will receive two sequences next time. 430 */ 431 432 if (last_value) { 433 unsigned long pulse_end; 434 435 /* determine 'virtual' pulse end: */ 436 pulse_end = delta(&last_tv, &last_intr_tv); 437 dprintk("timeout add %d for %lu usec\n", 438 last_value, pulse_end); 439 add_read_queue(last_value, pulse_end); 440 last_value = 0; 441 last_tv = last_intr_tv; 442 } 443 } 444 spin_unlock_irqrestore(&timer_lock, flags); 445} 446 447static irqreturn_t it87_interrupt(int irq, void *dev_id) 448{ 449 unsigned char data; 450 struct timeval curr_tv; 451 static unsigned long deltv; 452 unsigned long deltintrtv; 453 unsigned long flags, hw_flags; 454 int iir, lsr; 455 int fifo = 0; 456 static char lastbit; 457 char bit; 458 459 /* Bit duration in microseconds */ 460 const unsigned long bit_duration = 1000000ul / 461 (115200 / IT87_CIR_BAUDRATE_DIVISOR); 462 463 464 iir = inb(io + IT87_CIR_IIR); 465 466 switch (iir & IT87_CIR_IIR_IID) { 467 case 0x4: 468 case 0x6: 469 lsr = inb(io + IT87_CIR_RSR) & (IT87_CIR_RSR_RXFTO | 470 IT87_CIR_RSR_RXFBC); 471 fifo = lsr & IT87_CIR_RSR_RXFBC; 472 dprintk("iir: 0x%x fifo: 0x%x\n", iir, lsr); 473 474 /* avoid interference with timer */ 475 spin_lock_irqsave(&timer_lock, flags); 476 spin_lock_irqsave(&hardware_lock, hw_flags); 477 if (digimatrix) { 478 static unsigned long acc_pulse; 479 static unsigned long acc_space; 480 481 do { 482 data = inb(io + IT87_CIR_DR); 483 data = ~data; 484 fifo--; 485 if (data != 0x00) { 486 if (timer_enabled) 487 del_timer(&timerlist); 488 /* 489 * start timer for end of 490 * sequence detection 491 */ 492 timerlist.expires = jiffies + 493 IT87_TIMEOUT; 494 add_timer(&timerlist); 495 timer_enabled = 1; 496 } 497 /* Loop through */ 498 for (bit = 0; bit < 8; ++bit) { 499 if ((data >> bit) & 1) { 500 ++acc_pulse; 501 if (lastbit == 0) { 502 add_read_queue(0, 503 acc_space * 504 bit_duration); 505 acc_space = 0; 506 } 507 } else { 508 ++acc_space; 509 if (lastbit == 1) { 510 add_read_queue(1, 511 acc_pulse * 512 bit_duration); 513 acc_pulse = 0; 514 } 515 } 516 lastbit = (data >> bit) & 1; 517 } 518 519 } while (fifo != 0); 520 } else { /* Normal Operation */ 521 do { 522 del_timer(&timerlist); 523 data = inb(io + IT87_CIR_DR); 524 525 dprintk("data=%02x\n", data); 526 do_gettimeofday(&curr_tv); 527 deltv = delta(&last_tv, &curr_tv); 528 deltintrtv = delta(&last_intr_tv, &curr_tv); 529 530 dprintk("t %lu , d %d\n", 531 deltintrtv, (int)data); 532 533 /* 534 * if nothing came in last 2 cycles, 535 * it was gap 536 */ 537 if (deltintrtv > TIME_CONST * 2) { 538 if (last_value) { 539 dprintk("GAP\n"); 540 541 /* simulate signal change */ 542 add_read_queue(last_value, 543 deltv - 544 deltintrtv); 545 last_value = 0; 546 last_tv.tv_sec = 547 last_intr_tv.tv_sec; 548 last_tv.tv_usec = 549 last_intr_tv.tv_usec; 550 deltv = deltintrtv; 551 } 552 } 553 data = 1; 554 if (data ^ last_value) { 555 /* 556 * deltintrtv > 2*TIME_CONST, 557 * remember ? the other case is 558 * timeout 559 */ 560 add_read_queue(last_value, 561 deltv-TIME_CONST); 562 last_value = data; 563 last_tv = curr_tv; 564 if (last_tv.tv_usec >= TIME_CONST) 565 last_tv.tv_usec -= TIME_CONST; 566 else { 567 last_tv.tv_sec--; 568 last_tv.tv_usec += 1000000 - 569 TIME_CONST; 570 } 571 } 572 last_intr_tv = curr_tv; 573 if (data) { 574 /* 575 * start timer for end of 576 * sequence detection 577 */ 578 timerlist.expires = 579 jiffies + IT87_TIMEOUT; 580 add_timer(&timerlist); 581 } 582 outb((inb(io + IT87_CIR_RCR) & 583 ~IT87_CIR_RCR_RXEN) | 584 IT87_CIR_RCR_RXACT, 585 io + IT87_CIR_RCR); 586 if (it87_RXEN_mask) 587 outb(inb(io + IT87_CIR_RCR) | 588 IT87_CIR_RCR_RXEN, 589 io + IT87_CIR_RCR); 590 fifo--; 591 } while (fifo != 0); 592 } 593 spin_unlock_irqrestore(&hardware_lock, hw_flags); 594 spin_unlock_irqrestore(&timer_lock, flags); 595 596 return IRQ_RETVAL(IRQ_HANDLED); 597 598 default: 599 /* not our irq */ 600 dprintk("unknown IRQ (shouldn't happen) !!\n"); 601 return IRQ_RETVAL(IRQ_NONE); 602 } 603} 604 605 606static void send_it87(unsigned long len, unsigned long stime, 607 unsigned char send_byte, unsigned int count_bits) 608{ 609 long count = len / stime; 610 long time_left = 0; 611 static unsigned char byte_out; 612 unsigned long hw_flags; 613 614 dprintk("%s: len=%ld, sb=%d\n", __func__, len, send_byte); 615 616 time_left = (long)len - (long)count * (long)stime; 617 count += ((2 * time_left) / stime); 618 while (count) { 619 long i = 0; 620 for (i = 0; i < count_bits; i++) { 621 byte_out = (byte_out << 1) | (send_byte & 1); 622 it87_bits_in_byte_out++; 623 } 624 if (it87_bits_in_byte_out == 8) { 625 dprintk("out=0x%x, tsr_txfbc: 0x%x\n", 626 byte_out, 627 inb(io + IT87_CIR_TSR) & 628 IT87_CIR_TSR_TXFBC); 629 630 while ((inb(io + IT87_CIR_TSR) & 631 IT87_CIR_TSR_TXFBC) >= IT87_CIR_FIFO_SIZE) 632 ; 633 634 spin_lock_irqsave(&hardware_lock, hw_flags); 635 outb(byte_out, io + IT87_CIR_DR); 636 spin_unlock_irqrestore(&hardware_lock, hw_flags); 637 638 it87_bits_in_byte_out = 0; 639 it87_send_counter++; 640 byte_out = 0; 641 } 642 count--; 643 } 644} 645 646 647/*TODO: maybe exchange space and pulse because it8705 only modulates 0-bits */ 648 649static void send_space(unsigned long len) 650{ 651 send_it87(len, TIME_CONST, IT87_CIR_SPACE, IT87_CIR_BAUDRATE_DIVISOR); 652} 653 654static void send_pulse(unsigned long len) 655{ 656 send_it87(len, TIME_CONST, IT87_CIR_PULSE, IT87_CIR_BAUDRATE_DIVISOR); 657} 658 659 660static void init_send() 661{ 662 unsigned long flags; 663 664 spin_lock_irqsave(&hardware_lock, flags); 665 /* RXEN=0: receiver disable */ 666 it87_RXEN_mask = 0; 667 outb(inb(io + IT87_CIR_RCR) & ~IT87_CIR_RCR_RXEN, 668 io + IT87_CIR_RCR); 669 spin_unlock_irqrestore(&hardware_lock, flags); 670 it87_bits_in_byte_out = 0; 671 it87_send_counter = 0; 672} 673 674 675static void terminate_send(unsigned long len) 676{ 677 unsigned long flags; 678 unsigned long last = 0; 679 680 last = it87_send_counter; 681 /* make sure all necessary data has been sent */ 682 while (last == it87_send_counter) 683 send_space(len); 684 /* wait until all data sent */ 685 while ((inb(io + IT87_CIR_TSR) & IT87_CIR_TSR_TXFBC) != 0) 686 ; 687 /* then re-enable receiver */ 688 spin_lock_irqsave(&hardware_lock, flags); 689 it87_RXEN_mask = IT87_CIR_RCR_RXEN; 690 outb(inb(io + IT87_CIR_RCR) | IT87_CIR_RCR_RXEN, 691 io + IT87_CIR_RCR); 692 spin_unlock_irqrestore(&hardware_lock, flags); 693} 694 695 696static int init_hardware(void) 697{ 698 unsigned long flags; 699 unsigned char it87_rcr = 0; 700 701 spin_lock_irqsave(&hardware_lock, flags); 702 /* init cir-port */ 703 /* enable r/w-access to Baudrate-Register */ 704 outb(IT87_CIR_IER_BR, io + IT87_CIR_IER); 705 outb(IT87_CIR_BAUDRATE_DIVISOR % 0x100, io+IT87_CIR_BDLR); 706 outb(IT87_CIR_BAUDRATE_DIVISOR / 0x100, io+IT87_CIR_BDHR); 707 /* Baudrate Register off, define IRQs: Input only */ 708 if (digimatrix) { 709 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RFOIE, io + IT87_CIR_IER); 710 /* RX: HCFS=0, RXDCR = 001b (33,75..38,25 kHz), RXEN=1 */ 711 } else { 712 outb(IT87_CIR_IER_IEC | IT87_CIR_IER_RDAIE, io + IT87_CIR_IER); 713 /* RX: HCFS=0, RXDCR = 001b (35,6..40,3 kHz), RXEN=1 */ 714 } 715 it87_rcr = (IT87_CIR_RCR_RXEN & it87_RXEN_mask) | 0x1; 716 if (it87_enable_demodulator) 717 it87_rcr |= IT87_CIR_RCR_RXEND; 718 outb(it87_rcr, io + IT87_CIR_RCR); 719 if (digimatrix) { 720 /* Set FIFO depth to 1 byte, and disable TX */ 721 outb(inb(io + IT87_CIR_TCR1) | 0x00, 722 io + IT87_CIR_TCR1); 723 724 /* 725 * TX: it87_freq (36kHz), 'reserved' sensitivity 726 * setting (0x00) 727 */ 728 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x00, 729 io + IT87_CIR_TCR2); 730 } else { 731 /* TX: 38kHz, 13,3us (pulse-width) */ 732 outb(((it87_freq - IT87_CIR_FREQ_MIN) << 3) | 0x06, 733 io + IT87_CIR_TCR2); 734 } 735 spin_unlock_irqrestore(&hardware_lock, flags); 736 return 0; 737} 738 739 740static void drop_hardware(void) 741{ 742 unsigned long flags; 743 744 spin_lock_irqsave(&hardware_lock, flags); 745 disable_irq(irq); 746 /* receiver disable */ 747 it87_RXEN_mask = 0; 748 outb(0x1, io + IT87_CIR_RCR); 749 /* turn off irqs */ 750 outb(0, io + IT87_CIR_IER); 751 /* fifo clear */ 752 outb(IT87_CIR_TCR1_FIFOCLR, io+IT87_CIR_TCR1); 753 /* reset */ 754 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER); 755 enable_irq(irq); 756 spin_unlock_irqrestore(&hardware_lock, flags); 757} 758 759 760static unsigned char it87_read(unsigned char port) 761{ 762 outb(port, IT87_ADRPORT); 763 return inb(IT87_DATAPORT); 764} 765 766 767static void it87_write(unsigned char port, unsigned char data) 768{ 769 outb(port, IT87_ADRPORT); 770 outb(data, IT87_DATAPORT); 771} 772 773 774/* SECTION: Initialisation */ 775 776static int init_port(void) 777{ 778 unsigned long hw_flags; 779 int retval = 0; 780 781 unsigned char init_bytes[4] = IT87_INIT; 782 unsigned char it87_chipid = 0; 783 unsigned char ldn = 0; 784 unsigned int it87_io = 0; 785 unsigned int it87_irq = 0; 786 787 /* Enter MB PnP Mode */ 788 outb(init_bytes[0], IT87_ADRPORT); 789 outb(init_bytes[1], IT87_ADRPORT); 790 outb(init_bytes[2], IT87_ADRPORT); 791 outb(init_bytes[3], IT87_ADRPORT); 792 793 /* 8712 or 8705 ? */ 794 it87_chipid = it87_read(IT87_CHIP_ID1); 795 if (it87_chipid != 0x87) { 796 retval = -ENXIO; 797 return retval; 798 } 799 it87_chipid = it87_read(IT87_CHIP_ID2); 800 if ((it87_chipid != 0x05) && 801 (it87_chipid != 0x12) && 802 (it87_chipid != 0x18) && 803 (it87_chipid != 0x20)) { 804 printk(KERN_INFO LIRC_DRIVER_NAME 805 ": no IT8704/05/12/18/20 found (claimed IT87%02x), " 806 "exiting..\n", it87_chipid); 807 retval = -ENXIO; 808 return retval; 809 } 810 printk(KERN_INFO LIRC_DRIVER_NAME 811 ": found IT87%02x.\n", 812 it87_chipid); 813 814 /* get I/O-Port and IRQ */ 815 if (it87_chipid == 0x12 || it87_chipid == 0x18) 816 ldn = IT8712_CIR_LDN; 817 else 818 ldn = IT8705_CIR_LDN; 819 it87_write(IT87_LDN, ldn); 820 821 it87_io = it87_read(IT87_CIR_BASE_MSB) * 256 + 822 it87_read(IT87_CIR_BASE_LSB); 823 if (it87_io == 0) { 824 if (io == 0) 825 io = IT87_CIR_DEFAULT_IOBASE; 826 printk(KERN_INFO LIRC_DRIVER_NAME 827 ": set default io 0x%x\n", 828 io); 829 it87_write(IT87_CIR_BASE_MSB, io / 0x100); 830 it87_write(IT87_CIR_BASE_LSB, io % 0x100); 831 } else 832 io = it87_io; 833 834 it87_irq = it87_read(IT87_CIR_IRQ); 835 if (digimatrix || it87_irq == 0) { 836 if (irq == 0) 837 irq = IT87_CIR_DEFAULT_IRQ; 838 printk(KERN_INFO LIRC_DRIVER_NAME 839 ": set default irq 0x%x\n", 840 irq); 841 it87_write(IT87_CIR_IRQ, irq); 842 } else 843 irq = it87_irq; 844 845 spin_lock_irqsave(&hardware_lock, hw_flags); 846 /* reset */ 847 outb(IT87_CIR_IER_RESET, io+IT87_CIR_IER); 848 /* fifo clear */ 849 outb(IT87_CIR_TCR1_FIFOCLR | 850 /* IT87_CIR_TCR1_ILE | */ 851 IT87_CIR_TCR1_TXRLE | 852 IT87_CIR_TCR1_TXENDF, io+IT87_CIR_TCR1); 853 spin_unlock_irqrestore(&hardware_lock, hw_flags); 854 855 /* get I/O port access and IRQ line */ 856 if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) { 857 printk(KERN_ERR LIRC_DRIVER_NAME 858 ": i/o port 0x%.4x already in use.\n", io); 859 /* Leaving MB PnP Mode */ 860 it87_write(IT87_CFGCTRL, 0x2); 861 return -EBUSY; 862 } 863 864 /* activate CIR-Device */ 865 it87_write(IT87_CIR_ACT, 0x1); 866 867 /* Leaving MB PnP Mode */ 868 it87_write(IT87_CFGCTRL, 0x2); 869 870 retval = request_irq(irq, it87_interrupt, 0 /*IRQF_DISABLED*/, 871 LIRC_DRIVER_NAME, NULL); 872 if (retval < 0) { 873 printk(KERN_ERR LIRC_DRIVER_NAME 874 ": IRQ %d already in use.\n", 875 irq); 876 release_region(io, 8); 877 return retval; 878 } 879 880 printk(KERN_INFO LIRC_DRIVER_NAME 881 ": I/O port 0x%.4x, IRQ %d.\n", io, irq); 882 883 init_timer(&timerlist); 884 timerlist.function = it87_timeout; 885 timerlist.data = 0xabadcafe; 886 887 return 0; 888} 889 890 891static void drop_port(void) 892{ 893 894 del_timer_sync(&timerlist); 895 free_irq(irq, NULL); 896 release_region(io, 8); 897} 898 899 900static int init_lirc_it87(void) 901{ 902 int retval; 903 904 init_waitqueue_head(&lirc_read_queue); 905 retval = init_port(); 906 if (retval < 0) 907 return retval; 908 init_hardware(); 909 printk(KERN_INFO LIRC_DRIVER_NAME ": Installed.\n"); 910 return 0; 911} 912 913static int it87_probe(struct pnp_dev *pnp_dev, 914 const struct pnp_device_id *dev_id) 915{ 916 int retval; 917 918 driver.dev = &pnp_dev->dev; 919 920 retval = init_chrdev(); 921 if (retval < 0) 922 return retval; 923 924 retval = init_lirc_it87(); 925 if (retval) 926 goto init_lirc_it87_failed; 927 928 return 0; 929 930init_lirc_it87_failed: 931 drop_chrdev(); 932 933 return retval; 934} 935 936static int __init lirc_it87_init(void) 937{ 938 return pnp_register_driver(&it87_pnp_driver); 939} 940 941 942static void __exit lirc_it87_exit(void) 943{ 944 drop_hardware(); 945 drop_chrdev(); 946 drop_port(); 947 pnp_unregister_driver(&it87_pnp_driver); 948 printk(KERN_INFO LIRC_DRIVER_NAME ": Uninstalled.\n"); 949} 950 951/* SECTION: PNP for ITE8704/18 */ 952 953static const struct pnp_device_id pnp_dev_table[] = { 954 {"ITE8704", 0}, 955 {} 956}; 957 958MODULE_DEVICE_TABLE(pnp, pnp_dev_table); 959 960static struct pnp_driver it87_pnp_driver = { 961 .name = LIRC_DRIVER_NAME, 962 .id_table = pnp_dev_table, 963 .probe = it87_probe, 964}; 965 966module_init(lirc_it87_init); 967module_exit(lirc_it87_exit); 968 969MODULE_DESCRIPTION("LIRC driver for ITE IT8704/05/12/18/20 CIR port"); 970MODULE_AUTHOR("Hans-Gunter Lutke Uphues"); 971MODULE_LICENSE("GPL"); 972 973module_param(io, int, S_IRUGO); 974MODULE_PARM_DESC(io, "I/O base address (default: 0x310)"); 975 976module_param(irq, int, S_IRUGO); 977#ifdef LIRC_IT87_DIGIMATRIX 978MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 9)"); 979#else 980MODULE_PARM_DESC(irq, "Interrupt (1,3-12) (default: 7)"); 981#endif 982 983module_param(it87_enable_demodulator, bool, S_IRUGO); 984MODULE_PARM_DESC(it87_enable_demodulator, 985 "Receiver demodulator enable/disable (1/0), default: 0"); 986 987module_param(debug, bool, S_IRUGO | S_IWUSR); 988MODULE_PARM_DESC(debug, "Enable debugging messages"); 989 990module_param(digimatrix, bool, S_IRUGO | S_IWUSR); 991#ifdef LIRC_IT87_DIGIMATRIX 992MODULE_PARM_DESC(digimatrix, 993 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 1"); 994#else 995MODULE_PARM_DESC(digimatrix, 996 "Asus Digimatrix it87 compat. enable/disable (1/0), default: 0"); 997#endif 998 999 1000module_param(it87_freq, int, S_IRUGO); 1001#ifdef LIRC_IT87_DIGIMATRIX 1002MODULE_PARM_DESC(it87_freq, 1003 "Carrier demodulator frequency (kHz), (default: 36)"); 1004#else 1005MODULE_PARM_DESC(it87_freq, 1006 "Carrier demodulator frequency (kHz), (default: 38)"); 1007#endif 1008