• Home
  • History
  • Annotate
  • Line#
  • Navigate
  • Raw
  • Download
  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/s390/cio/
1/*
2 * linux/drivers/s390/cio/qdio.h
3 *
4 * Copyright 2000,2009 IBM Corp.
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
6 *	      Jan Glauber <jang@linux.vnet.ibm.com>
7 */
8#ifndef _CIO_QDIO_H
9#define _CIO_QDIO_H
10
11#include <asm/page.h>
12#include <asm/schid.h>
13#include <asm/debug.h>
14#include "chsc.h"
15
16#define QDIO_BUSY_BIT_PATIENCE		(100 << 12)	/* 100 microseconds */
17#define QDIO_INPUT_THRESHOLD		(500 << 12)	/* 500 microseconds */
18
19/*
20 * if an asynchronous HiperSockets queue runs full, the 10 seconds timer wait
21 * till next initiative to give transmitted skbs back to the stack is too long.
22 * Therefore polling is started in case of multicast queue is filled more
23 * than 50 percent.
24 */
25#define QDIO_IQDIO_POLL_LVL		65	/* HS multicast queue */
26
27enum qdio_irq_states {
28	QDIO_IRQ_STATE_INACTIVE,
29	QDIO_IRQ_STATE_ESTABLISHED,
30	QDIO_IRQ_STATE_ACTIVE,
31	QDIO_IRQ_STATE_STOPPED,
32	QDIO_IRQ_STATE_CLEANUP,
33	QDIO_IRQ_STATE_ERR,
34	NR_QDIO_IRQ_STATES,
35};
36
37/* used as intparm in do_IO */
38#define QDIO_DOING_ESTABLISH	1
39#define QDIO_DOING_ACTIVATE	2
40#define QDIO_DOING_CLEANUP	3
41
42#define SLSB_STATE_NOT_INIT	0x0
43#define SLSB_STATE_EMPTY	0x1
44#define SLSB_STATE_PRIMED	0x2
45#define SLSB_STATE_HALTED	0xe
46#define SLSB_STATE_ERROR	0xf
47#define SLSB_TYPE_INPUT		0x0
48#define SLSB_TYPE_OUTPUT	0x20
49#define SLSB_OWNER_PROG		0x80
50#define SLSB_OWNER_CU		0x40
51
52#define SLSB_P_INPUT_NOT_INIT	\
53	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT)  /* 0x80 */
54#define SLSB_P_INPUT_ACK	\
55	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)	   /* 0x81 */
56#define SLSB_CU_INPUT_EMPTY	\
57	(SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)	   /* 0x41 */
58#define SLSB_P_INPUT_PRIMED	\
59	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED)	   /* 0x82 */
60#define SLSB_P_INPUT_HALTED	\
61	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED)	   /* 0x8e */
62#define SLSB_P_INPUT_ERROR	\
63	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR)	   /* 0x8f */
64#define SLSB_P_OUTPUT_NOT_INIT	\
65	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
66#define SLSB_P_OUTPUT_EMPTY	\
67	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY)	   /* 0xa1 */
68#define SLSB_CU_OUTPUT_PRIMED	\
69	(SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED)	   /* 0x62 */
70#define SLSB_P_OUTPUT_HALTED	\
71	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED)   /* 0xae */
72#define SLSB_P_OUTPUT_ERROR	\
73	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR)	   /* 0xaf */
74
75#define SLSB_ERROR_DURING_LOOKUP  0xff
76
77/* additional CIWs returned by extended Sense-ID */
78#define CIW_TYPE_EQUEUE			0x3 /* establish QDIO queues */
79#define CIW_TYPE_AQUEUE			0x4 /* activate QDIO queues */
80
81/* flags for st qdio sch data */
82#define CHSC_FLAG_QDIO_CAPABILITY	0x80
83#define CHSC_FLAG_VALIDITY		0x40
84
85/* qdio adapter-characteristics-1 flag */
86#define AC1_SIGA_INPUT_NEEDED		0x40	/* process input queues */
87#define AC1_SIGA_OUTPUT_NEEDED		0x20	/* process output queues */
88#define AC1_SIGA_SYNC_NEEDED		0x10	/* ask hypervisor to sync */
89#define AC1_AUTOMATIC_SYNC_ON_THININT	0x08	/* set by hypervisor */
90#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI	0x04	/* set by hypervisor */
91#define AC1_SC_QEBSM_AVAILABLE		0x02	/* available for subchannel */
92#define AC1_SC_QEBSM_ENABLED		0x01	/* enabled for subchannel */
93
94/* SIGA flags */
95#define QDIO_SIGA_WRITE		0x00
96#define QDIO_SIGA_READ		0x01
97#define QDIO_SIGA_SYNC		0x02
98#define QDIO_SIGA_QEBSM_FLAG	0x80
99
100#ifdef CONFIG_64BIT
101static inline int do_sqbs(u64 token, unsigned char state, int queue,
102			  int *start, int *count)
103{
104	register unsigned long _ccq asm ("0") = *count;
105	register unsigned long _token asm ("1") = token;
106	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
107
108	asm volatile(
109		"	.insn	rsy,0xeb000000008A,%1,0,0(%2)"
110		: "+d" (_ccq), "+d" (_queuestart)
111		: "d" ((unsigned long)state), "d" (_token)
112		: "memory", "cc");
113	*count = _ccq & 0xff;
114	*start = _queuestart & 0xff;
115
116	return (_ccq >> 32) & 0xff;
117}
118
119static inline int do_eqbs(u64 token, unsigned char *state, int queue,
120			  int *start, int *count, int ack)
121{
122	register unsigned long _ccq asm ("0") = *count;
123	register unsigned long _token asm ("1") = token;
124	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
125	unsigned long _state = (unsigned long)ack << 63;
126
127	asm volatile(
128		"	.insn	rrf,0xB99c0000,%1,%2,0,0"
129		: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
130		: "d" (_token)
131		: "memory", "cc");
132	*count = _ccq & 0xff;
133	*start = _queuestart & 0xff;
134	*state = _state & 0xff;
135
136	return (_ccq >> 32) & 0xff;
137}
138#else
139static inline int do_sqbs(u64 token, unsigned char state, int queue,
140			  int *start, int *count) { return 0; }
141static inline int do_eqbs(u64 token, unsigned char *state, int queue,
142			  int *start, int *count, int ack) { return 0; }
143#endif /* CONFIG_64BIT */
144
145struct qdio_irq;
146
147struct siga_flag {
148	u8 input:1;
149	u8 output:1;
150	u8 sync:1;
151	u8 no_sync_ti:1;
152	u8 no_sync_out_ti:1;
153	u8 no_sync_out_pci:1;
154	u8:2;
155} __attribute__ ((packed));
156
157struct chsc_ssqd_area {
158	struct chsc_header request;
159	u16:10;
160	u8 ssid:2;
161	u8 fmt:4;
162	u16 first_sch;
163	u16:16;
164	u16 last_sch;
165	u32:32;
166	struct chsc_header response;
167	u32:32;
168	struct qdio_ssqd_desc qdio_ssqd;
169} __attribute__ ((packed));
170
171struct scssc_area {
172	struct chsc_header request;
173	u16 operation_code;
174	u16:16;
175	u32:32;
176	u32:32;
177	u64 summary_indicator_addr;
178	u64 subchannel_indicator_addr;
179	u32 ks:4;
180	u32 kc:4;
181	u32:21;
182	u32 isc:3;
183	u32 word_with_d_bit;
184	u32:32;
185	struct subchannel_id schid;
186	u32 reserved[1004];
187	struct chsc_header response;
188	u32:32;
189} __attribute__ ((packed));
190
191struct qdio_dev_perf_stat {
192	unsigned int adapter_int;
193	unsigned int qdio_int;
194	unsigned int pci_request_int;
195
196	unsigned int tasklet_inbound;
197	unsigned int tasklet_inbound_resched;
198	unsigned int tasklet_inbound_resched2;
199	unsigned int tasklet_outbound;
200
201	unsigned int siga_read;
202	unsigned int siga_write;
203	unsigned int siga_sync;
204
205	unsigned int inbound_call;
206	unsigned int inbound_handler;
207	unsigned int stop_polling;
208	unsigned int inbound_queue_full;
209	unsigned int outbound_call;
210	unsigned int outbound_handler;
211	unsigned int fast_requeue;
212	unsigned int target_full;
213	unsigned int eqbs;
214	unsigned int eqbs_partial;
215	unsigned int sqbs;
216	unsigned int sqbs_partial;
217} ____cacheline_aligned;
218
219struct qdio_queue_perf_stat {
220	/*
221	 * Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128.
222	 * Since max. 127 SBALs are scanned reuse entry for 128 as queue full
223	 * aka 127 SBALs found.
224	 */
225	unsigned int nr_sbals[8];
226	unsigned int nr_sbal_error;
227	unsigned int nr_sbal_nop;
228	unsigned int nr_sbal_total;
229};
230
231struct qdio_input_q {
232	/* input buffer acknowledgement flag */
233	int polling;
234	/* first ACK'ed buffer */
235	int ack_start;
236	/* how much sbals are acknowledged with qebsm */
237	int ack_count;
238	/* last time of noticing incoming data */
239	u64 timestamp;
240};
241
242struct qdio_output_q {
243	/* PCIs are enabled for the queue */
244	int pci_out_enabled;
245	/* IQDIO: output multiple buffers (enhanced SIGA) */
246	int use_enh_siga;
247	/* timer to check for more outbound work */
248	struct timer_list timer;
249};
250
251/*
252 * Note on cache alignment: grouped slsb and write mostly data at the beginning
253 * sbal[] is read-only and starts on a new cacheline followed by read mostly.
254 */
255struct qdio_q {
256	struct slsb slsb;
257
258	union {
259		struct qdio_input_q in;
260		struct qdio_output_q out;
261	} u;
262
263	/*
264	 * inbound: next buffer the program should check for
265	 * outbound: next buffer to check if adapter processed it
266	 */
267	int first_to_check;
268
269	/* first_to_check of the last time */
270	int last_move;
271
272	/* beginning position for calling the program */
273	int first_to_kick;
274
275	/* number of buffers in use by the adapter */
276	atomic_t nr_buf_used;
277
278	/* error condition during a data transfer */
279	unsigned int qdio_error;
280
281	struct tasklet_struct tasklet;
282	struct qdio_queue_perf_stat q_stats;
283
284	struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
285
286	/* queue number */
287	int nr;
288
289	/* bitmask of queue number */
290	int mask;
291
292	/* input or output queue */
293	int is_input_q;
294
295	/* list of thinint input queues */
296	struct list_head entry;
297
298	/* upper-layer program handler */
299	qdio_handler_t (*handler);
300
301	struct dentry *debugfs_q;
302	struct qdio_irq *irq_ptr;
303	struct sl *sl;
304	/*
305	 * A page is allocated under this pointer and used for slib and sl.
306	 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
307	 */
308	struct slib *slib;
309} __attribute__ ((aligned(256)));
310
311struct qdio_irq {
312	struct qib qib;
313	u32 *dsci;		/* address of device state change indicator */
314	struct ccw_device *cdev;
315	struct dentry *debugfs_dev;
316	struct dentry *debugfs_perf;
317
318	unsigned long int_parm;
319	struct subchannel_id schid;
320	unsigned long sch_token;	/* QEBSM facility */
321
322	enum qdio_irq_states state;
323
324	struct siga_flag siga_flag;	/* siga sync information from qdioac */
325
326	int nr_input_qs;
327	int nr_output_qs;
328
329	struct ccw1 ccw;
330	struct ciw equeue;
331	struct ciw aqueue;
332
333	struct qdio_ssqd_desc ssqd_desc;
334	void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
335
336	int perf_stat_enabled;
337
338	struct qdr *qdr;
339	unsigned long chsc_page;
340
341	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
342	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
343
344	debug_info_t *debug_area;
345	struct mutex setup_mutex;
346	struct qdio_dev_perf_stat perf_stat;
347};
348
349/* helper functions */
350#define queue_type(q)	q->irq_ptr->qib.qfmt
351#define SCH_NO(q)	(q->irq_ptr->schid.sch_no)
352
353#define is_thinint_irq(irq) \
354	(irq->qib.qfmt == QDIO_IQDIO_QFMT || \
355	 css_general_characteristics.aif_osa)
356
357#define qperf(__qdev, __attr)	((__qdev)->perf_stat.(__attr))
358
359#define qperf_inc(__q, __attr)						\
360({									\
361	struct qdio_irq *qdev = (__q)->irq_ptr;				\
362	if (qdev->perf_stat_enabled)					\
363		(qdev->perf_stat.__attr)++;				\
364})
365
366static inline void account_sbals_error(struct qdio_q *q, int count)
367{
368	q->q_stats.nr_sbal_error += count;
369	q->q_stats.nr_sbal_total += count;
370}
371
372/* the highest iqdio queue is used for multicast */
373static inline int multicast_outbound(struct qdio_q *q)
374{
375	return (q->irq_ptr->nr_output_qs > 1) &&
376	       (q->nr == q->irq_ptr->nr_output_qs - 1);
377}
378
379#define pci_out_supported(q) \
380	(q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
381#define is_qebsm(q)			(q->irq_ptr->sch_token != 0)
382
383#define need_siga_sync_thinint(q)	(!q->irq_ptr->siga_flag.no_sync_ti)
384#define need_siga_sync_out_thinint(q)	(!q->irq_ptr->siga_flag.no_sync_out_ti)
385#define need_siga_in(q)			(q->irq_ptr->siga_flag.input)
386#define need_siga_out(q)		(q->irq_ptr->siga_flag.output)
387#define need_siga_sync(q)		(q->irq_ptr->siga_flag.sync)
388#define siga_syncs_out_pci(q)		(q->irq_ptr->siga_flag.no_sync_out_pci)
389
390#define for_each_input_queue(irq_ptr, q, i)	\
391	for (i = 0, q = irq_ptr->input_qs[0];	\
392		i < irq_ptr->nr_input_qs;	\
393		q = irq_ptr->input_qs[++i])
394#define for_each_output_queue(irq_ptr, q, i)	\
395	for (i = 0, q = irq_ptr->output_qs[0];	\
396		i < irq_ptr->nr_output_qs;	\
397		q = irq_ptr->output_qs[++i])
398
399#define prev_buf(bufnr)	\
400	((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK)
401#define next_buf(bufnr)	\
402	((bufnr + 1) & QDIO_MAX_BUFFERS_MASK)
403#define add_buf(bufnr, inc) \
404	((bufnr + inc) & QDIO_MAX_BUFFERS_MASK)
405#define sub_buf(bufnr, dec) \
406	((bufnr - dec) & QDIO_MAX_BUFFERS_MASK)
407
408/* prototypes for thin interrupt */
409void qdio_setup_thinint(struct qdio_irq *irq_ptr);
410int qdio_establish_thinint(struct qdio_irq *irq_ptr);
411void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
412void tiqdio_add_input_queues(struct qdio_irq *irq_ptr);
413void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr);
414void tiqdio_inbound_processing(unsigned long q);
415int tiqdio_allocate_memory(void);
416void tiqdio_free_memory(void);
417int tiqdio_register_thinints(void);
418void tiqdio_unregister_thinints(void);
419
420/* prototypes for setup */
421void qdio_inbound_processing(unsigned long data);
422void qdio_outbound_processing(unsigned long data);
423void qdio_outbound_timer(unsigned long data);
424void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
425		      struct irb *irb);
426int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
427		     int nr_output_qs);
428void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
429int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
430			struct subchannel_id *schid,
431			struct qdio_ssqd_desc *data);
432int qdio_setup_irq(struct qdio_initialize *init_data);
433void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
434				struct ccw_device *cdev);
435void qdio_release_memory(struct qdio_irq *irq_ptr);
436int qdio_setup_create_sysfs(struct ccw_device *cdev);
437void qdio_setup_destroy_sysfs(struct ccw_device *cdev);
438int qdio_setup_init(void);
439void qdio_setup_exit(void);
440
441int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
442			unsigned char *state);
443#endif /* _CIO_QDIO_H */
444