1/* 2 * Linux device driver for RTL8187 3 * 4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net> 5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it> 6 * 7 * Based on the r8187 driver, which is: 8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al. 9 * 10 * The driver was extended to the RTL8187B in 2008 by: 11 * Herton Ronaldo Krzesinski <herton@mandriva.com.br> 12 * Hin-Tak Leung <htl10@users.sourceforge.net> 13 * Larry Finger <Larry.Finger@lwfinger.net> 14 * 15 * Magic delays and register offsets below are taken from the original 16 * r8187 driver sources. Thanks to Realtek for their support! 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License version 2 as 20 * published by the Free Software Foundation. 21 */ 22 23#include <linux/init.h> 24#include <linux/usb.h> 25#include <linux/slab.h> 26#include <linux/delay.h> 27#include <linux/etherdevice.h> 28#include <linux/eeprom_93cx6.h> 29#include <net/mac80211.h> 30 31#include "rtl8187.h" 32#include "rtl8187_rtl8225.h" 33#ifdef CONFIG_RTL8187_LEDS 34#include "rtl8187_leds.h" 35#endif 36#include "rtl8187_rfkill.h" 37 38MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>"); 39MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>"); 40MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>"); 41MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>"); 42MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>"); 43MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver"); 44MODULE_LICENSE("GPL"); 45 46static struct usb_device_id rtl8187_table[] __devinitdata = { 47 /* Asus */ 48 {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187}, 49 /* Belkin */ 50 {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B}, 51 /* Realtek */ 52 {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187}, 53 {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B}, 54 {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B}, 55 {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B}, 56 /* Surecom */ 57 {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187}, 58 /* Logitech */ 59 {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187}, 60 /* Netgear */ 61 {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187}, 62 {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187}, 63 {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B}, 64 /* HP */ 65 {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187}, 66 /* Sitecom */ 67 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, 68 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, 69 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B}, 70 /* Sphairon Access Systems GmbH */ 71 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, 72 /* Dick Smith Electronics */ 73 {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187}, 74 /* Abocom */ 75 {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187}, 76 /* Qcom */ 77 {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187}, 78 /* AirLive */ 79 {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187}, 80 /* Linksys */ 81 {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B}, 82 {} 83}; 84 85MODULE_DEVICE_TABLE(usb, rtl8187_table); 86 87static const struct ieee80211_rate rtl818x_rates[] = { 88 { .bitrate = 10, .hw_value = 0, }, 89 { .bitrate = 20, .hw_value = 1, }, 90 { .bitrate = 55, .hw_value = 2, }, 91 { .bitrate = 110, .hw_value = 3, }, 92 { .bitrate = 60, .hw_value = 4, }, 93 { .bitrate = 90, .hw_value = 5, }, 94 { .bitrate = 120, .hw_value = 6, }, 95 { .bitrate = 180, .hw_value = 7, }, 96 { .bitrate = 240, .hw_value = 8, }, 97 { .bitrate = 360, .hw_value = 9, }, 98 { .bitrate = 480, .hw_value = 10, }, 99 { .bitrate = 540, .hw_value = 11, }, 100}; 101 102static const struct ieee80211_channel rtl818x_channels[] = { 103 { .center_freq = 2412 }, 104 { .center_freq = 2417 }, 105 { .center_freq = 2422 }, 106 { .center_freq = 2427 }, 107 { .center_freq = 2432 }, 108 { .center_freq = 2437 }, 109 { .center_freq = 2442 }, 110 { .center_freq = 2447 }, 111 { .center_freq = 2452 }, 112 { .center_freq = 2457 }, 113 { .center_freq = 2462 }, 114 { .center_freq = 2467 }, 115 { .center_freq = 2472 }, 116 { .center_freq = 2484 }, 117}; 118 119static void rtl8187_iowrite_async_cb(struct urb *urb) 120{ 121 kfree(urb->context); 122} 123 124static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr, 125 void *data, u16 len) 126{ 127 struct usb_ctrlrequest *dr; 128 struct urb *urb; 129 struct rtl8187_async_write_data { 130 u8 data[4]; 131 struct usb_ctrlrequest dr; 132 } *buf; 133 int rc; 134 135 buf = kmalloc(sizeof(*buf), GFP_ATOMIC); 136 if (!buf) 137 return; 138 139 urb = usb_alloc_urb(0, GFP_ATOMIC); 140 if (!urb) { 141 kfree(buf); 142 return; 143 } 144 145 dr = &buf->dr; 146 147 dr->bRequestType = RTL8187_REQT_WRITE; 148 dr->bRequest = RTL8187_REQ_SET_REG; 149 dr->wValue = addr; 150 dr->wIndex = 0; 151 dr->wLength = cpu_to_le16(len); 152 153 memcpy(buf, data, len); 154 155 usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0), 156 (unsigned char *)dr, buf, len, 157 rtl8187_iowrite_async_cb, buf); 158 usb_anchor_urb(urb, &priv->anchored); 159 rc = usb_submit_urb(urb, GFP_ATOMIC); 160 if (rc < 0) { 161 kfree(buf); 162 usb_unanchor_urb(urb); 163 } 164 usb_free_urb(urb); 165} 166 167static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv, 168 __le32 *addr, u32 val) 169{ 170 __le32 buf = cpu_to_le32(val); 171 172 rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr), 173 &buf, sizeof(buf)); 174} 175 176void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) 177{ 178 struct rtl8187_priv *priv = dev->priv; 179 180 data <<= 8; 181 data |= addr | 0x80; 182 183 rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF); 184 rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF); 185 rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF); 186 rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF); 187} 188 189static void rtl8187_tx_cb(struct urb *urb) 190{ 191 struct sk_buff *skb = (struct sk_buff *)urb->context; 192 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 193 struct ieee80211_hw *hw = info->rate_driver_data[0]; 194 struct rtl8187_priv *priv = hw->priv; 195 196 skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) : 197 sizeof(struct rtl8187_tx_hdr)); 198 ieee80211_tx_info_clear_status(info); 199 200 if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 201 if (priv->is_rtl8187b) { 202 skb_queue_tail(&priv->b_tx_status.queue, skb); 203 204 /* queue is "full", discard last items */ 205 while (skb_queue_len(&priv->b_tx_status.queue) > 5) { 206 struct sk_buff *old_skb; 207 208 dev_dbg(&priv->udev->dev, 209 "transmit status queue full\n"); 210 211 old_skb = skb_dequeue(&priv->b_tx_status.queue); 212 ieee80211_tx_status_irqsafe(hw, old_skb); 213 } 214 return; 215 } else { 216 info->flags |= IEEE80211_TX_STAT_ACK; 217 } 218 } 219 if (priv->is_rtl8187b) 220 ieee80211_tx_status_irqsafe(hw, skb); 221 else { 222 /* Retry information for the RTI8187 is only available by 223 * reading a register in the device. We are in interrupt mode 224 * here, thus queue the skb and finish on a work queue. */ 225 skb_queue_tail(&priv->b_tx_status.queue, skb); 226 ieee80211_queue_delayed_work(hw, &priv->work, 0); 227 } 228} 229 230static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb) 231{ 232 struct rtl8187_priv *priv = dev->priv; 233 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 234 unsigned int ep; 235 void *buf; 236 struct urb *urb; 237 __le16 rts_dur = 0; 238 u32 flags; 239 int rc; 240 241 urb = usb_alloc_urb(0, GFP_ATOMIC); 242 if (!urb) { 243 kfree_skb(skb); 244 return NETDEV_TX_OK; 245 } 246 247 flags = skb->len; 248 flags |= RTL818X_TX_DESC_FLAG_NO_ENC; 249 250 flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24; 251 if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control)) 252 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG; 253 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) { 254 flags |= RTL818X_TX_DESC_FLAG_RTS; 255 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 256 rts_dur = ieee80211_rts_duration(dev, priv->vif, 257 skb->len, info); 258 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 259 flags |= RTL818X_TX_DESC_FLAG_CTS; 260 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 261 } 262 263 if (!priv->is_rtl8187b) { 264 struct rtl8187_tx_hdr *hdr = 265 (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr)); 266 hdr->flags = cpu_to_le32(flags); 267 hdr->len = 0; 268 hdr->rts_duration = rts_dur; 269 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); 270 buf = hdr; 271 272 ep = 2; 273 } else { 274 /* fc needs to be calculated before skb_push() */ 275 unsigned int epmap[4] = { 6, 7, 5, 4 }; 276 struct ieee80211_hdr *tx_hdr = 277 (struct ieee80211_hdr *)(skb->data); 278 u16 fc = le16_to_cpu(tx_hdr->frame_control); 279 280 struct rtl8187b_tx_hdr *hdr = 281 (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr)); 282 struct ieee80211_rate *txrate = 283 ieee80211_get_tx_rate(dev, info); 284 memset(hdr, 0, sizeof(*hdr)); 285 hdr->flags = cpu_to_le32(flags); 286 hdr->rts_duration = rts_dur; 287 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8); 288 hdr->tx_duration = 289 ieee80211_generic_frame_duration(dev, priv->vif, 290 skb->len, txrate); 291 buf = hdr; 292 293 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) 294 ep = 12; 295 else 296 ep = epmap[skb_get_queue_mapping(skb)]; 297 } 298 299 info->rate_driver_data[0] = dev; 300 info->rate_driver_data[1] = urb; 301 302 usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep), 303 buf, skb->len, rtl8187_tx_cb, skb); 304 urb->transfer_flags |= URB_ZERO_PACKET; 305 usb_anchor_urb(urb, &priv->anchored); 306 rc = usb_submit_urb(urb, GFP_ATOMIC); 307 if (rc < 0) { 308 usb_unanchor_urb(urb); 309 kfree_skb(skb); 310 } 311 usb_free_urb(urb); 312 313 return NETDEV_TX_OK; 314} 315 316static void rtl8187_rx_cb(struct urb *urb) 317{ 318 struct sk_buff *skb = (struct sk_buff *)urb->context; 319 struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb; 320 struct ieee80211_hw *dev = info->dev; 321 struct rtl8187_priv *priv = dev->priv; 322 struct ieee80211_rx_status rx_status = { 0 }; 323 int rate, signal; 324 u32 flags; 325 unsigned long f; 326 327 spin_lock_irqsave(&priv->rx_queue.lock, f); 328 __skb_unlink(skb, &priv->rx_queue); 329 spin_unlock_irqrestore(&priv->rx_queue.lock, f); 330 skb_put(skb, urb->actual_length); 331 332 if (unlikely(urb->status)) { 333 dev_kfree_skb_irq(skb); 334 return; 335 } 336 337 if (!priv->is_rtl8187b) { 338 struct rtl8187_rx_hdr *hdr = 339 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 340 flags = le32_to_cpu(hdr->flags); 341 /* As with the RTL8187B below, the AGC is used to calculate 342 * signal strength. In this case, the scaling 343 * constants are derived from the output of p54usb. 344 */ 345 signal = -4 - ((27 * hdr->agc) >> 6); 346 rx_status.antenna = (hdr->signal >> 7) & 1; 347 rx_status.mactime = le64_to_cpu(hdr->mac_time); 348 } else { 349 struct rtl8187b_rx_hdr *hdr = 350 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 351 /* The Realtek datasheet for the RTL8187B shows that the RX 352 * header contains the following quantities: signal quality, 353 * RSSI, AGC, the received power in dB, and the measured SNR. 354 * In testing, none of these quantities show qualitative 355 * agreement with AP signal strength, except for the AGC, 356 * which is inversely proportional to the strength of the 357 * signal. In the following, the signal strength 358 * is derived from the AGC. The arbitrary scaling constants 359 * are chosen to make the results close to the values obtained 360 * for a BCM4312 using b43 as the driver. The noise is ignored 361 * for now. 362 */ 363 flags = le32_to_cpu(hdr->flags); 364 signal = 14 - hdr->agc / 2; 365 rx_status.antenna = (hdr->rssi >> 7) & 1; 366 rx_status.mactime = le64_to_cpu(hdr->mac_time); 367 } 368 369 rx_status.signal = signal; 370 priv->signal = signal; 371 rate = (flags >> 20) & 0xF; 372 skb_trim(skb, flags & 0x0FFF); 373 rx_status.rate_idx = rate; 374 rx_status.freq = dev->conf.channel->center_freq; 375 rx_status.band = dev->conf.channel->band; 376 rx_status.flag |= RX_FLAG_TSFT; 377 if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR) 378 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 379 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 380 ieee80211_rx_irqsafe(dev, skb); 381 382 skb = dev_alloc_skb(RTL8187_MAX_RX); 383 if (unlikely(!skb)) { 384 /* TODO check rx queue length and refill *somewhere* */ 385 return; 386 } 387 388 info = (struct rtl8187_rx_info *)skb->cb; 389 info->urb = urb; 390 info->dev = dev; 391 urb->transfer_buffer = skb_tail_pointer(skb); 392 urb->context = skb; 393 skb_queue_tail(&priv->rx_queue, skb); 394 395 usb_anchor_urb(urb, &priv->anchored); 396 if (usb_submit_urb(urb, GFP_ATOMIC)) { 397 usb_unanchor_urb(urb); 398 skb_unlink(skb, &priv->rx_queue); 399 dev_kfree_skb_irq(skb); 400 } 401} 402 403static int rtl8187_init_urbs(struct ieee80211_hw *dev) 404{ 405 struct rtl8187_priv *priv = dev->priv; 406 struct urb *entry = NULL; 407 struct sk_buff *skb; 408 struct rtl8187_rx_info *info; 409 int ret = 0; 410 411 while (skb_queue_len(&priv->rx_queue) < 16) { 412 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL); 413 if (!skb) { 414 ret = -ENOMEM; 415 goto err; 416 } 417 entry = usb_alloc_urb(0, GFP_KERNEL); 418 if (!entry) { 419 ret = -ENOMEM; 420 goto err; 421 } 422 usb_fill_bulk_urb(entry, priv->udev, 423 usb_rcvbulkpipe(priv->udev, 424 priv->is_rtl8187b ? 3 : 1), 425 skb_tail_pointer(skb), 426 RTL8187_MAX_RX, rtl8187_rx_cb, skb); 427 info = (struct rtl8187_rx_info *)skb->cb; 428 info->urb = entry; 429 info->dev = dev; 430 skb_queue_tail(&priv->rx_queue, skb); 431 usb_anchor_urb(entry, &priv->anchored); 432 ret = usb_submit_urb(entry, GFP_KERNEL); 433 if (ret) { 434 skb_unlink(skb, &priv->rx_queue); 435 usb_unanchor_urb(entry); 436 goto err; 437 } 438 usb_free_urb(entry); 439 } 440 return ret; 441 442err: 443 usb_free_urb(entry); 444 kfree_skb(skb); 445 usb_kill_anchored_urbs(&priv->anchored); 446 return ret; 447} 448 449static void rtl8187b_status_cb(struct urb *urb) 450{ 451 struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context; 452 struct rtl8187_priv *priv = hw->priv; 453 u64 val; 454 unsigned int cmd_type; 455 456 if (unlikely(urb->status)) 457 return; 458 459 /* 460 * Read from status buffer: 461 * 462 * bits [30:31] = cmd type: 463 * - 0 indicates tx beacon interrupt 464 * - 1 indicates tx close descriptor 465 * 466 * In the case of tx beacon interrupt: 467 * [0:9] = Last Beacon CW 468 * [10:29] = reserved 469 * [30:31] = 00b 470 * [32:63] = Last Beacon TSF 471 * 472 * If it's tx close descriptor: 473 * [0:7] = Packet Retry Count 474 * [8:14] = RTS Retry Count 475 * [15] = TOK 476 * [16:27] = Sequence No 477 * [28] = LS 478 * [29] = FS 479 * [30:31] = 01b 480 * [32:47] = unused (reserved?) 481 * [48:63] = MAC Used Time 482 */ 483 val = le64_to_cpu(priv->b_tx_status.buf); 484 485 cmd_type = (val >> 30) & 0x3; 486 if (cmd_type == 1) { 487 unsigned int pkt_rc, seq_no; 488 bool tok; 489 struct sk_buff *skb; 490 struct ieee80211_hdr *ieee80211hdr; 491 unsigned long flags; 492 493 pkt_rc = val & 0xFF; 494 tok = val & (1 << 15); 495 seq_no = (val >> 16) & 0xFFF; 496 497 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags); 498 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) { 499 ieee80211hdr = (struct ieee80211_hdr *)skb->data; 500 501 if ((le16_to_cpu(ieee80211hdr->seq_ctrl) 502 & 0xFFF) == seq_no) 503 break; 504 } 505 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) { 506 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 507 508 __skb_unlink(skb, &priv->b_tx_status.queue); 509 if (tok) 510 info->flags |= IEEE80211_TX_STAT_ACK; 511 info->status.rates[0].count = pkt_rc + 1; 512 513 ieee80211_tx_status_irqsafe(hw, skb); 514 } 515 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags); 516 } 517 518 usb_anchor_urb(urb, &priv->anchored); 519 if (usb_submit_urb(urb, GFP_ATOMIC)) 520 usb_unanchor_urb(urb); 521} 522 523static int rtl8187b_init_status_urb(struct ieee80211_hw *dev) 524{ 525 struct rtl8187_priv *priv = dev->priv; 526 struct urb *entry; 527 int ret = 0; 528 529 entry = usb_alloc_urb(0, GFP_KERNEL); 530 if (!entry) 531 return -ENOMEM; 532 533 usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9), 534 &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf), 535 rtl8187b_status_cb, dev); 536 537 usb_anchor_urb(entry, &priv->anchored); 538 ret = usb_submit_urb(entry, GFP_KERNEL); 539 if (ret) 540 usb_unanchor_urb(entry); 541 usb_free_urb(entry); 542 543 return ret; 544} 545 546static int rtl8187_cmd_reset(struct ieee80211_hw *dev) 547{ 548 struct rtl8187_priv *priv = dev->priv; 549 u8 reg; 550 int i; 551 552 reg = rtl818x_ioread8(priv, &priv->map->CMD); 553 reg &= (1 << 1); 554 reg |= RTL818X_CMD_RESET; 555 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 556 557 i = 10; 558 do { 559 msleep(2); 560 if (!(rtl818x_ioread8(priv, &priv->map->CMD) & 561 RTL818X_CMD_RESET)) 562 break; 563 } while (--i); 564 565 if (!i) { 566 wiphy_err(dev->wiphy, "Reset timeout!\n"); 567 return -ETIMEDOUT; 568 } 569 570 /* reload registers from eeprom */ 571 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD); 572 573 i = 10; 574 do { 575 msleep(4); 576 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) & 577 RTL818X_EEPROM_CMD_CONFIG)) 578 break; 579 } while (--i); 580 581 if (!i) { 582 wiphy_err(dev->wiphy, "eeprom reset timeout!\n"); 583 return -ETIMEDOUT; 584 } 585 586 return 0; 587} 588 589static int rtl8187_init_hw(struct ieee80211_hw *dev) 590{ 591 struct rtl8187_priv *priv = dev->priv; 592 u8 reg; 593 int res; 594 595 /* reset */ 596 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 597 RTL818X_EEPROM_CMD_CONFIG); 598 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 599 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | 600 RTL818X_CONFIG3_ANAPARAM_WRITE); 601 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, 602 RTL8187_RTL8225_ANAPARAM_ON); 603 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, 604 RTL8187_RTL8225_ANAPARAM2_ON); 605 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & 606 ~RTL818X_CONFIG3_ANAPARAM_WRITE); 607 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 608 RTL818X_EEPROM_CMD_NORMAL); 609 610 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 611 612 msleep(200); 613 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10); 614 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11); 615 rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00); 616 msleep(200); 617 618 res = rtl8187_cmd_reset(dev); 619 if (res) 620 return res; 621 622 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 623 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 624 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 625 reg | RTL818X_CONFIG3_ANAPARAM_WRITE); 626 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, 627 RTL8187_RTL8225_ANAPARAM_ON); 628 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, 629 RTL8187_RTL8225_ANAPARAM2_ON); 630 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 631 reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); 632 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 633 634 /* setup card */ 635 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 636 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); 637 638 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 639 rtl818x_iowrite8(priv, &priv->map->GPIO0, 1); 640 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 641 642 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 643 644 rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF); 645 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 646 reg &= 0x3F; 647 reg |= 0x80; 648 rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg); 649 650 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 651 652 rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0); 653 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 654 rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0); 655 656 // TODO: set RESP_RATE and BRSR properly 657 rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0); 658 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 659 660 /* host_usb_init */ 661 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0); 662 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0); 663 reg = rtl818x_ioread8(priv, (u8 *)0xFE53); 664 rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7)); 665 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8)); 666 rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20); 667 rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 668 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80); 669 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80); 670 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80); 671 msleep(100); 672 673 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); 674 rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); 675 rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); 676 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 677 RTL818X_EEPROM_CMD_CONFIG); 678 rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); 679 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 680 RTL818X_EEPROM_CMD_NORMAL); 681 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7); 682 msleep(100); 683 684 priv->rf->init(dev); 685 686 rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3); 687 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; 688 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); 689 rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10); 690 rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80); 691 rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60); 692 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); 693 694 return 0; 695} 696 697static const u8 rtl8187b_reg_table[][3] = { 698 {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0}, 699 {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0}, 700 {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0}, 701 {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0}, 702 703 {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1}, 704 {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1}, 705 {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1}, 706 {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1}, 707 {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1}, 708 {0xF7, 0x07, 1}, {0xF8, 0x08, 1}, 709 710 {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2}, 711 {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2}, 712 {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2}, 713 {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2}, 714 {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2}, 715 {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2}, 716 {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2}, 717 {0x73, 0x9A, 2}, 718 719 {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0}, 720 {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, 721 {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0}, 722 {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, 723 {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x4C, 0x00, 2}, 724 725 {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0}, 726 {0x8F, 0x00, 0} 727}; 728 729static int rtl8187b_init_hw(struct ieee80211_hw *dev) 730{ 731 struct rtl8187_priv *priv = dev->priv; 732 int res, i; 733 u8 reg; 734 735 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 736 RTL818X_EEPROM_CMD_CONFIG); 737 738 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 739 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT; 740 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 741 rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, 742 RTL8187B_RTL8225_ANAPARAM2_ON); 743 rtl818x_iowrite32(priv, &priv->map->ANAPARAM, 744 RTL8187B_RTL8225_ANAPARAM_ON); 745 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, 746 RTL8187B_RTL8225_ANAPARAM3_ON); 747 748 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10); 749 reg = rtl818x_ioread8(priv, (u8 *)0xFF62); 750 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5)); 751 rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5)); 752 753 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 754 reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE; 755 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 756 757 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 758 RTL818X_EEPROM_CMD_NORMAL); 759 760 res = rtl8187_cmd_reset(dev); 761 if (res) 762 return res; 763 764 rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF); 765 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 766 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; 767 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 768 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 769 reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT | 770 RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; 771 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 772 773 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1); 774 775 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); 776 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); 777 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1); 778 779 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 780 RTL818X_EEPROM_CMD_CONFIG); 781 reg = rtl818x_ioread8(priv, &priv->map->CONFIG1); 782 rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80); 783 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 784 RTL818X_EEPROM_CMD_NORMAL); 785 786 rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0); 787 for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) { 788 rtl818x_iowrite8_idx(priv, 789 (u8 *)(uintptr_t) 790 (rtl8187b_reg_table[i][0] | 0xFF00), 791 rtl8187b_reg_table[i][1], 792 rtl8187b_reg_table[i][2]); 793 } 794 795 rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50); 796 rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0); 797 798 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1); 799 rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1); 800 rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1); 801 802 rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001); 803 804 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2); 805 806 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 807 RTL818X_EEPROM_CMD_CONFIG); 808 reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 809 reg |= RTL818X_CONFIG3_ANAPARAM_WRITE; 810 rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg); 811 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, 812 RTL818X_EEPROM_CMD_NORMAL); 813 814 rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); 815 rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488); 816 rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 817 msleep(100); 818 819 priv->rf->init(dev); 820 821 reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE; 822 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 823 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 824 825 rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4); 826 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00); 827 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); 828 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); 829 rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F); 830 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00); 831 rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01); 832 833 reg = rtl818x_ioread8(priv, (u8 *)0xFFDB); 834 rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2)); 835 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3); 836 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3); 837 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3); 838 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3); 839 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3); 840 rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3); 841 rtl818x_iowrite8(priv, (u8 *)0xFF61, 0); 842 rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1); 843 rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1); 844 rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10); 845 rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2); 846 847 rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B); 848 849 rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1); 850 851 priv->slot_time = 0x9; 852 priv->aifsn[0] = 2; /* AIFSN[AC_VO] */ 853 priv->aifsn[1] = 2; /* AIFSN[AC_VI] */ 854 priv->aifsn[2] = 7; /* AIFSN[AC_BK] */ 855 priv->aifsn[3] = 3; /* AIFSN[AC_BE] */ 856 rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0); 857 858 /* ENEDCA flag must always be set, transmit issues? */ 859 rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA); 860 861 return 0; 862} 863 864static void rtl8187_work(struct work_struct *work) 865{ 866 /* The RTL8187 returns the retry count through register 0xFFFA. In 867 * addition, it appears to be a cumulative retry count, not the 868 * value for the current TX packet. When multiple TX entries are 869 * queued, the retry count will be valid for the last one in the queue. 870 * The "error" should not matter for purposes of rate setting. */ 871 struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv, 872 work.work); 873 struct ieee80211_tx_info *info; 874 struct ieee80211_hw *dev = priv->dev; 875 static u16 retry; 876 u16 tmp; 877 878 mutex_lock(&priv->conf_mutex); 879 tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA); 880 while (skb_queue_len(&priv->b_tx_status.queue) > 0) { 881 struct sk_buff *old_skb; 882 883 old_skb = skb_dequeue(&priv->b_tx_status.queue); 884 info = IEEE80211_SKB_CB(old_skb); 885 info->status.rates[0].count = tmp - retry + 1; 886 ieee80211_tx_status_irqsafe(dev, old_skb); 887 } 888 retry = tmp; 889 mutex_unlock(&priv->conf_mutex); 890} 891 892static int rtl8187_start(struct ieee80211_hw *dev) 893{ 894 struct rtl8187_priv *priv = dev->priv; 895 u32 reg; 896 int ret; 897 898 mutex_lock(&priv->conf_mutex); 899 900 ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) : 901 rtl8187b_init_hw(dev); 902 if (ret) 903 goto rtl8187_start_exit; 904 905 init_usb_anchor(&priv->anchored); 906 priv->dev = dev; 907 908 if (priv->is_rtl8187b) { 909 reg = RTL818X_RX_CONF_MGMT | 910 RTL818X_RX_CONF_DATA | 911 RTL818X_RX_CONF_BROADCAST | 912 RTL818X_RX_CONF_NICMAC | 913 RTL818X_RX_CONF_BSSID | 914 (7 << 13 /* RX FIFO threshold NONE */) | 915 (7 << 10 /* MAX RX DMA */) | 916 RTL818X_RX_CONF_RX_AUTORESETPHY | 917 RTL818X_RX_CONF_ONLYERLPKT | 918 RTL818X_RX_CONF_MULTICAST; 919 priv->rx_conf = reg; 920 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 921 922 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 923 RTL818X_TX_CONF_HW_SEQNUM | 924 RTL818X_TX_CONF_DISREQQSIZE | 925 (7 << 8 /* short retry limit */) | 926 (7 << 0 /* long retry limit */) | 927 (7 << 21 /* MAX TX DMA */)); 928 rtl8187_init_urbs(dev); 929 rtl8187b_init_status_urb(dev); 930 goto rtl8187_start_exit; 931 } 932 933 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF); 934 935 rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0); 936 rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0); 937 938 rtl8187_init_urbs(dev); 939 940 reg = RTL818X_RX_CONF_ONLYERLPKT | 941 RTL818X_RX_CONF_RX_AUTORESETPHY | 942 RTL818X_RX_CONF_BSSID | 943 RTL818X_RX_CONF_MGMT | 944 RTL818X_RX_CONF_DATA | 945 (7 << 13 /* RX FIFO threshold NONE */) | 946 (7 << 10 /* MAX RX DMA */) | 947 RTL818X_RX_CONF_BROADCAST | 948 RTL818X_RX_CONF_NICMAC; 949 950 priv->rx_conf = reg; 951 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg); 952 953 reg = rtl818x_ioread8(priv, &priv->map->CW_CONF); 954 reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT; 955 reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT; 956 rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg); 957 958 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL); 959 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT; 960 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT; 961 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT; 962 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg); 963 964 reg = RTL818X_TX_CONF_CW_MIN | 965 (7 << 21 /* MAX TX DMA */) | 966 RTL818X_TX_CONF_NO_ICV; 967 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 968 969 reg = rtl818x_ioread8(priv, &priv->map->CMD); 970 reg |= RTL818X_CMD_TX_ENABLE; 971 reg |= RTL818X_CMD_RX_ENABLE; 972 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 973 INIT_DELAYED_WORK(&priv->work, rtl8187_work); 974 975rtl8187_start_exit: 976 mutex_unlock(&priv->conf_mutex); 977 return ret; 978} 979 980static void rtl8187_stop(struct ieee80211_hw *dev) 981{ 982 struct rtl8187_priv *priv = dev->priv; 983 struct sk_buff *skb; 984 u32 reg; 985 986 mutex_lock(&priv->conf_mutex); 987 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 988 989 reg = rtl818x_ioread8(priv, &priv->map->CMD); 990 reg &= ~RTL818X_CMD_TX_ENABLE; 991 reg &= ~RTL818X_CMD_RX_ENABLE; 992 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 993 994 priv->rf->stop(dev); 995 996 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 997 reg = rtl818x_ioread8(priv, &priv->map->CONFIG4); 998 rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF); 999 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1000 1001 while ((skb = skb_dequeue(&priv->b_tx_status.queue))) 1002 dev_kfree_skb_any(skb); 1003 1004 usb_kill_anchored_urbs(&priv->anchored); 1005 mutex_unlock(&priv->conf_mutex); 1006 1007 if (!priv->is_rtl8187b) 1008 cancel_delayed_work_sync(&priv->work); 1009} 1010 1011static int rtl8187_add_interface(struct ieee80211_hw *dev, 1012 struct ieee80211_vif *vif) 1013{ 1014 struct rtl8187_priv *priv = dev->priv; 1015 int i; 1016 int ret = -EOPNOTSUPP; 1017 1018 mutex_lock(&priv->conf_mutex); 1019 if (priv->vif) 1020 goto exit; 1021 1022 switch (vif->type) { 1023 case NL80211_IFTYPE_STATION: 1024 break; 1025 default: 1026 goto exit; 1027 } 1028 1029 ret = 0; 1030 priv->vif = vif; 1031 1032 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1033 for (i = 0; i < ETH_ALEN; i++) 1034 rtl818x_iowrite8(priv, &priv->map->MAC[i], 1035 ((u8 *)vif->addr)[i]); 1036 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1037 1038exit: 1039 mutex_unlock(&priv->conf_mutex); 1040 return ret; 1041} 1042 1043static void rtl8187_remove_interface(struct ieee80211_hw *dev, 1044 struct ieee80211_vif *vif) 1045{ 1046 struct rtl8187_priv *priv = dev->priv; 1047 mutex_lock(&priv->conf_mutex); 1048 priv->vif = NULL; 1049 mutex_unlock(&priv->conf_mutex); 1050} 1051 1052static int rtl8187_config(struct ieee80211_hw *dev, u32 changed) 1053{ 1054 struct rtl8187_priv *priv = dev->priv; 1055 struct ieee80211_conf *conf = &dev->conf; 1056 u32 reg; 1057 1058 mutex_lock(&priv->conf_mutex); 1059 reg = rtl818x_ioread32(priv, &priv->map->TX_CONF); 1060 /* Enable TX loopback on MAC level to avoid TX during channel 1061 * changes, as this has be seen to causes problems and the 1062 * card will stop work until next reset 1063 */ 1064 rtl818x_iowrite32(priv, &priv->map->TX_CONF, 1065 reg | RTL818X_TX_CONF_LOOPBACK_MAC); 1066 priv->rf->set_chan(dev, conf); 1067 msleep(10); 1068 rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg); 1069 1070 rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2); 1071 rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100); 1072 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100); 1073 rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100); 1074 mutex_unlock(&priv->conf_mutex); 1075 return 0; 1076} 1077 1078/* 1079 * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for 1080 * example. Thus we have to use raw values for AC_*_PARAM register addresses. 1081 */ 1082static __le32 *rtl8187b_ac_addr[4] = { 1083 (__le32 *) 0xFFF0, /* AC_VO */ 1084 (__le32 *) 0xFFF4, /* AC_VI */ 1085 (__le32 *) 0xFFFC, /* AC_BK */ 1086 (__le32 *) 0xFFF8, /* AC_BE */ 1087}; 1088 1089#define SIFS_TIME 0xa 1090 1091static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot, 1092 bool use_short_preamble) 1093{ 1094 if (priv->is_rtl8187b) { 1095 u8 difs, eifs; 1096 u16 ack_timeout; 1097 int queue; 1098 1099 if (use_short_slot) { 1100 priv->slot_time = 0x9; 1101 difs = 0x1c; 1102 eifs = 0x53; 1103 } else { 1104 priv->slot_time = 0x14; 1105 difs = 0x32; 1106 eifs = 0x5b; 1107 } 1108 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 1109 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time); 1110 rtl818x_iowrite8(priv, &priv->map->DIFS, difs); 1111 1112 /* 1113 * BRSR+1 on 8187B is in fact EIFS register 1114 * Value in units of 4 us 1115 */ 1116 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs); 1117 1118 /* 1119 * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout 1120 * register. In units of 4 us like eifs register 1121 * ack_timeout = ack duration + plcp + difs + preamble 1122 */ 1123 ack_timeout = 112 + 48 + difs; 1124 if (use_short_preamble) 1125 ack_timeout += 72; 1126 else 1127 ack_timeout += 144; 1128 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER, 1129 DIV_ROUND_UP(ack_timeout, 4)); 1130 1131 for (queue = 0; queue < 4; queue++) 1132 rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue], 1133 priv->aifsn[queue] * priv->slot_time + 1134 SIFS_TIME); 1135 } else { 1136 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22); 1137 if (use_short_slot) { 1138 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9); 1139 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14); 1140 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14); 1141 } else { 1142 rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14); 1143 rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24); 1144 rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24); 1145 } 1146 } 1147} 1148 1149static void rtl8187_bss_info_changed(struct ieee80211_hw *dev, 1150 struct ieee80211_vif *vif, 1151 struct ieee80211_bss_conf *info, 1152 u32 changed) 1153{ 1154 struct rtl8187_priv *priv = dev->priv; 1155 int i; 1156 u8 reg; 1157 1158 if (changed & BSS_CHANGED_BSSID) { 1159 mutex_lock(&priv->conf_mutex); 1160 for (i = 0; i < ETH_ALEN; i++) 1161 rtl818x_iowrite8(priv, &priv->map->BSSID[i], 1162 info->bssid[i]); 1163 1164 if (priv->is_rtl8187b) 1165 reg = RTL818X_MSR_ENEDCA; 1166 else 1167 reg = 0; 1168 1169 if (is_valid_ether_addr(info->bssid)) { 1170 reg |= RTL818X_MSR_INFRA; 1171 rtl818x_iowrite8(priv, &priv->map->MSR, reg); 1172 } else { 1173 reg |= RTL818X_MSR_NO_LINK; 1174 rtl818x_iowrite8(priv, &priv->map->MSR, reg); 1175 } 1176 1177 mutex_unlock(&priv->conf_mutex); 1178 } 1179 1180 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) 1181 rtl8187_conf_erp(priv, info->use_short_slot, 1182 info->use_short_preamble); 1183} 1184 1185static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev, 1186 struct netdev_hw_addr_list *mc_list) 1187{ 1188 return netdev_hw_addr_list_count(mc_list); 1189} 1190 1191static void rtl8187_configure_filter(struct ieee80211_hw *dev, 1192 unsigned int changed_flags, 1193 unsigned int *total_flags, 1194 u64 multicast) 1195{ 1196 struct rtl8187_priv *priv = dev->priv; 1197 1198 if (changed_flags & FIF_FCSFAIL) 1199 priv->rx_conf ^= RTL818X_RX_CONF_FCS; 1200 if (changed_flags & FIF_CONTROL) 1201 priv->rx_conf ^= RTL818X_RX_CONF_CTRL; 1202 if (changed_flags & FIF_OTHER_BSS) 1203 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR; 1204 if (*total_flags & FIF_ALLMULTI || multicast > 0) 1205 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST; 1206 else 1207 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST; 1208 1209 *total_flags = 0; 1210 1211 if (priv->rx_conf & RTL818X_RX_CONF_FCS) 1212 *total_flags |= FIF_FCSFAIL; 1213 if (priv->rx_conf & RTL818X_RX_CONF_CTRL) 1214 *total_flags |= FIF_CONTROL; 1215 if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) 1216 *total_flags |= FIF_OTHER_BSS; 1217 if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST) 1218 *total_flags |= FIF_ALLMULTI; 1219 1220 rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf); 1221} 1222 1223static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue, 1224 const struct ieee80211_tx_queue_params *params) 1225{ 1226 struct rtl8187_priv *priv = dev->priv; 1227 u8 cw_min, cw_max; 1228 1229 if (queue > 3) 1230 return -EINVAL; 1231 1232 cw_min = fls(params->cw_min); 1233 cw_max = fls(params->cw_max); 1234 1235 if (priv->is_rtl8187b) { 1236 priv->aifsn[queue] = params->aifs; 1237 1238 /* 1239 * This is the structure of AC_*_PARAM registers in 8187B: 1240 * - TXOP limit field, bit offset = 16 1241 * - ECWmax, bit offset = 12 1242 * - ECWmin, bit offset = 8 1243 * - AIFS, bit offset = 0 1244 */ 1245 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue], 1246 (params->txop << 16) | (cw_max << 12) | 1247 (cw_min << 8) | (params->aifs * 1248 priv->slot_time + SIFS_TIME)); 1249 } else { 1250 if (queue != 0) 1251 return -EINVAL; 1252 1253 rtl818x_iowrite8(priv, &priv->map->CW_VAL, 1254 cw_min | (cw_max << 4)); 1255 } 1256 return 0; 1257} 1258 1259static u64 rtl8187_get_tsf(struct ieee80211_hw *dev) 1260{ 1261 struct rtl8187_priv *priv = dev->priv; 1262 1263 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) | 1264 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32; 1265} 1266 1267static const struct ieee80211_ops rtl8187_ops = { 1268 .tx = rtl8187_tx, 1269 .start = rtl8187_start, 1270 .stop = rtl8187_stop, 1271 .add_interface = rtl8187_add_interface, 1272 .remove_interface = rtl8187_remove_interface, 1273 .config = rtl8187_config, 1274 .bss_info_changed = rtl8187_bss_info_changed, 1275 .prepare_multicast = rtl8187_prepare_multicast, 1276 .configure_filter = rtl8187_configure_filter, 1277 .conf_tx = rtl8187_conf_tx, 1278 .rfkill_poll = rtl8187_rfkill_poll, 1279 .get_tsf = rtl8187_get_tsf, 1280}; 1281 1282static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) 1283{ 1284 struct ieee80211_hw *dev = eeprom->data; 1285 struct rtl8187_priv *priv = dev->priv; 1286 u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 1287 1288 eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE; 1289 eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ; 1290 eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK; 1291 eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS; 1292} 1293 1294static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom) 1295{ 1296 struct ieee80211_hw *dev = eeprom->data; 1297 struct rtl8187_priv *priv = dev->priv; 1298 u8 reg = RTL818X_EEPROM_CMD_PROGRAM; 1299 1300 if (eeprom->reg_data_in) 1301 reg |= RTL818X_EEPROM_CMD_WRITE; 1302 if (eeprom->reg_data_out) 1303 reg |= RTL818X_EEPROM_CMD_READ; 1304 if (eeprom->reg_data_clock) 1305 reg |= RTL818X_EEPROM_CMD_CK; 1306 if (eeprom->reg_chip_select) 1307 reg |= RTL818X_EEPROM_CMD_CS; 1308 1309 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg); 1310 udelay(10); 1311} 1312 1313static int __devinit rtl8187_probe(struct usb_interface *intf, 1314 const struct usb_device_id *id) 1315{ 1316 struct usb_device *udev = interface_to_usbdev(intf); 1317 struct ieee80211_hw *dev; 1318 struct rtl8187_priv *priv; 1319 struct eeprom_93cx6 eeprom; 1320 struct ieee80211_channel *channel; 1321 const char *chip_name; 1322 u16 txpwr, reg; 1323 u16 product_id = le16_to_cpu(udev->descriptor.idProduct); 1324 int err, i; 1325 u8 mac_addr[ETH_ALEN]; 1326 1327 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); 1328 if (!dev) { 1329 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n"); 1330 return -ENOMEM; 1331 } 1332 1333 priv = dev->priv; 1334 priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B); 1335 1336 /* allocate "DMA aware" buffer for register accesses */ 1337 priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL); 1338 if (!priv->io_dmabuf) { 1339 err = -ENOMEM; 1340 goto err_free_dev; 1341 } 1342 mutex_init(&priv->io_mutex); 1343 1344 SET_IEEE80211_DEV(dev, &intf->dev); 1345 usb_set_intfdata(intf, dev); 1346 priv->udev = udev; 1347 1348 usb_get_dev(udev); 1349 1350 skb_queue_head_init(&priv->rx_queue); 1351 1352 BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels)); 1353 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates)); 1354 1355 memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels)); 1356 memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates)); 1357 priv->map = (struct rtl818x_csr *)0xFF00; 1358 1359 priv->band.band = IEEE80211_BAND_2GHZ; 1360 priv->band.channels = priv->channels; 1361 priv->band.n_channels = ARRAY_SIZE(rtl818x_channels); 1362 priv->band.bitrates = priv->rates; 1363 priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates); 1364 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; 1365 1366 1367 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 1368 IEEE80211_HW_SIGNAL_DBM | 1369 IEEE80211_HW_RX_INCLUDES_FCS; 1370 1371 eeprom.data = dev; 1372 eeprom.register_read = rtl8187_eeprom_register_read; 1373 eeprom.register_write = rtl8187_eeprom_register_write; 1374 if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6)) 1375 eeprom.width = PCI_EEPROM_WIDTH_93C66; 1376 else 1377 eeprom.width = PCI_EEPROM_WIDTH_93C46; 1378 1379 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1380 udelay(10); 1381 1382 eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR, 1383 (__le16 __force *)mac_addr, 3); 1384 if (!is_valid_ether_addr(mac_addr)) { 1385 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly " 1386 "generated MAC address\n"); 1387 random_ether_addr(mac_addr); 1388 } 1389 SET_IEEE80211_PERM_ADDR(dev, mac_addr); 1390 1391 channel = priv->channels; 1392 for (i = 0; i < 3; i++) { 1393 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i, 1394 &txpwr); 1395 (*channel++).hw_value = txpwr & 0xFF; 1396 (*channel++).hw_value = txpwr >> 8; 1397 } 1398 for (i = 0; i < 2; i++) { 1399 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i, 1400 &txpwr); 1401 (*channel++).hw_value = txpwr & 0xFF; 1402 (*channel++).hw_value = txpwr >> 8; 1403 } 1404 1405 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE, 1406 &priv->txpwr_base); 1407 1408 reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1; 1409 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1); 1410 /* 0 means asic B-cut, we should use SW 3 wire 1411 * bit-by-bit banging for radio. 1 means we can use 1412 * USB specific request to write radio registers */ 1413 priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3; 1414 rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg); 1415 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1416 1417 if (!priv->is_rtl8187b) { 1418 u32 reg32; 1419 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF); 1420 reg32 &= RTL818X_TX_CONF_HWVER_MASK; 1421 switch (reg32) { 1422 case RTL818X_TX_CONF_R8187vD_B: 1423 /* Some RTL8187B devices have a USB ID of 0x8187 1424 * detect them here */ 1425 chip_name = "RTL8187BvB(early)"; 1426 priv->is_rtl8187b = 1; 1427 priv->hw_rev = RTL8187BvB; 1428 break; 1429 case RTL818X_TX_CONF_R8187vD: 1430 chip_name = "RTL8187vD"; 1431 break; 1432 default: 1433 chip_name = "RTL8187vB (default)"; 1434 } 1435 } else { 1436 /* 1437 * Force USB request to write radio registers for 8187B, Realtek 1438 * only uses it in their sources 1439 */ 1440 /*if (priv->asic_rev == 0) { 1441 printk(KERN_WARNING "rtl8187: Forcing use of USB " 1442 "requests to write to radio registers\n"); 1443 priv->asic_rev = 1; 1444 }*/ 1445 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) { 1446 case RTL818X_R8187B_B: 1447 chip_name = "RTL8187BvB"; 1448 priv->hw_rev = RTL8187BvB; 1449 break; 1450 case RTL818X_R8187B_D: 1451 chip_name = "RTL8187BvD"; 1452 priv->hw_rev = RTL8187BvD; 1453 break; 1454 case RTL818X_R8187B_E: 1455 chip_name = "RTL8187BvE"; 1456 priv->hw_rev = RTL8187BvE; 1457 break; 1458 default: 1459 chip_name = "RTL8187BvB (default)"; 1460 priv->hw_rev = RTL8187BvB; 1461 } 1462 } 1463 1464 if (!priv->is_rtl8187b) { 1465 for (i = 0; i < 2; i++) { 1466 eeprom_93cx6_read(&eeprom, 1467 RTL8187_EEPROM_TXPWR_CHAN_6 + i, 1468 &txpwr); 1469 (*channel++).hw_value = txpwr & 0xFF; 1470 (*channel++).hw_value = txpwr >> 8; 1471 } 1472 } else { 1473 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6, 1474 &txpwr); 1475 (*channel++).hw_value = txpwr & 0xFF; 1476 1477 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr); 1478 (*channel++).hw_value = txpwr & 0xFF; 1479 1480 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr); 1481 (*channel++).hw_value = txpwr & 0xFF; 1482 (*channel++).hw_value = txpwr >> 8; 1483 } 1484 /* Handle the differing rfkill GPIO bit in different models */ 1485 priv->rfkill_mask = RFKILL_MASK_8187_89_97; 1486 if (product_id == 0x8197 || product_id == 0x8198) { 1487 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, ®); 1488 if (reg & 0xFF00) 1489 priv->rfkill_mask = RFKILL_MASK_8198; 1490 } 1491 1492 dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 1493 1494 if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b) 1495 printk(KERN_INFO "rtl8187: inconsistency between id with OEM" 1496 " info!\n"); 1497 1498 priv->rf = rtl8187_detect_rf(dev); 1499 dev->extra_tx_headroom = (!priv->is_rtl8187b) ? 1500 sizeof(struct rtl8187_tx_hdr) : 1501 sizeof(struct rtl8187b_tx_hdr); 1502 if (!priv->is_rtl8187b) 1503 dev->queues = 1; 1504 else 1505 dev->queues = 4; 1506 1507 err = ieee80211_register_hw(dev); 1508 if (err) { 1509 printk(KERN_ERR "rtl8187: Cannot register device\n"); 1510 goto err_free_dmabuf; 1511 } 1512 mutex_init(&priv->conf_mutex); 1513 skb_queue_head_init(&priv->b_tx_status.queue); 1514 1515 wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n", 1516 mac_addr, chip_name, priv->asic_rev, priv->rf->name, 1517 priv->rfkill_mask); 1518 1519#ifdef CONFIG_RTL8187_LEDS 1520 eeprom_93cx6_read(&eeprom, 0x3F, ®); 1521 reg &= 0xFF; 1522 rtl8187_leds_init(dev, reg); 1523#endif 1524 rtl8187_rfkill_init(dev); 1525 1526 return 0; 1527 1528 err_free_dmabuf: 1529 kfree(priv->io_dmabuf); 1530 err_free_dev: 1531 ieee80211_free_hw(dev); 1532 usb_set_intfdata(intf, NULL); 1533 usb_put_dev(udev); 1534 return err; 1535} 1536 1537static void __devexit rtl8187_disconnect(struct usb_interface *intf) 1538{ 1539 struct ieee80211_hw *dev = usb_get_intfdata(intf); 1540 struct rtl8187_priv *priv; 1541 1542 if (!dev) 1543 return; 1544 1545#ifdef CONFIG_RTL8187_LEDS 1546 rtl8187_leds_exit(dev); 1547#endif 1548 rtl8187_rfkill_exit(dev); 1549 ieee80211_unregister_hw(dev); 1550 1551 priv = dev->priv; 1552 usb_reset_device(priv->udev); 1553 usb_put_dev(interface_to_usbdev(intf)); 1554 kfree(priv->io_dmabuf); 1555 ieee80211_free_hw(dev); 1556} 1557 1558static struct usb_driver rtl8187_driver = { 1559 .name = KBUILD_MODNAME, 1560 .id_table = rtl8187_table, 1561 .probe = rtl8187_probe, 1562 .disconnect = __devexit_p(rtl8187_disconnect), 1563}; 1564 1565static int __init rtl8187_init(void) 1566{ 1567 return usb_register(&rtl8187_driver); 1568} 1569 1570static void __exit rtl8187_exit(void) 1571{ 1572 usb_deregister(&rtl8187_driver); 1573} 1574 1575module_init(rtl8187_init); 1576module_exit(rtl8187_exit); 1577