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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/net/ixp2000/
1/*
2 * Helper functions for the PM3386s on the Radisys ENP2611
3 * Copyright (C) 2004, 2005 Lennert Buytenhek <buytenh@wantstofly.org>
4 * Dedicated to Marija Kulikova.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/module.h>
13#include <linux/delay.h>
14#include <linux/netdevice.h>
15#include <asm/io.h>
16#include "pm3386.h"
17
18/*
19 * Read from register 'reg' of PM3386 device 'pm'.
20 */
21static u16 pm3386_reg_read(int pm, int reg)
22{
23	void *_reg;
24	u16 value;
25
26	_reg = (void *)ENP2611_PM3386_0_VIRT_BASE;
27	if (pm == 1)
28		_reg = (void *)ENP2611_PM3386_1_VIRT_BASE;
29
30	value = *((volatile u16 *)(_reg + (reg << 1)));
31
32//	printk(KERN_INFO "pm3386_reg_read(%d, %.3x) = %.8x\n", pm, reg, value);
33
34	return value;
35}
36
37/*
38 * Write to register 'reg' of PM3386 device 'pm', and perform
39 * a readback from the identification register.
40 */
41static void pm3386_reg_write(int pm, int reg, u16 value)
42{
43	void *_reg;
44	u16 dummy;
45
46//	printk(KERN_INFO "pm3386_reg_write(%d, %.3x, %.8x)\n", pm, reg, value);
47
48	_reg = (void *)ENP2611_PM3386_0_VIRT_BASE;
49	if (pm == 1)
50		_reg = (void *)ENP2611_PM3386_1_VIRT_BASE;
51
52	*((volatile u16 *)(_reg + (reg << 1))) = value;
53
54	dummy = *((volatile u16 *)_reg);
55	__asm__ __volatile__("mov %0, %0" : "+r" (dummy));
56}
57
58/*
59 * Read from port 'port' register 'reg', where the registers
60 * for the different ports are 'spacing' registers apart.
61 */
62static u16 pm3386_port_reg_read(int port, int _reg, int spacing)
63{
64	int reg;
65
66	reg = _reg;
67	if (port & 1)
68		reg += spacing;
69
70	return pm3386_reg_read(port >> 1, reg);
71}
72
73/*
74 * Write to port 'port' register 'reg', where the registers
75 * for the different ports are 'spacing' registers apart.
76 */
77static void pm3386_port_reg_write(int port, int _reg, int spacing, u16 value)
78{
79	int reg;
80
81	reg = _reg;
82	if (port & 1)
83		reg += spacing;
84
85	pm3386_reg_write(port >> 1, reg, value);
86}
87
88int pm3386_secondary_present(void)
89{
90	return pm3386_reg_read(1, 0) == 0x3386;
91}
92
93void pm3386_reset(void)
94{
95	u8 mac[3][6];
96	int secondary;
97
98	secondary = pm3386_secondary_present();
99
100	/* Save programmed MAC addresses.  */
101	pm3386_get_mac(0, mac[0]);
102	pm3386_get_mac(1, mac[1]);
103	if (secondary)
104		pm3386_get_mac(2, mac[2]);
105
106	/* Assert analog and digital reset.  */
107	pm3386_reg_write(0, 0x002, 0x0060);
108	if (secondary)
109		pm3386_reg_write(1, 0x002, 0x0060);
110	mdelay(1);
111
112	/* Deassert analog reset.  */
113	pm3386_reg_write(0, 0x002, 0x0062);
114	if (secondary)
115		pm3386_reg_write(1, 0x002, 0x0062);
116	mdelay(10);
117
118	/* Deassert digital reset.  */
119	pm3386_reg_write(0, 0x002, 0x0063);
120	if (secondary)
121		pm3386_reg_write(1, 0x002, 0x0063);
122	mdelay(10);
123
124	/* Restore programmed MAC addresses.  */
125	pm3386_set_mac(0, mac[0]);
126	pm3386_set_mac(1, mac[1]);
127	if (secondary)
128		pm3386_set_mac(2, mac[2]);
129
130	/* Disable carrier on all ports.  */
131	pm3386_set_carrier(0, 0);
132	pm3386_set_carrier(1, 0);
133	if (secondary)
134		pm3386_set_carrier(2, 0);
135}
136
137static u16 swaph(u16 x)
138{
139	return ((x << 8) | (x >> 8)) & 0xffff;
140}
141
142int pm3386_port_count(void)
143{
144	return 2 + pm3386_secondary_present();
145}
146
147void pm3386_init_port(int port)
148{
149	int pm = port >> 1;
150
151	if (pm3386_port_reg_read(port, 0x30a, 0x100) == 0x0000 &&
152	    (pm3386_port_reg_read(port, 0x309, 0x100) & 0xff00) == 0x5000) {
153		u16 temp[3];
154
155		temp[0] = pm3386_port_reg_read(port, 0x308, 0x100);
156		temp[1] = pm3386_port_reg_read(port, 0x309, 0x100);
157		temp[2] = pm3386_port_reg_read(port, 0x30a, 0x100);
158		pm3386_port_reg_write(port, 0x308, 0x100, swaph(temp[2]));
159		pm3386_port_reg_write(port, 0x309, 0x100, swaph(temp[1]));
160		pm3386_port_reg_write(port, 0x30a, 0x100, swaph(temp[0]));
161	}
162
163	/*
164	 * Initialise narrowbanding mode.  See application note 2010486
165	 * for more information.  (@@@ We also need to issue a reset
166	 * when ROOL or DOOL are detected.)
167	 */
168	pm3386_port_reg_write(port, 0x708, 0x10, 0xd055);
169	udelay(500);
170	pm3386_port_reg_write(port, 0x708, 0x10, 0x5055);
171
172	/*
173	 * SPI-3 ingress block.  Set 64 bytes SPI-3 burst size
174	 * towards SPI-3 bridge.
175	 */
176	pm3386_port_reg_write(port, 0x122, 0x20, 0x0002);
177
178	/*
179	 * Enable ingress protocol checking, and soft reset the
180	 * SPI-3 ingress block.
181	 */
182	pm3386_reg_write(pm, 0x103, 0x0003);
183	while (!(pm3386_reg_read(pm, 0x103) & 0x80))
184		;
185
186	/*
187	 * SPI-3 egress block.  Gather 12288 bytes of the current
188	 * packet in the TX fifo before initiating transmit on the
189	 * SERDES interface.  (Prevents TX underflows.)
190	 */
191	pm3386_port_reg_write(port, 0x221, 0x20, 0x0007);
192
193	/*
194	 * Enforce odd parity from the SPI-3 bridge, and soft reset
195	 * the SPI-3 egress block.
196	 */
197	pm3386_reg_write(pm, 0x203, 0x000d & ~(4 << (port & 1)));
198	while ((pm3386_reg_read(pm, 0x203) & 0x000c) != 0x000c)
199		;
200
201	/*
202	 * EGMAC block.  Set this channels to reject long preambles,
203	 * not send or transmit PAUSE frames, enable preamble checking,
204	 * disable frame length checking, enable FCS appending, enable
205	 * TX frame padding.
206	 */
207	pm3386_port_reg_write(port, 0x302, 0x100, 0x0113);
208
209	/*
210	 * Soft reset the EGMAC block.
211	 */
212	pm3386_port_reg_write(port, 0x301, 0x100, 0x8000);
213	pm3386_port_reg_write(port, 0x301, 0x100, 0x0000);
214
215	/*
216	 * Auto-sense autonegotiation status.
217	 */
218	pm3386_port_reg_write(port, 0x306, 0x100, 0x0100);
219
220	/*
221	 * Allow reception of jumbo frames.
222	 */
223	pm3386_port_reg_write(port, 0x310, 0x100, 9018);
224
225	/*
226	 * Allow transmission of jumbo frames.
227	 */
228	pm3386_port_reg_write(port, 0x336, 0x100, 9018);
229
230	/* @@@ Should set 0x337/0x437 (RX forwarding threshold.)  */
231
232	/*
233	 * Set autonegotiation parameters to 'no PAUSE, full duplex.'
234	 */
235	pm3386_port_reg_write(port, 0x31c, 0x100, 0x0020);
236
237	/*
238	 * Enable and restart autonegotiation.
239	 */
240	pm3386_port_reg_write(port, 0x318, 0x100, 0x0003);
241	pm3386_port_reg_write(port, 0x318, 0x100, 0x0002);
242}
243
244void pm3386_get_mac(int port, u8 *mac)
245{
246	u16 temp;
247
248	temp = pm3386_port_reg_read(port, 0x308, 0x100);
249	mac[0] = temp & 0xff;
250	mac[1] = (temp >> 8) & 0xff;
251
252	temp = pm3386_port_reg_read(port, 0x309, 0x100);
253	mac[2] = temp & 0xff;
254	mac[3] = (temp >> 8) & 0xff;
255
256	temp = pm3386_port_reg_read(port, 0x30a, 0x100);
257	mac[4] = temp & 0xff;
258	mac[5] = (temp >> 8) & 0xff;
259}
260
261void pm3386_set_mac(int port, u8 *mac)
262{
263	pm3386_port_reg_write(port, 0x308, 0x100, (mac[1] << 8) | mac[0]);
264	pm3386_port_reg_write(port, 0x309, 0x100, (mac[3] << 8) | mac[2]);
265	pm3386_port_reg_write(port, 0x30a, 0x100, (mac[5] << 8) | mac[4]);
266}
267
268static u32 pm3386_get_stat(int port, u16 base)
269{
270	u32 value;
271
272	value = pm3386_port_reg_read(port, base, 0x100);
273	value |= pm3386_port_reg_read(port, base + 1, 0x100) << 16;
274
275	return value;
276}
277
278void pm3386_get_stats(int port, struct net_device_stats *stats)
279{
280	/*
281	 * Snapshot statistics counters.
282	 */
283	pm3386_port_reg_write(port, 0x500, 0x100, 0x0001);
284	while (pm3386_port_reg_read(port, 0x500, 0x100) & 0x0001)
285		;
286
287	memset(stats, 0, sizeof(*stats));
288
289	stats->rx_packets = pm3386_get_stat(port, 0x510);
290	stats->tx_packets = pm3386_get_stat(port, 0x590);
291	stats->rx_bytes = pm3386_get_stat(port, 0x514);
292	stats->tx_bytes = pm3386_get_stat(port, 0x594);
293	/* @@@ Add other stats.  */
294}
295
296void pm3386_set_carrier(int port, int state)
297{
298	pm3386_port_reg_write(port, 0x703, 0x10, state ? 0x1001 : 0x0000);
299}
300
301int pm3386_is_link_up(int port)
302{
303	u16 temp;
304
305	temp = pm3386_port_reg_read(port, 0x31a, 0x100);
306	temp = pm3386_port_reg_read(port, 0x31a, 0x100);
307
308	return !!(temp & 0x0002);
309}
310
311void pm3386_enable_rx(int port)
312{
313	u16 temp;
314
315	temp = pm3386_port_reg_read(port, 0x303, 0x100);
316	temp |= 0x1000;
317	pm3386_port_reg_write(port, 0x303, 0x100, temp);
318}
319
320void pm3386_disable_rx(int port)
321{
322	u16 temp;
323
324	temp = pm3386_port_reg_read(port, 0x303, 0x100);
325	temp &= 0xefff;
326	pm3386_port_reg_write(port, 0x303, 0x100, temp);
327}
328
329void pm3386_enable_tx(int port)
330{
331	u16 temp;
332
333	temp = pm3386_port_reg_read(port, 0x303, 0x100);
334	temp |= 0x4000;
335	pm3386_port_reg_write(port, 0x303, 0x100, temp);
336}
337
338void pm3386_disable_tx(int port)
339{
340	u16 temp;
341
342	temp = pm3386_port_reg_read(port, 0x303, 0x100);
343	temp &= 0xbfff;
344	pm3386_port_reg_write(port, 0x303, 0x100, temp);
345}
346
347MODULE_LICENSE("GPL");
348