1/* 2 * Lance ethernet driver for the MIPS processor based 3 * DECstation family 4 * 5 * 6 * adopted from sunlance.c by Richard van den Berg 7 * 8 * Copyright (C) 2002, 2003, 2005, 2006 Maciej W. Rozycki 9 * 10 * additional sources: 11 * - PMAD-AA TURBOchannel Ethernet Module Functional Specification, 12 * Revision 1.2 13 * 14 * History: 15 * 16 * v0.001: The kernel accepts the code and it shows the hardware address. 17 * 18 * v0.002: Removed most sparc stuff, left only some module and dma stuff. 19 * 20 * v0.003: Enhanced base address calculation from proposals by 21 * Harald Koerfgen and Thomas Riemer. 22 * 23 * v0.004: lance-regs is pointing at the right addresses, added prom 24 * check. First start of address mapping and DMA. 25 * 26 * v0.005: started to play around with LANCE-DMA. This driver will not 27 * work for non IOASIC lances. HK 28 * 29 * v0.006: added pointer arrays to lance_private and setup routine for 30 * them in dec_lance_init. HK 31 * 32 * v0.007: Big shit. The LANCE seems to use a different DMA mechanism to 33 * access the init block. This looks like one (short) word at a 34 * time, but the smallest amount the IOASIC can transfer is a 35 * (long) word. So we have a 2-2 padding here. Changed 36 * lance_init_block accordingly. The 16-16 padding for the buffers 37 * seems to be correct. HK 38 * 39 * v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer 40 * 41 * v0.009: Module support fixes, multiple interfaces support, various 42 * bits. macro 43 * 44 * v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the 45 * PMAX requirement to only use halfword accesses to the 46 * buffer. macro 47 * 48 * v0.011: Converted the PMAD to the driver model. macro 49 */ 50 51#include <linux/crc32.h> 52#include <linux/delay.h> 53#include <linux/errno.h> 54#include <linux/if_ether.h> 55#include <linux/init.h> 56#include <linux/kernel.h> 57#include <linux/module.h> 58#include <linux/netdevice.h> 59#include <linux/etherdevice.h> 60#include <linux/spinlock.h> 61#include <linux/stddef.h> 62#include <linux/string.h> 63#include <linux/tc.h> 64#include <linux/types.h> 65 66#include <asm/addrspace.h> 67#include <asm/system.h> 68 69#include <asm/dec/interrupts.h> 70#include <asm/dec/ioasic.h> 71#include <asm/dec/ioasic_addrs.h> 72#include <asm/dec/kn01.h> 73#include <asm/dec/machtype.h> 74#include <asm/dec/system.h> 75 76static char version[] __devinitdata = 77"declance.c: v0.011 by Linux MIPS DECstation task force\n"; 78 79MODULE_AUTHOR("Linux MIPS DECstation task force"); 80MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver"); 81MODULE_LICENSE("GPL"); 82 83#define __unused __attribute__ ((unused)) 84 85/* 86 * card types 87 */ 88#define ASIC_LANCE 1 89#define PMAD_LANCE 2 90#define PMAX_LANCE 3 91 92 93#define LE_CSR0 0 94#define LE_CSR1 1 95#define LE_CSR2 2 96#define LE_CSR3 3 97 98#define LE_MO_PROM 0x8000 /* Enable promiscuous mode */ 99 100#define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */ 101#define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */ 102#define LE_C0_CERR 0x2000 /* SQE: Signal quality error */ 103#define LE_C0_MISS 0x1000 /* MISS: Missed a packet */ 104#define LE_C0_MERR 0x0800 /* ME: Memory error */ 105#define LE_C0_RINT 0x0400 /* Received interrupt */ 106#define LE_C0_TINT 0x0200 /* Transmitter Interrupt */ 107#define LE_C0_IDON 0x0100 /* IFIN: Init finished. */ 108#define LE_C0_INTR 0x0080 /* Interrupt or error */ 109#define LE_C0_INEA 0x0040 /* Interrupt enable */ 110#define LE_C0_RXON 0x0020 /* Receiver on */ 111#define LE_C0_TXON 0x0010 /* Transmitter on */ 112#define LE_C0_TDMD 0x0008 /* Transmitter demand */ 113#define LE_C0_STOP 0x0004 /* Stop the card */ 114#define LE_C0_STRT 0x0002 /* Start the card */ 115#define LE_C0_INIT 0x0001 /* Init the card */ 116 117#define LE_C3_BSWP 0x4 /* SWAP */ 118#define LE_C3_ACON 0x2 /* ALE Control */ 119#define LE_C3_BCON 0x1 /* Byte control */ 120 121/* Receive message descriptor 1 */ 122#define LE_R1_OWN 0x8000 /* Who owns the entry */ 123#define LE_R1_ERR 0x4000 /* Error: if FRA, OFL, CRC or BUF is set */ 124#define LE_R1_FRA 0x2000 /* FRA: Frame error */ 125#define LE_R1_OFL 0x1000 /* OFL: Frame overflow */ 126#define LE_R1_CRC 0x0800 /* CRC error */ 127#define LE_R1_BUF 0x0400 /* BUF: Buffer error */ 128#define LE_R1_SOP 0x0200 /* Start of packet */ 129#define LE_R1_EOP 0x0100 /* End of packet */ 130#define LE_R1_POK 0x0300 /* Packet is complete: SOP + EOP */ 131 132/* Transmit message descriptor 1 */ 133#define LE_T1_OWN 0x8000 /* Lance owns the packet */ 134#define LE_T1_ERR 0x4000 /* Error summary */ 135#define LE_T1_EMORE 0x1000 /* Error: more than one retry needed */ 136#define LE_T1_EONE 0x0800 /* Error: one retry needed */ 137#define LE_T1_EDEF 0x0400 /* Error: deferred */ 138#define LE_T1_SOP 0x0200 /* Start of packet */ 139#define LE_T1_EOP 0x0100 /* End of packet */ 140#define LE_T1_POK 0x0300 /* Packet is complete: SOP + EOP */ 141 142#define LE_T3_BUF 0x8000 /* Buffer error */ 143#define LE_T3_UFL 0x4000 /* Error underflow */ 144#define LE_T3_LCOL 0x1000 /* Error late collision */ 145#define LE_T3_CLOS 0x0800 /* Error carrier loss */ 146#define LE_T3_RTY 0x0400 /* Error retry */ 147#define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */ 148 149/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 150 151#ifndef LANCE_LOG_TX_BUFFERS 152#define LANCE_LOG_TX_BUFFERS 4 153#define LANCE_LOG_RX_BUFFERS 4 154#endif 155 156#define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS)) 157#define TX_RING_MOD_MASK (TX_RING_SIZE - 1) 158 159#define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS)) 160#define RX_RING_MOD_MASK (RX_RING_SIZE - 1) 161 162#define PKT_BUF_SZ 1536 163#define RX_BUFF_SIZE PKT_BUF_SZ 164#define TX_BUFF_SIZE PKT_BUF_SZ 165 166#undef TEST_HITS 167#define ZERO 0 168 169/* 170 * The DS2100/3100 have a linear 64 kB buffer which supports halfword 171 * accesses only. Each halfword of the buffer is word-aligned in the 172 * CPU address space. 173 * 174 * The PMAD-AA has a 128 kB buffer on-board. 175 * 176 * The IOASIC LANCE devices use a shared memory region. This region 177 * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB 178 * boundary. The LANCE sees this as a 64 kB long continuous memory 179 * region. 180 * 181 * The LANCE's DMA address is used as an index in this buffer and DMA 182 * takes place in bursts of eight 16-bit words which are packed into 183 * four 32-bit words by the IOASIC. This leads to a strange padding: 184 * 16 bytes of valid data followed by a 16 byte gap :-(. 185 */ 186 187struct lance_rx_desc { 188 unsigned short rmd0; /* low address of packet */ 189 unsigned short rmd1; /* high address of packet 190 and descriptor bits */ 191 short length; /* 2s complement (negative!) 192 of buffer length */ 193 unsigned short mblength; /* actual number of bytes received */ 194}; 195 196struct lance_tx_desc { 197 unsigned short tmd0; /* low address of packet */ 198 unsigned short tmd1; /* high address of packet 199 and descriptor bits */ 200 short length; /* 2s complement (negative!) 201 of buffer length */ 202 unsigned short misc; 203}; 204 205 206/* First part of the LANCE initialization block, described in databook. */ 207struct lance_init_block { 208 unsigned short mode; /* pre-set mode (reg. 15) */ 209 210 unsigned short phys_addr[3]; /* physical ethernet address */ 211 unsigned short filter[4]; /* multicast filter */ 212 213 /* Receive and transmit ring base, along with extra bits. */ 214 unsigned short rx_ptr; /* receive descriptor addr */ 215 unsigned short rx_len; /* receive len and high addr */ 216 unsigned short tx_ptr; /* transmit descriptor addr */ 217 unsigned short tx_len; /* transmit len and high addr */ 218 219 short gap[4]; 220 221 /* The buffer descriptors */ 222 struct lance_rx_desc brx_ring[RX_RING_SIZE]; 223 struct lance_tx_desc btx_ring[TX_RING_SIZE]; 224}; 225 226#define BUF_OFFSET_CPU sizeof(struct lance_init_block) 227#define BUF_OFFSET_LNC sizeof(struct lance_init_block) 228 229#define shift_off(off, type) \ 230 (type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off) 231 232#define lib_off(rt, type) \ 233 shift_off(offsetof(struct lance_init_block, rt), type) 234 235#define lib_ptr(ib, rt, type) \ 236 ((volatile u16 *)((u8 *)(ib) + lib_off(rt, type))) 237 238#define rds_off(rt, type) \ 239 shift_off(offsetof(struct lance_rx_desc, rt), type) 240 241#define rds_ptr(rd, rt, type) \ 242 ((volatile u16 *)((u8 *)(rd) + rds_off(rt, type))) 243 244#define tds_off(rt, type) \ 245 shift_off(offsetof(struct lance_tx_desc, rt), type) 246 247#define tds_ptr(td, rt, type) \ 248 ((volatile u16 *)((u8 *)(td) + tds_off(rt, type))) 249 250struct lance_private { 251 struct net_device *next; 252 int type; 253 int dma_irq; 254 volatile struct lance_regs *ll; 255 256 spinlock_t lock; 257 258 int rx_new, tx_new; 259 int rx_old, tx_old; 260 261 unsigned short busmaster_regval; 262 263 struct timer_list multicast_timer; 264 265 /* Pointers to the ring buffers as seen from the CPU */ 266 char *rx_buf_ptr_cpu[RX_RING_SIZE]; 267 char *tx_buf_ptr_cpu[TX_RING_SIZE]; 268 269 /* Pointers to the ring buffers as seen from the LANCE */ 270 uint rx_buf_ptr_lnc[RX_RING_SIZE]; 271 uint tx_buf_ptr_lnc[TX_RING_SIZE]; 272}; 273 274#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\ 275 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\ 276 lp->tx_old - lp->tx_new-1) 277 278/* The lance control ports are at an absolute address, machine and tc-slot 279 * dependent. 280 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses, 281 * so we have to give the structure an extra member making rap pointing 282 * at the right address 283 */ 284struct lance_regs { 285 volatile unsigned short rdp; /* register data port */ 286 unsigned short pad; 287 volatile unsigned short rap; /* register address port */ 288}; 289 290int dec_lance_debug = 2; 291 292static struct tc_driver dec_lance_tc_driver; 293static struct net_device *root_lance_dev; 294 295static inline void writereg(volatile unsigned short *regptr, short value) 296{ 297 *regptr = value; 298 iob(); 299} 300 301/* Load the CSR registers */ 302static void load_csrs(struct lance_private *lp) 303{ 304 volatile struct lance_regs *ll = lp->ll; 305 uint leptr; 306 307 /* The address space as seen from the LANCE 308 * begins at address 0. HK 309 */ 310 leptr = 0; 311 312 writereg(&ll->rap, LE_CSR1); 313 writereg(&ll->rdp, (leptr & 0xFFFF)); 314 writereg(&ll->rap, LE_CSR2); 315 writereg(&ll->rdp, leptr >> 16); 316 writereg(&ll->rap, LE_CSR3); 317 writereg(&ll->rdp, lp->busmaster_regval); 318 319 /* Point back to csr0 */ 320 writereg(&ll->rap, LE_CSR0); 321} 322 323/* 324 * Our specialized copy routines 325 * 326 */ 327static void cp_to_buf(const int type, void *to, const void *from, int len) 328{ 329 unsigned short *tp, *fp, clen; 330 unsigned char *rtp, *rfp; 331 332 if (type == PMAD_LANCE) { 333 memcpy(to, from, len); 334 } else if (type == PMAX_LANCE) { 335 clen = len >> 1; 336 tp = (unsigned short *) to; 337 fp = (unsigned short *) from; 338 339 while (clen--) { 340 *tp++ = *fp++; 341 tp++; 342 } 343 344 clen = len & 1; 345 rtp = (unsigned char *) tp; 346 rfp = (unsigned char *) fp; 347 while (clen--) { 348 *rtp++ = *rfp++; 349 } 350 } else { 351 /* 352 * copy 16 Byte chunks 353 */ 354 clen = len >> 4; 355 tp = (unsigned short *) to; 356 fp = (unsigned short *) from; 357 while (clen--) { 358 *tp++ = *fp++; 359 *tp++ = *fp++; 360 *tp++ = *fp++; 361 *tp++ = *fp++; 362 *tp++ = *fp++; 363 *tp++ = *fp++; 364 *tp++ = *fp++; 365 *tp++ = *fp++; 366 tp += 8; 367 } 368 369 /* 370 * do the rest, if any. 371 */ 372 clen = len & 15; 373 rtp = (unsigned char *) tp; 374 rfp = (unsigned char *) fp; 375 while (clen--) { 376 *rtp++ = *rfp++; 377 } 378 } 379 380 iob(); 381} 382 383static void cp_from_buf(const int type, void *to, const void *from, int len) 384{ 385 unsigned short *tp, *fp, clen; 386 unsigned char *rtp, *rfp; 387 388 if (type == PMAD_LANCE) { 389 memcpy(to, from, len); 390 } else if (type == PMAX_LANCE) { 391 clen = len >> 1; 392 tp = (unsigned short *) to; 393 fp = (unsigned short *) from; 394 while (clen--) { 395 *tp++ = *fp++; 396 fp++; 397 } 398 399 clen = len & 1; 400 401 rtp = (unsigned char *) tp; 402 rfp = (unsigned char *) fp; 403 404 while (clen--) { 405 *rtp++ = *rfp++; 406 } 407 } else { 408 409 /* 410 * copy 16 Byte chunks 411 */ 412 clen = len >> 4; 413 tp = (unsigned short *) to; 414 fp = (unsigned short *) from; 415 while (clen--) { 416 *tp++ = *fp++; 417 *tp++ = *fp++; 418 *tp++ = *fp++; 419 *tp++ = *fp++; 420 *tp++ = *fp++; 421 *tp++ = *fp++; 422 *tp++ = *fp++; 423 *tp++ = *fp++; 424 fp += 8; 425 } 426 427 /* 428 * do the rest, if any. 429 */ 430 clen = len & 15; 431 rtp = (unsigned char *) tp; 432 rfp = (unsigned char *) fp; 433 while (clen--) { 434 *rtp++ = *rfp++; 435 } 436 437 438 } 439 440} 441 442/* Setup the Lance Rx and Tx rings */ 443static void lance_init_ring(struct net_device *dev) 444{ 445 struct lance_private *lp = netdev_priv(dev); 446 volatile u16 *ib = (volatile u16 *)dev->mem_start; 447 uint leptr; 448 int i; 449 450 /* Lock out other processes while setting up hardware */ 451 netif_stop_queue(dev); 452 lp->rx_new = lp->tx_new = 0; 453 lp->rx_old = lp->tx_old = 0; 454 455 *lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) | 456 dev->dev_addr[0]; 457 *lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) | 458 dev->dev_addr[2]; 459 *lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) | 460 dev->dev_addr[4]; 461 /* Setup the initialization block */ 462 463 /* Setup rx descriptor pointer */ 464 leptr = offsetof(struct lance_init_block, brx_ring); 465 *lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) | 466 (leptr >> 16); 467 *lib_ptr(ib, rx_ptr, lp->type) = leptr; 468 if (ZERO) 469 printk("RX ptr: %8.8x(%8.8x)\n", 470 leptr, lib_off(brx_ring, lp->type)); 471 472 /* Setup tx descriptor pointer */ 473 leptr = offsetof(struct lance_init_block, btx_ring); 474 *lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) | 475 (leptr >> 16); 476 *lib_ptr(ib, tx_ptr, lp->type) = leptr; 477 if (ZERO) 478 printk("TX ptr: %8.8x(%8.8x)\n", 479 leptr, lib_off(btx_ring, lp->type)); 480 481 if (ZERO) 482 printk("TX rings:\n"); 483 484 /* Setup the Tx ring entries */ 485 for (i = 0; i < TX_RING_SIZE; i++) { 486 leptr = lp->tx_buf_ptr_lnc[i]; 487 *lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr; 488 *lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) & 489 0xff; 490 *lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000; 491 /* The ones required by tmd2 */ 492 *lib_ptr(ib, btx_ring[i].misc, lp->type) = 0; 493 if (i < 3 && ZERO) 494 printk("%d: 0x%8.8x(0x%8.8x)\n", 495 i, leptr, (uint)lp->tx_buf_ptr_cpu[i]); 496 } 497 498 /* Setup the Rx ring entries */ 499 if (ZERO) 500 printk("RX rings:\n"); 501 for (i = 0; i < RX_RING_SIZE; i++) { 502 leptr = lp->rx_buf_ptr_lnc[i]; 503 *lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr; 504 *lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) & 505 0xff) | 506 LE_R1_OWN; 507 *lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE | 508 0xf000; 509 *lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0; 510 if (i < 3 && ZERO) 511 printk("%d: 0x%8.8x(0x%8.8x)\n", 512 i, leptr, (uint)lp->rx_buf_ptr_cpu[i]); 513 } 514 iob(); 515} 516 517static int init_restart_lance(struct lance_private *lp) 518{ 519 volatile struct lance_regs *ll = lp->ll; 520 int i; 521 522 writereg(&ll->rap, LE_CSR0); 523 writereg(&ll->rdp, LE_C0_INIT); 524 525 /* Wait for the lance to complete initialization */ 526 for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) { 527 udelay(10); 528 } 529 if ((i == 100) || (ll->rdp & LE_C0_ERR)) { 530 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 531 i, ll->rdp); 532 return -1; 533 } 534 if ((ll->rdp & LE_C0_ERR)) { 535 printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", 536 i, ll->rdp); 537 return -1; 538 } 539 writereg(&ll->rdp, LE_C0_IDON); 540 writereg(&ll->rdp, LE_C0_STRT); 541 writereg(&ll->rdp, LE_C0_INEA); 542 543 return 0; 544} 545 546static int lance_rx(struct net_device *dev) 547{ 548 struct lance_private *lp = netdev_priv(dev); 549 volatile u16 *ib = (volatile u16 *)dev->mem_start; 550 volatile u16 *rd; 551 unsigned short bits; 552 int entry, len; 553 struct sk_buff *skb; 554 555#ifdef TEST_HITS 556 { 557 int i; 558 559 printk("["); 560 for (i = 0; i < RX_RING_SIZE; i++) { 561 if (i == lp->rx_new) 562 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 563 lp->type) & 564 LE_R1_OWN ? "_" : "X"); 565 else 566 printk("%s", *lib_ptr(ib, brx_ring[i].rmd1, 567 lp->type) & 568 LE_R1_OWN ? "." : "1"); 569 } 570 printk("]"); 571 } 572#endif 573 574 for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type); 575 !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN); 576 rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) { 577 entry = lp->rx_new; 578 579 /* We got an incomplete frame? */ 580 if ((bits & LE_R1_POK) != LE_R1_POK) { 581 dev->stats.rx_over_errors++; 582 dev->stats.rx_errors++; 583 } else if (bits & LE_R1_ERR) { 584 /* Count only the end frame as a rx error, 585 * not the beginning 586 */ 587 if (bits & LE_R1_BUF) 588 dev->stats.rx_fifo_errors++; 589 if (bits & LE_R1_CRC) 590 dev->stats.rx_crc_errors++; 591 if (bits & LE_R1_OFL) 592 dev->stats.rx_over_errors++; 593 if (bits & LE_R1_FRA) 594 dev->stats.rx_frame_errors++; 595 if (bits & LE_R1_EOP) 596 dev->stats.rx_errors++; 597 } else { 598 len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4; 599 skb = dev_alloc_skb(len + 2); 600 601 if (skb == 0) { 602 printk("%s: Memory squeeze, deferring packet.\n", 603 dev->name); 604 dev->stats.rx_dropped++; 605 *rds_ptr(rd, mblength, lp->type) = 0; 606 *rds_ptr(rd, rmd1, lp->type) = 607 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 608 0xff) | LE_R1_OWN; 609 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 610 return 0; 611 } 612 dev->stats.rx_bytes += len; 613 614 skb_reserve(skb, 2); /* 16 byte align */ 615 skb_put(skb, len); /* make room */ 616 617 cp_from_buf(lp->type, skb->data, 618 (char *)lp->rx_buf_ptr_cpu[entry], len); 619 620 skb->protocol = eth_type_trans(skb, dev); 621 netif_rx(skb); 622 dev->stats.rx_packets++; 623 } 624 625 /* Return the packet to the pool */ 626 *rds_ptr(rd, mblength, lp->type) = 0; 627 *rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000; 628 *rds_ptr(rd, rmd1, lp->type) = 629 ((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN; 630 lp->rx_new = (entry + 1) & RX_RING_MOD_MASK; 631 } 632 return 0; 633} 634 635static void lance_tx(struct net_device *dev) 636{ 637 struct lance_private *lp = netdev_priv(dev); 638 volatile u16 *ib = (volatile u16 *)dev->mem_start; 639 volatile struct lance_regs *ll = lp->ll; 640 volatile u16 *td; 641 int i, j; 642 int status; 643 644 j = lp->tx_old; 645 646 spin_lock(&lp->lock); 647 648 for (i = j; i != lp->tx_new; i = j) { 649 td = lib_ptr(ib, btx_ring[i], lp->type); 650 /* If we hit a packet not owned by us, stop */ 651 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN) 652 break; 653 654 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) { 655 status = *tds_ptr(td, misc, lp->type); 656 657 dev->stats.tx_errors++; 658 if (status & LE_T3_RTY) 659 dev->stats.tx_aborted_errors++; 660 if (status & LE_T3_LCOL) 661 dev->stats.tx_window_errors++; 662 663 if (status & LE_T3_CLOS) { 664 dev->stats.tx_carrier_errors++; 665 printk("%s: Carrier Lost\n", dev->name); 666 /* Stop the lance */ 667 writereg(&ll->rap, LE_CSR0); 668 writereg(&ll->rdp, LE_C0_STOP); 669 lance_init_ring(dev); 670 load_csrs(lp); 671 init_restart_lance(lp); 672 goto out; 673 } 674 /* Buffer errors and underflows turn off the 675 * transmitter, restart the adapter. 676 */ 677 if (status & (LE_T3_BUF | LE_T3_UFL)) { 678 dev->stats.tx_fifo_errors++; 679 680 printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n", 681 dev->name); 682 /* Stop the lance */ 683 writereg(&ll->rap, LE_CSR0); 684 writereg(&ll->rdp, LE_C0_STOP); 685 lance_init_ring(dev); 686 load_csrs(lp); 687 init_restart_lance(lp); 688 goto out; 689 } 690 } else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) == 691 LE_T1_POK) { 692 /* 693 * So we don't count the packet more than once. 694 */ 695 *tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK); 696 697 /* One collision before packet was sent. */ 698 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE) 699 dev->stats.collisions++; 700 701 /* More than one collision, be optimistic. */ 702 if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE) 703 dev->stats.collisions += 2; 704 705 dev->stats.tx_packets++; 706 } 707 j = (j + 1) & TX_RING_MOD_MASK; 708 } 709 lp->tx_old = j; 710out: 711 if (netif_queue_stopped(dev) && 712 TX_BUFFS_AVAIL > 0) 713 netif_wake_queue(dev); 714 715 spin_unlock(&lp->lock); 716} 717 718static irqreturn_t lance_dma_merr_int(int irq, void *dev_id) 719{ 720 struct net_device *dev = dev_id; 721 722 printk(KERN_ERR "%s: DMA error\n", dev->name); 723 return IRQ_HANDLED; 724} 725 726static irqreturn_t lance_interrupt(int irq, void *dev_id) 727{ 728 struct net_device *dev = dev_id; 729 struct lance_private *lp = netdev_priv(dev); 730 volatile struct lance_regs *ll = lp->ll; 731 int csr0; 732 733 writereg(&ll->rap, LE_CSR0); 734 csr0 = ll->rdp; 735 736 /* Acknowledge all the interrupt sources ASAP */ 737 writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT)); 738 739 if ((csr0 & LE_C0_ERR)) { 740 /* Clear the error condition */ 741 writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | 742 LE_C0_CERR | LE_C0_MERR); 743 } 744 if (csr0 & LE_C0_RINT) 745 lance_rx(dev); 746 747 if (csr0 & LE_C0_TINT) 748 lance_tx(dev); 749 750 if (csr0 & LE_C0_BABL) 751 dev->stats.tx_errors++; 752 753 if (csr0 & LE_C0_MISS) 754 dev->stats.rx_errors++; 755 756 if (csr0 & LE_C0_MERR) { 757 printk("%s: Memory error, status %04x\n", dev->name, csr0); 758 759 writereg(&ll->rdp, LE_C0_STOP); 760 761 lance_init_ring(dev); 762 load_csrs(lp); 763 init_restart_lance(lp); 764 netif_wake_queue(dev); 765 } 766 767 writereg(&ll->rdp, LE_C0_INEA); 768 writereg(&ll->rdp, LE_C0_INEA); 769 return IRQ_HANDLED; 770} 771 772static int lance_open(struct net_device *dev) 773{ 774 volatile u16 *ib = (volatile u16 *)dev->mem_start; 775 struct lance_private *lp = netdev_priv(dev); 776 volatile struct lance_regs *ll = lp->ll; 777 int status = 0; 778 779 /* Stop the Lance */ 780 writereg(&ll->rap, LE_CSR0); 781 writereg(&ll->rdp, LE_C0_STOP); 782 783 /* Set mode and clear multicast filter only at device open, 784 * so that lance_init_ring() called at any error will not 785 * forget multicast filters. 786 * 787 * BTW it is common bug in all lance drivers! --ANK 788 */ 789 *lib_ptr(ib, mode, lp->type) = 0; 790 *lib_ptr(ib, filter[0], lp->type) = 0; 791 *lib_ptr(ib, filter[1], lp->type) = 0; 792 *lib_ptr(ib, filter[2], lp->type) = 0; 793 *lib_ptr(ib, filter[3], lp->type) = 0; 794 795 lance_init_ring(dev); 796 load_csrs(lp); 797 798 netif_start_queue(dev); 799 800 /* Associate IRQ with lance_interrupt */ 801 if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) { 802 printk("%s: Can't get IRQ %d\n", dev->name, dev->irq); 803 return -EAGAIN; 804 } 805 if (lp->dma_irq >= 0) { 806 unsigned long flags; 807 808 if (request_irq(lp->dma_irq, lance_dma_merr_int, 0, 809 "lance error", dev)) { 810 free_irq(dev->irq, dev); 811 printk("%s: Can't get DMA IRQ %d\n", dev->name, 812 lp->dma_irq); 813 return -EAGAIN; 814 } 815 816 spin_lock_irqsave(&ioasic_ssr_lock, flags); 817 818 fast_mb(); 819 /* Enable I/O ASIC LANCE DMA. */ 820 ioasic_write(IO_REG_SSR, 821 ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN); 822 823 fast_mb(); 824 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 825 } 826 827 status = init_restart_lance(lp); 828 return status; 829} 830 831static int lance_close(struct net_device *dev) 832{ 833 struct lance_private *lp = netdev_priv(dev); 834 volatile struct lance_regs *ll = lp->ll; 835 836 netif_stop_queue(dev); 837 del_timer_sync(&lp->multicast_timer); 838 839 /* Stop the card */ 840 writereg(&ll->rap, LE_CSR0); 841 writereg(&ll->rdp, LE_C0_STOP); 842 843 if (lp->dma_irq >= 0) { 844 unsigned long flags; 845 846 spin_lock_irqsave(&ioasic_ssr_lock, flags); 847 848 fast_mb(); 849 /* Disable I/O ASIC LANCE DMA. */ 850 ioasic_write(IO_REG_SSR, 851 ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN); 852 853 fast_iob(); 854 spin_unlock_irqrestore(&ioasic_ssr_lock, flags); 855 856 free_irq(lp->dma_irq, dev); 857 } 858 free_irq(dev->irq, dev); 859 return 0; 860} 861 862static inline int lance_reset(struct net_device *dev) 863{ 864 struct lance_private *lp = netdev_priv(dev); 865 volatile struct lance_regs *ll = lp->ll; 866 int status; 867 868 /* Stop the lance */ 869 writereg(&ll->rap, LE_CSR0); 870 writereg(&ll->rdp, LE_C0_STOP); 871 872 lance_init_ring(dev); 873 load_csrs(lp); 874 dev->trans_start = jiffies; /* prevent tx timeout */ 875 status = init_restart_lance(lp); 876 return status; 877} 878 879static void lance_tx_timeout(struct net_device *dev) 880{ 881 struct lance_private *lp = netdev_priv(dev); 882 volatile struct lance_regs *ll = lp->ll; 883 884 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n", 885 dev->name, ll->rdp); 886 lance_reset(dev); 887 netif_wake_queue(dev); 888} 889 890static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev) 891{ 892 struct lance_private *lp = netdev_priv(dev); 893 volatile struct lance_regs *ll = lp->ll; 894 volatile u16 *ib = (volatile u16 *)dev->mem_start; 895 unsigned long flags; 896 int entry, len; 897 898 len = skb->len; 899 900 if (len < ETH_ZLEN) { 901 if (skb_padto(skb, ETH_ZLEN)) 902 return NETDEV_TX_OK; 903 len = ETH_ZLEN; 904 } 905 906 dev->stats.tx_bytes += len; 907 908 spin_lock_irqsave(&lp->lock, flags); 909 910 entry = lp->tx_new; 911 *lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len); 912 *lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0; 913 914 cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data, len); 915 916 /* Now, give the packet to the lance */ 917 *lib_ptr(ib, btx_ring[entry].tmd1, lp->type) = 918 ((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) | 919 (LE_T1_POK | LE_T1_OWN); 920 lp->tx_new = (entry + 1) & TX_RING_MOD_MASK; 921 922 if (TX_BUFFS_AVAIL <= 0) 923 netif_stop_queue(dev); 924 925 /* Kick the lance: transmit now */ 926 writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD); 927 928 spin_unlock_irqrestore(&lp->lock, flags); 929 930 dev_kfree_skb(skb); 931 932 return NETDEV_TX_OK; 933} 934 935static void lance_load_multicast(struct net_device *dev) 936{ 937 struct lance_private *lp = netdev_priv(dev); 938 volatile u16 *ib = (volatile u16 *)dev->mem_start; 939 struct netdev_hw_addr *ha; 940 char *addrs; 941 u32 crc; 942 943 /* set all multicast bits */ 944 if (dev->flags & IFF_ALLMULTI) { 945 *lib_ptr(ib, filter[0], lp->type) = 0xffff; 946 *lib_ptr(ib, filter[1], lp->type) = 0xffff; 947 *lib_ptr(ib, filter[2], lp->type) = 0xffff; 948 *lib_ptr(ib, filter[3], lp->type) = 0xffff; 949 return; 950 } 951 /* clear the multicast filter */ 952 *lib_ptr(ib, filter[0], lp->type) = 0; 953 *lib_ptr(ib, filter[1], lp->type) = 0; 954 *lib_ptr(ib, filter[2], lp->type) = 0; 955 *lib_ptr(ib, filter[3], lp->type) = 0; 956 957 /* Add addresses */ 958 netdev_for_each_mc_addr(ha, dev) { 959 addrs = ha->addr; 960 961 /* multicast address? */ 962 if (!(*addrs & 1)) 963 continue; 964 965 crc = ether_crc_le(ETH_ALEN, addrs); 966 crc = crc >> 26; 967 *lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf); 968 } 969} 970 971static void lance_set_multicast(struct net_device *dev) 972{ 973 struct lance_private *lp = netdev_priv(dev); 974 volatile u16 *ib = (volatile u16 *)dev->mem_start; 975 volatile struct lance_regs *ll = lp->ll; 976 977 if (!netif_running(dev)) 978 return; 979 980 if (lp->tx_old != lp->tx_new) { 981 mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100); 982 netif_wake_queue(dev); 983 return; 984 } 985 986 netif_stop_queue(dev); 987 988 writereg(&ll->rap, LE_CSR0); 989 writereg(&ll->rdp, LE_C0_STOP); 990 991 lance_init_ring(dev); 992 993 if (dev->flags & IFF_PROMISC) { 994 *lib_ptr(ib, mode, lp->type) |= LE_MO_PROM; 995 } else { 996 *lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM; 997 lance_load_multicast(dev); 998 } 999 load_csrs(lp); 1000 init_restart_lance(lp); 1001 netif_wake_queue(dev); 1002} 1003 1004static void lance_set_multicast_retry(unsigned long _opaque) 1005{ 1006 struct net_device *dev = (struct net_device *) _opaque; 1007 1008 lance_set_multicast(dev); 1009} 1010 1011static const struct net_device_ops lance_netdev_ops = { 1012 .ndo_open = lance_open, 1013 .ndo_stop = lance_close, 1014 .ndo_start_xmit = lance_start_xmit, 1015 .ndo_tx_timeout = lance_tx_timeout, 1016 .ndo_set_multicast_list = lance_set_multicast, 1017 .ndo_change_mtu = eth_change_mtu, 1018 .ndo_validate_addr = eth_validate_addr, 1019 .ndo_set_mac_address = eth_mac_addr, 1020}; 1021 1022static int __devinit dec_lance_probe(struct device *bdev, const int type) 1023{ 1024 static unsigned version_printed; 1025 static const char fmt[] = "declance%d"; 1026 char name[10]; 1027 struct net_device *dev; 1028 struct lance_private *lp; 1029 volatile struct lance_regs *ll; 1030 resource_size_t start = 0, len = 0; 1031 int i, ret; 1032 unsigned long esar_base; 1033 unsigned char *esar; 1034 1035 if (dec_lance_debug && version_printed++ == 0) 1036 printk(version); 1037 1038 if (bdev) 1039 snprintf(name, sizeof(name), "%s", dev_name(bdev)); 1040 else { 1041 i = 0; 1042 dev = root_lance_dev; 1043 while (dev) { 1044 i++; 1045 lp = netdev_priv(dev); 1046 dev = lp->next; 1047 } 1048 snprintf(name, sizeof(name), fmt, i); 1049 } 1050 1051 dev = alloc_etherdev(sizeof(struct lance_private)); 1052 if (!dev) { 1053 printk(KERN_ERR "%s: Unable to allocate etherdev, aborting.\n", 1054 name); 1055 ret = -ENOMEM; 1056 goto err_out; 1057 } 1058 1059 /* 1060 * alloc_etherdev ensures the data structures used by the LANCE 1061 * are aligned. 1062 */ 1063 lp = netdev_priv(dev); 1064 spin_lock_init(&lp->lock); 1065 1066 lp->type = type; 1067 switch (type) { 1068 case ASIC_LANCE: 1069 dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE); 1070 1071 /* buffer space for the on-board LANCE shared memory */ 1072 dev->mem_start = CKSEG1ADDR(0x00020000); 1073 dev->mem_end = dev->mem_start + 0x00020000; 1074 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1075 esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR); 1076 1077 memset((void *)dev->mem_start, 0, 1078 dev->mem_end - dev->mem_start); 1079 1080 /* 1081 * setup the pointer arrays, this sucks [tm] :-( 1082 */ 1083 for (i = 0; i < RX_RING_SIZE; i++) { 1084 lp->rx_buf_ptr_cpu[i] = 1085 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1086 2 * i * RX_BUFF_SIZE); 1087 lp->rx_buf_ptr_lnc[i] = 1088 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1089 } 1090 for (i = 0; i < TX_RING_SIZE; i++) { 1091 lp->tx_buf_ptr_cpu[i] = 1092 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1093 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1094 2 * i * TX_BUFF_SIZE); 1095 lp->tx_buf_ptr_lnc[i] = 1096 (BUF_OFFSET_LNC + 1097 RX_RING_SIZE * RX_BUFF_SIZE + 1098 i * TX_BUFF_SIZE); 1099 } 1100 1101 /* Setup I/O ASIC LANCE DMA. */ 1102 lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR]; 1103 ioasic_write(IO_REG_LANCE_DMA_P, 1104 CPHYSADDR(dev->mem_start) << 3); 1105 1106 break; 1107#ifdef CONFIG_TC 1108 case PMAD_LANCE: 1109 dev_set_drvdata(bdev, dev); 1110 1111 start = to_tc_dev(bdev)->resource.start; 1112 len = to_tc_dev(bdev)->resource.end - start + 1; 1113 if (!request_mem_region(start, len, dev_name(bdev))) { 1114 printk(KERN_ERR 1115 "%s: Unable to reserve MMIO resource\n", 1116 dev_name(bdev)); 1117 ret = -EBUSY; 1118 goto err_out_dev; 1119 } 1120 1121 dev->mem_start = CKSEG1ADDR(start); 1122 dev->mem_end = dev->mem_start + 0x100000; 1123 dev->base_addr = dev->mem_start + 0x100000; 1124 dev->irq = to_tc_dev(bdev)->interrupt; 1125 esar_base = dev->mem_start + 0x1c0002; 1126 lp->dma_irq = -1; 1127 1128 for (i = 0; i < RX_RING_SIZE; i++) { 1129 lp->rx_buf_ptr_cpu[i] = 1130 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1131 i * RX_BUFF_SIZE); 1132 lp->rx_buf_ptr_lnc[i] = 1133 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1134 } 1135 for (i = 0; i < TX_RING_SIZE; i++) { 1136 lp->tx_buf_ptr_cpu[i] = 1137 (char *)(dev->mem_start + BUF_OFFSET_CPU + 1138 RX_RING_SIZE * RX_BUFF_SIZE + 1139 i * TX_BUFF_SIZE); 1140 lp->tx_buf_ptr_lnc[i] = 1141 (BUF_OFFSET_LNC + 1142 RX_RING_SIZE * RX_BUFF_SIZE + 1143 i * TX_BUFF_SIZE); 1144 } 1145 1146 break; 1147#endif 1148 case PMAX_LANCE: 1149 dev->irq = dec_interrupt[DEC_IRQ_LANCE]; 1150 dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE); 1151 dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM); 1152 dev->mem_end = dev->mem_start + KN01_SLOT_SIZE; 1153 esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1); 1154 lp->dma_irq = -1; 1155 1156 /* 1157 * setup the pointer arrays, this sucks [tm] :-( 1158 */ 1159 for (i = 0; i < RX_RING_SIZE; i++) { 1160 lp->rx_buf_ptr_cpu[i] = 1161 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1162 2 * i * RX_BUFF_SIZE); 1163 lp->rx_buf_ptr_lnc[i] = 1164 (BUF_OFFSET_LNC + i * RX_BUFF_SIZE); 1165 } 1166 for (i = 0; i < TX_RING_SIZE; i++) { 1167 lp->tx_buf_ptr_cpu[i] = 1168 (char *)(dev->mem_start + 2 * BUF_OFFSET_CPU + 1169 2 * RX_RING_SIZE * RX_BUFF_SIZE + 1170 2 * i * TX_BUFF_SIZE); 1171 lp->tx_buf_ptr_lnc[i] = 1172 (BUF_OFFSET_LNC + 1173 RX_RING_SIZE * RX_BUFF_SIZE + 1174 i * TX_BUFF_SIZE); 1175 } 1176 1177 break; 1178 1179 default: 1180 printk(KERN_ERR "%s: declance_init called with unknown type\n", 1181 name); 1182 ret = -ENODEV; 1183 goto err_out_dev; 1184 } 1185 1186 ll = (struct lance_regs *) dev->base_addr; 1187 esar = (unsigned char *) esar_base; 1188 1189 /* prom checks */ 1190 /* First, check for test pattern */ 1191 if (esar[0x60] != 0xff && esar[0x64] != 0x00 && 1192 esar[0x68] != 0x55 && esar[0x6c] != 0xaa) { 1193 printk(KERN_ERR 1194 "%s: Ethernet station address prom not found!\n", 1195 name); 1196 ret = -ENODEV; 1197 goto err_out_resource; 1198 } 1199 /* Check the prom contents */ 1200 for (i = 0; i < 8; i++) { 1201 if (esar[i * 4] != esar[0x3c - i * 4] && 1202 esar[i * 4] != esar[0x40 + i * 4] && 1203 esar[0x3c - i * 4] != esar[0x40 + i * 4]) { 1204 printk(KERN_ERR "%s: Something is wrong with the " 1205 "ethernet station address prom!\n", name); 1206 ret = -ENODEV; 1207 goto err_out_resource; 1208 } 1209 } 1210 1211 /* Copy the ethernet address to the device structure, later to the 1212 * lance initialization block so the lance gets it every time it's 1213 * (re)initialized. 1214 */ 1215 switch (type) { 1216 case ASIC_LANCE: 1217 printk("%s: IOASIC onboard LANCE", name); 1218 break; 1219 case PMAD_LANCE: 1220 printk("%s: PMAD-AA", name); 1221 break; 1222 case PMAX_LANCE: 1223 printk("%s: PMAX onboard LANCE", name); 1224 break; 1225 } 1226 for (i = 0; i < 6; i++) 1227 dev->dev_addr[i] = esar[i * 4]; 1228 1229 printk(", addr = %pM, irq = %d\n", dev->dev_addr, dev->irq); 1230 1231 dev->netdev_ops = &lance_netdev_ops; 1232 dev->watchdog_timeo = 5*HZ; 1233 1234 /* lp->ll is the location of the registers for lance card */ 1235 lp->ll = ll; 1236 1237 /* busmaster_regval (CSR3) should be zero according to the PMAD-AA 1238 * specification. 1239 */ 1240 lp->busmaster_regval = 0; 1241 1242 dev->dma = 0; 1243 1244 /* We cannot sleep if the chip is busy during a 1245 * multicast list update event, because such events 1246 * can occur from interrupts (ex. IPv6). So we 1247 * use a timer to try again later when necessary. -DaveM 1248 */ 1249 init_timer(&lp->multicast_timer); 1250 lp->multicast_timer.data = (unsigned long) dev; 1251 lp->multicast_timer.function = &lance_set_multicast_retry; 1252 1253 ret = register_netdev(dev); 1254 if (ret) { 1255 printk(KERN_ERR 1256 "%s: Unable to register netdev, aborting.\n", name); 1257 goto err_out_resource; 1258 } 1259 1260 if (!bdev) { 1261 lp->next = root_lance_dev; 1262 root_lance_dev = dev; 1263 } 1264 1265 printk("%s: registered as %s.\n", name, dev->name); 1266 return 0; 1267 1268err_out_resource: 1269 if (bdev) 1270 release_mem_region(start, len); 1271 1272err_out_dev: 1273 free_netdev(dev); 1274 1275err_out: 1276 return ret; 1277} 1278 1279static void __exit dec_lance_remove(struct device *bdev) 1280{ 1281 struct net_device *dev = dev_get_drvdata(bdev); 1282 resource_size_t start, len; 1283 1284 unregister_netdev(dev); 1285 start = to_tc_dev(bdev)->resource.start; 1286 len = to_tc_dev(bdev)->resource.end - start + 1; 1287 release_mem_region(start, len); 1288 free_netdev(dev); 1289} 1290 1291/* Find all the lance cards on the system and initialize them */ 1292static int __init dec_lance_platform_probe(void) 1293{ 1294 int count = 0; 1295 1296 if (dec_interrupt[DEC_IRQ_LANCE] >= 0) { 1297 if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) { 1298 if (dec_lance_probe(NULL, ASIC_LANCE) >= 0) 1299 count++; 1300 } else if (!TURBOCHANNEL) { 1301 if (dec_lance_probe(NULL, PMAX_LANCE) >= 0) 1302 count++; 1303 } 1304 } 1305 1306 return (count > 0) ? 0 : -ENODEV; 1307} 1308 1309static void __exit dec_lance_platform_remove(void) 1310{ 1311 while (root_lance_dev) { 1312 struct net_device *dev = root_lance_dev; 1313 struct lance_private *lp = netdev_priv(dev); 1314 1315 unregister_netdev(dev); 1316 root_lance_dev = lp->next; 1317 free_netdev(dev); 1318 } 1319} 1320 1321#ifdef CONFIG_TC 1322static int __devinit dec_lance_tc_probe(struct device *dev); 1323static int __exit dec_lance_tc_remove(struct device *dev); 1324 1325static const struct tc_device_id dec_lance_tc_table[] = { 1326 { "DEC ", "PMAD-AA " }, 1327 { } 1328}; 1329MODULE_DEVICE_TABLE(tc, dec_lance_tc_table); 1330 1331static struct tc_driver dec_lance_tc_driver = { 1332 .id_table = dec_lance_tc_table, 1333 .driver = { 1334 .name = "declance", 1335 .bus = &tc_bus_type, 1336 .probe = dec_lance_tc_probe, 1337 .remove = __exit_p(dec_lance_tc_remove), 1338 }, 1339}; 1340 1341static int __devinit dec_lance_tc_probe(struct device *dev) 1342{ 1343 int status = dec_lance_probe(dev, PMAD_LANCE); 1344 if (!status) 1345 get_device(dev); 1346 return status; 1347} 1348 1349static int __exit dec_lance_tc_remove(struct device *dev) 1350{ 1351 put_device(dev); 1352 dec_lance_remove(dev); 1353 return 0; 1354} 1355#endif 1356 1357static int __init dec_lance_init(void) 1358{ 1359 int status; 1360 1361 status = tc_register_driver(&dec_lance_tc_driver); 1362 if (!status) 1363 dec_lance_platform_probe(); 1364 return status; 1365} 1366 1367static void __exit dec_lance_exit(void) 1368{ 1369 dec_lance_platform_remove(); 1370 tc_unregister_driver(&dec_lance_tc_driver); 1371} 1372 1373 1374module_init(dec_lance_init); 1375module_exit(dec_lance_exit); 1376