1/* 2 * stradis.c - stradis 4:2:2 mpeg decoder driver 3 * 4 * Stradis 4:2:2 MPEG-2 Decoder Driver 5 * Copyright (C) 1999 Nathan Laredo <laredo@gnu.org> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22#include <linux/module.h> 23#include <linux/delay.h> 24#include <linux/errno.h> 25#include <linux/fs.h> 26#include <linux/kernel.h> 27#include <linux/major.h> 28#include <linux/slab.h> 29#include <linux/smp_lock.h> 30#include <linux/mm.h> 31#include <linux/init.h> 32#include <linux/poll.h> 33#include <linux/pci.h> 34#include <linux/signal.h> 35#include <asm/io.h> 36#include <linux/ioport.h> 37#include <asm/pgtable.h> 38#include <asm/page.h> 39#include <linux/sched.h> 40#include <asm/types.h> 41#include <linux/types.h> 42#include <linux/interrupt.h> 43#include <asm/uaccess.h> 44#include <linux/vmalloc.h> 45#include <linux/videodev.h> 46#include <media/v4l2-common.h> 47#include <media/v4l2-ioctl.h> 48 49#include "saa7146.h" 50#include "saa7146reg.h" 51#include "ibmmpeg2.h" 52#include "saa7121.h" 53#include "cs8420.h" 54 55#define DEBUG(x) /* debug driver */ 56#undef IDEBUG /* debug irq handler */ 57#undef MDEBUG /* debug memory management */ 58 59#define SAA7146_MAX 6 60 61static struct saa7146 saa7146s[SAA7146_MAX]; 62 63static int saa_num; /* number of SAA7146s in use */ 64 65static int video_nr = -1; 66module_param(video_nr, int, 0); 67MODULE_LICENSE("GPL"); 68 69#define nDebNormal 0x00480000 70#define nDebNoInc 0x00480000 71#define nDebVideo 0xd0480000 72#define nDebAudio 0xd0400000 73#define nDebDMA 0x02c80000 74 75#define oDebNormal 0x13c80000 76#define oDebNoInc 0x13c80000 77#define oDebVideo 0xd1080000 78#define oDebAudio 0xd1080000 79#define oDebDMA 0x03080000 80 81#define NewCard (saa->boardcfg[3]) 82#define ChipControl (saa->boardcfg[1]) 83#define NTSCFirstActive (saa->boardcfg[4]) 84#define PALFirstActive (saa->boardcfg[5]) 85#define NTSCLastActive (saa->boardcfg[54]) 86#define PALLastActive (saa->boardcfg[55]) 87#define Have2MB (saa->boardcfg[18] & 0x40) 88#define HaveCS8420 (saa->boardcfg[18] & 0x04) 89#define IBMMPEGCD20 (saa->boardcfg[18] & 0x20) 90#define HaveCS3310 (saa->boardcfg[18] & 0x01) 91#define CS3310MaxLvl ((saa->boardcfg[30] << 8) | saa->boardcfg[31]) 92#define HaveCS4341 (saa->boardcfg[40] == 2) 93#define SDIType (saa->boardcfg[27]) 94#define CurrentMode (saa->boardcfg[2]) 95 96#define debNormal (NewCard ? nDebNormal : oDebNormal) 97#define debNoInc (NewCard ? nDebNoInc : oDebNoInc) 98#define debVideo (NewCard ? nDebVideo : oDebVideo) 99#define debAudio (NewCard ? nDebAudio : oDebAudio) 100#define debDMA (NewCard ? nDebDMA : oDebDMA) 101 102#ifdef USE_RESCUE_EEPROM_SDM275 103static unsigned char rescue_eeprom[64] = { 104 0x00, 0x01, 0x04, 0x13, 0x26, 0x0f, 0x10, 0x00, 0x00, 0x00, 0x43, 0x63, 105 0x22, 0x01, 0x29, 0x15, 0x73, 0x00, 0x1f, 'd', 'e', 'c', 'x', 'l', 106 'd', 'v', 'a', 0x02, 0x00, 0x01, 0x00, 0xcc, 0xa4, 0x63, 0x09, 0xe2, 107 0x10, 0x00, 0x0a, 0x00, 0x02, 0x02, 'd', 'e', 'c', 'x', 'l', 'a', 108 0x00, 0x00, 0x42, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 109 0x00, 0x00, 0x00, 0x00, 110}; 111#endif 112 113/* ----------------------------------------------------------------------- */ 114/* Hardware I2C functions */ 115static void I2CWipe(struct saa7146 *saa) 116{ 117 int i; 118 /* set i2c to ~=100kHz, abort transfer, clear busy */ 119 saawrite(0x600 | SAA7146_I2C_ABORT, SAA7146_I2C_STATUS); 120 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 121 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 122 /* wait for i2c registers to be programmed */ 123 for (i = 0; i < 1000 && 124 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 125 schedule(); 126 saawrite(0x600, SAA7146_I2C_STATUS); 127 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 128 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 129 /* wait for i2c registers to be programmed */ 130 for (i = 0; i < 1000 && 131 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 132 schedule(); 133 saawrite(0x600, SAA7146_I2C_STATUS); 134 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 135 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 136 /* wait for i2c registers to be programmed */ 137 for (i = 0; i < 1000 && 138 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 139 schedule(); 140} 141 142/* read I2C */ 143static int I2CRead(struct saa7146 *saa, unsigned char addr, 144 unsigned char subaddr, int dosub) 145{ 146 int i; 147 148 if (saaread(SAA7146_I2C_STATUS) & 0x3c) 149 I2CWipe(saa); 150 for (i = 0; 151 i < 1000 && (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); 152 i++) 153 schedule(); 154 if (i == 1000) 155 I2CWipe(saa); 156 if (dosub) 157 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 8) | 158 ((subaddr & 0xff) << 16) | 0xed, SAA7146_I2C_TRANSFER); 159 else 160 saawrite(((addr & 0xfe) << 24) | (((addr | 1) & 0xff) << 16) | 161 0xf1, SAA7146_I2C_TRANSFER); 162 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 163 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 164 /* wait for i2c registers to be programmed */ 165 for (i = 0; i < 1000 && 166 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 167 schedule(); 168 /* wait for valid data */ 169 for (i = 0; i < 1000 && 170 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 171 schedule(); 172 if (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_ERR) 173 return -1; 174 if (i == 1000) 175 printk("i2c setup read timeout\n"); 176 saawrite(0x41, SAA7146_I2C_TRANSFER); 177 saawrite((SAA7146_MC2_UPLD_I2C << 16) | 178 SAA7146_MC2_UPLD_I2C, SAA7146_MC2); 179 /* wait for i2c registers to be programmed */ 180 for (i = 0; i < 1000 && 181 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_I2C); i++) 182 schedule(); 183 /* wait for valid data */ 184 for (i = 0; i < 1000 && 185 (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_BUSY); i++) 186 schedule(); 187 if (saaread(SAA7146_I2C_TRANSFER) & SAA7146_I2C_ERR) 188 return -1; 189 if (i == 1000) 190 printk("i2c read timeout\n"); 191 return ((saaread(SAA7146_I2C_TRANSFER) >> 24) & 0xff); 192} 193 194/* set both to write both bytes, reset it to write only b1 */ 195 196static int I2CWrite(struct saa7146 *saa, unsigned char addr, unsigned char b1, 197 unsigned char b2, int both) 198{ 199 int i; 200 u32 data; 201 202 if (saaread(SAA7146_I2C_STATUS) & 0x3c) 203 I2CWipe(saa); 204 for (i = 0; i < 1000 && 205 (saaread(SAA7146_I2C_STATUS) & SAA7146_I2C_BUSY); i++) 206 schedule(); 207 if (i == 1000) 208 I2CWipe(saa); 209 data = ((addr & 0xfe) << 24) | ((b1 & 0xff) << 16); 210 if (both) 211 data |= ((b2 & 0xff) << 8) | 0xe5; 212 else 213 data |= 0xd1; 214 saawrite(data, SAA7146_I2C_TRANSFER); 215 saawrite((SAA7146_MC2_UPLD_I2C << 16) | SAA7146_MC2_UPLD_I2C, 216 SAA7146_MC2); 217 return 0; 218} 219 220static void attach_inform(struct saa7146 *saa, int id) 221{ 222 int i; 223 224 DEBUG(printk(KERN_DEBUG "stradis%d: i2c: device found=%02x\n", saa->nr, 225 id)); 226 if (id == 0xa0) { /* we have rev2 or later board, fill in info */ 227 for (i = 0; i < 64; i++) 228 saa->boardcfg[i] = I2CRead(saa, 0xa0, i, 1); 229#ifdef USE_RESCUE_EEPROM_SDM275 230 if (saa->boardcfg[0] != 0) { 231 printk("stradis%d: WARNING: EEPROM STORED VALUES HAVE " 232 "BEEN IGNORED\n", saa->nr); 233 for (i = 0; i < 64; i++) 234 saa->boardcfg[i] = rescue_eeprom[i]; 235 } 236#endif 237 printk("stradis%d: config =", saa->nr); 238 for (i = 0; i < 51; i++) { 239 printk(" %02x", saa->boardcfg[i]); 240 } 241 printk("\n"); 242 } 243} 244 245static void I2CBusScan(struct saa7146 *saa) 246{ 247 int i; 248 for (i = 0; i < 0xff; i += 2) 249 if ((I2CRead(saa, i, 0, 0)) >= 0) 250 attach_inform(saa, i); 251} 252 253static int debiwait_maxwait; 254 255static int wait_for_debi_done(struct saa7146 *saa) 256{ 257 int i; 258 259 /* wait for registers to be programmed */ 260 for (i = 0; i < 100000 && 261 !(saaread(SAA7146_MC2) & SAA7146_MC2_UPLD_DEBI); i++) 262 saaread(SAA7146_MC2); 263 /* wait for transfer to complete */ 264 for (i = 0; i < 500000 && 265 (saaread(SAA7146_PSR) & SAA7146_PSR_DEBI_S); i++) 266 saaread(SAA7146_MC2); 267 268 if (i > debiwait_maxwait) 269 printk("wait-for-debi-done maxwait: %d\n", 270 debiwait_maxwait = i); 271 272 if (i == 500000) 273 return -1; 274 275 return 0; 276} 277 278static int debiwrite(struct saa7146 *saa, u32 config, int addr, 279 u32 val, int count) 280{ 281 u32 cmd; 282 if (count <= 0 || count > 32764) 283 return -1; 284 if (wait_for_debi_done(saa) < 0) 285 return -1; 286 saawrite(config, SAA7146_DEBI_CONFIG); 287 if (count <= 4) /* immediate transfer */ 288 saawrite(val, SAA7146_DEBI_AD); 289 else /* block transfer */ 290 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD); 291 saawrite((cmd = (count << 17) | (addr & 0xffff)), SAA7146_DEBI_COMMAND); 292 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI, 293 SAA7146_MC2); 294 return 0; 295} 296 297static u32 debiread(struct saa7146 *saa, u32 config, int addr, int count) 298{ 299 u32 result = 0; 300 301 if (count > 32764 || count <= 0) 302 return 0; 303 if (wait_for_debi_done(saa) < 0) 304 return 0; 305 saawrite(virt_to_bus(saa->dmadebi), SAA7146_DEBI_AD); 306 saawrite((count << 17) | 0x10000 | (addr & 0xffff), 307 SAA7146_DEBI_COMMAND); 308 saawrite(config, SAA7146_DEBI_CONFIG); 309 saawrite((SAA7146_MC2_UPLD_DEBI << 16) | SAA7146_MC2_UPLD_DEBI, 310 SAA7146_MC2); 311 if (count > 4) /* not an immediate transfer */ 312 return count; 313 wait_for_debi_done(saa); 314 result = saaread(SAA7146_DEBI_AD); 315 if (count == 1) 316 result &= 0xff; 317 if (count == 2) 318 result &= 0xffff; 319 if (count == 3) 320 result &= 0xffffff; 321 return result; 322} 323 324static void do_irq_send_data(struct saa7146 *saa) 325{ 326 int split, audbytes, vidbytes; 327 328 saawrite(SAA7146_PSR_PIN1, SAA7146_IER); 329 /* if special feature mode in effect, disable audio sending */ 330 if (saa->playmode != VID_PLAY_NORMAL) 331 saa->audtail = saa->audhead = 0; 332 if (saa->audhead <= saa->audtail) 333 audbytes = saa->audtail - saa->audhead; 334 else 335 audbytes = 65536 - (saa->audhead - saa->audtail); 336 if (saa->vidhead <= saa->vidtail) 337 vidbytes = saa->vidtail - saa->vidhead; 338 else 339 vidbytes = 524288 - (saa->vidhead - saa->vidtail); 340 if (audbytes == 0 && vidbytes == 0 && saa->osdtail == saa->osdhead) { 341 saawrite(0, SAA7146_IER); 342 return; 343 } 344 /* if at least 1 block audio waiting and audio fifo isn't full */ 345 if (audbytes >= 2048 && (debiread(saa, debNormal, IBM_MP2_AUD_FIFO, 2) 346 & 0xff) < 60) { 347 if (saa->audhead > saa->audtail) 348 split = 65536 - saa->audhead; 349 else 350 split = 0; 351 audbytes = 2048; 352 if (split > 0 && split < 2048) { 353 memcpy(saa->dmadebi, saa->audbuf + saa->audhead, split); 354 saa->audhead = 0; 355 audbytes -= split; 356 } else 357 split = 0; 358 memcpy(saa->dmadebi + split, saa->audbuf + saa->audhead, 359 audbytes); 360 saa->audhead += audbytes; 361 saa->audhead &= 0xffff; 362 debiwrite(saa, debAudio, (NewCard ? IBM_MP2_AUD_FIFO : 363 IBM_MP2_AUD_FIFOW), 0, 2048); 364 wake_up_interruptible(&saa->audq); 365 /* if at least 1 block video waiting and video fifo isn't full */ 366 } else if (vidbytes >= 30720 && (debiread(saa, debNormal, 367 IBM_MP2_FIFO, 2)) < 16384) { 368 if (saa->vidhead > saa->vidtail) 369 split = 524288 - saa->vidhead; 370 else 371 split = 0; 372 vidbytes = 30720; 373 if (split > 0 && split < 30720) { 374 memcpy(saa->dmadebi, saa->vidbuf + saa->vidhead, split); 375 saa->vidhead = 0; 376 vidbytes -= split; 377 } else 378 split = 0; 379 memcpy(saa->dmadebi + split, saa->vidbuf + saa->vidhead, 380 vidbytes); 381 saa->vidhead += vidbytes; 382 saa->vidhead &= 0x7ffff; 383 debiwrite(saa, debVideo, (NewCard ? IBM_MP2_FIFO : 384 IBM_MP2_FIFOW), 0, 30720); 385 wake_up_interruptible(&saa->vidq); 386 } 387 saawrite(SAA7146_PSR_DEBI_S | SAA7146_PSR_PIN1, SAA7146_IER); 388} 389 390static void send_osd_data(struct saa7146 *saa) 391{ 392 int size = saa->osdtail - saa->osdhead; 393 if (size > 30720) 394 size = 30720; 395 /* ensure some multiple of 8 bytes is transferred */ 396 size = 8 * ((size + 8) >> 3); 397 if (size) { 398 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 399 (saa->osdhead >> 3), 2); 400 memcpy(saa->dmadebi, &saa->osdbuf[saa->osdhead], size); 401 saa->osdhead += size; 402 /* block transfer of next 8 bytes to ~32k bytes */ 403 debiwrite(saa, debNormal, IBM_MP2_OSD_DATA, 0, size); 404 } 405 if (saa->osdhead >= saa->osdtail) { 406 saa->osdhead = saa->osdtail = 0; 407 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 408 } 409} 410 411static irqreturn_t saa7146_irq(int irq, void *dev_id) 412{ 413 struct saa7146 *saa = dev_id; 414 u32 stat, astat; 415 int count; 416 int handled = 0; 417 418 count = 0; 419 while (1) { 420 /* get/clear interrupt status bits */ 421 stat = saaread(SAA7146_ISR); 422 astat = stat & saaread(SAA7146_IER); 423 if (!astat) 424 break; 425 handled = 1; 426 saawrite(astat, SAA7146_ISR); 427 if (astat & SAA7146_PSR_DEBI_S) { 428 do_irq_send_data(saa); 429 } 430 if (astat & SAA7146_PSR_PIN1) { 431 int istat; 432 /* the following read will trigger DEBI_S */ 433 istat = debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 434 if (istat & 1) { 435 saawrite(0, SAA7146_IER); 436 send_osd_data(saa); 437 saawrite(SAA7146_PSR_DEBI_S | 438 SAA7146_PSR_PIN1, SAA7146_IER); 439 } 440 if (istat & 0x20) { /* Video Start */ 441 saa->vidinfo.frame_count++; 442 } 443 if (istat & 0x400) { /* Picture Start */ 444 /* update temporal reference */ 445 } 446 if (istat & 0x200) { /* Picture Resolution Change */ 447 /* read new resolution */ 448 } 449 if (istat & 0x100) { /* New User Data found */ 450 /* read new user data */ 451 } 452 if (istat & 0x1000) { /* new GOP/SMPTE */ 453 /* read new SMPTE */ 454 } 455 if (istat & 0x8000) { /* Sequence Start Code */ 456 /* reset frame counter, load sizes */ 457 saa->vidinfo.frame_count = 0; 458 saa->vidinfo.h_size = 704; 459 saa->vidinfo.v_size = 480; 460 } 461 if (istat & 0x4000) { /* Sequence Error Code */ 462 if (saa->endmarkhead != saa->endmarktail) { 463 saa->audhead = 464 saa->endmark[saa->endmarkhead]; 465 saa->endmarkhead++; 466 if (saa->endmarkhead >= MAX_MARKS) 467 saa->endmarkhead = 0; 468 } 469 } 470 } 471#ifdef IDEBUG 472 if (astat & SAA7146_PSR_PPEF) { 473 IDEBUG(printk("stradis%d irq: PPEF\n", saa->nr)); 474 } 475 if (astat & SAA7146_PSR_PABO) { 476 IDEBUG(printk("stradis%d irq: PABO\n", saa->nr)); 477 } 478 if (astat & SAA7146_PSR_PPED) { 479 IDEBUG(printk("stradis%d irq: PPED\n", saa->nr)); 480 } 481 if (astat & SAA7146_PSR_RPS_I1) { 482 IDEBUG(printk("stradis%d irq: RPS_I1\n", saa->nr)); 483 } 484 if (astat & SAA7146_PSR_RPS_I0) { 485 IDEBUG(printk("stradis%d irq: RPS_I0\n", saa->nr)); 486 } 487 if (astat & SAA7146_PSR_RPS_LATE1) { 488 IDEBUG(printk("stradis%d irq: RPS_LATE1\n", saa->nr)); 489 } 490 if (astat & SAA7146_PSR_RPS_LATE0) { 491 IDEBUG(printk("stradis%d irq: RPS_LATE0\n", saa->nr)); 492 } 493 if (astat & SAA7146_PSR_RPS_E1) { 494 IDEBUG(printk("stradis%d irq: RPS_E1\n", saa->nr)); 495 } 496 if (astat & SAA7146_PSR_RPS_E0) { 497 IDEBUG(printk("stradis%d irq: RPS_E0\n", saa->nr)); 498 } 499 if (astat & SAA7146_PSR_RPS_TO1) { 500 IDEBUG(printk("stradis%d irq: RPS_TO1\n", saa->nr)); 501 } 502 if (astat & SAA7146_PSR_RPS_TO0) { 503 IDEBUG(printk("stradis%d irq: RPS_TO0\n", saa->nr)); 504 } 505 if (astat & SAA7146_PSR_UPLD) { 506 IDEBUG(printk("stradis%d irq: UPLD\n", saa->nr)); 507 } 508 if (astat & SAA7146_PSR_DEBI_E) { 509 IDEBUG(printk("stradis%d irq: DEBI_E\n", saa->nr)); 510 } 511 if (astat & SAA7146_PSR_I2C_S) { 512 IDEBUG(printk("stradis%d irq: I2C_S\n", saa->nr)); 513 } 514 if (astat & SAA7146_PSR_I2C_E) { 515 IDEBUG(printk("stradis%d irq: I2C_E\n", saa->nr)); 516 } 517 if (astat & SAA7146_PSR_A2_IN) { 518 IDEBUG(printk("stradis%d irq: A2_IN\n", saa->nr)); 519 } 520 if (astat & SAA7146_PSR_A2_OUT) { 521 IDEBUG(printk("stradis%d irq: A2_OUT\n", saa->nr)); 522 } 523 if (astat & SAA7146_PSR_A1_IN) { 524 IDEBUG(printk("stradis%d irq: A1_IN\n", saa->nr)); 525 } 526 if (astat & SAA7146_PSR_A1_OUT) { 527 IDEBUG(printk("stradis%d irq: A1_OUT\n", saa->nr)); 528 } 529 if (astat & SAA7146_PSR_AFOU) { 530 IDEBUG(printk("stradis%d irq: AFOU\n", saa->nr)); 531 } 532 if (astat & SAA7146_PSR_V_PE) { 533 IDEBUG(printk("stradis%d irq: V_PE\n", saa->nr)); 534 } 535 if (astat & SAA7146_PSR_VFOU) { 536 IDEBUG(printk("stradis%d irq: VFOU\n", saa->nr)); 537 } 538 if (astat & SAA7146_PSR_FIDA) { 539 IDEBUG(printk("stradis%d irq: FIDA\n", saa->nr)); 540 } 541 if (astat & SAA7146_PSR_FIDB) { 542 IDEBUG(printk("stradis%d irq: FIDB\n", saa->nr)); 543 } 544 if (astat & SAA7146_PSR_PIN3) { 545 IDEBUG(printk("stradis%d irq: PIN3\n", saa->nr)); 546 } 547 if (astat & SAA7146_PSR_PIN2) { 548 IDEBUG(printk("stradis%d irq: PIN2\n", saa->nr)); 549 } 550 if (astat & SAA7146_PSR_PIN0) { 551 IDEBUG(printk("stradis%d irq: PIN0\n", saa->nr)); 552 } 553 if (astat & SAA7146_PSR_ECS) { 554 IDEBUG(printk("stradis%d irq: ECS\n", saa->nr)); 555 } 556 if (astat & SAA7146_PSR_EC3S) { 557 IDEBUG(printk("stradis%d irq: EC3S\n", saa->nr)); 558 } 559 if (astat & SAA7146_PSR_EC0S) { 560 IDEBUG(printk("stradis%d irq: EC0S\n", saa->nr)); 561 } 562#endif 563 count++; 564 if (count > 15) 565 printk(KERN_WARNING "stradis%d: irq loop %d\n", 566 saa->nr, count); 567 if (count > 20) { 568 saawrite(0, SAA7146_IER); 569 printk(KERN_ERR 570 "stradis%d: IRQ loop cleared\n", saa->nr); 571 } 572 } 573 return IRQ_RETVAL(handled); 574} 575 576static int ibm_send_command(struct saa7146 *saa, 577 int command, int data, int chain) 578{ 579 int i; 580 581 if (chain) 582 debiwrite(saa, debNormal, IBM_MP2_COMMAND, (command << 1)| 1,2); 583 else 584 debiwrite(saa, debNormal, IBM_MP2_COMMAND, command << 1, 2); 585 debiwrite(saa, debNormal, IBM_MP2_CMD_DATA, data, 2); 586 debiwrite(saa, debNormal, IBM_MP2_CMD_STAT, 1, 2); 587 for (i = 0; i < 100 && 588 (debiread(saa, debNormal, IBM_MP2_CMD_STAT, 2) & 1); i++) 589 schedule(); 590 if (i == 100) 591 return -1; 592 return 0; 593} 594 595static void cs4341_setlevel(struct saa7146 *saa, int left, int right) 596{ 597 I2CWrite(saa, 0x22, 0x03, left > 94 ? 94 : left, 2); 598 I2CWrite(saa, 0x22, 0x04, right > 94 ? 94 : right, 2); 599} 600 601static void initialize_cs4341(struct saa7146 *saa) 602{ 603 int i; 604 for (i = 0; i < 200; i++) { 605 /* auto mute off, power on, no de-emphasis */ 606 /* I2S data up to 24-bit 64xFs internal SCLK */ 607 I2CWrite(saa, 0x22, 0x01, 0x11, 2); 608 /* ATAPI mixer settings */ 609 I2CWrite(saa, 0x22, 0x02, 0x49, 2); 610 /* attenuation left 3db */ 611 I2CWrite(saa, 0x22, 0x03, 0x00, 2); 612 /* attenuation right 3db */ 613 I2CWrite(saa, 0x22, 0x04, 0x00, 2); 614 I2CWrite(saa, 0x22, 0x01, 0x10, 2); 615 if (I2CRead(saa, 0x22, 0x02, 1) == 0x49) 616 break; 617 schedule(); 618 } 619 printk("stradis%d: CS4341 initialized (%d)\n", saa->nr, i); 620 return; 621} 622 623static void initialize_cs8420(struct saa7146 *saa, int pro) 624{ 625 int i; 626 u8 *sequence; 627 if (pro) 628 sequence = mode8420pro; 629 else 630 sequence = mode8420con; 631 for (i = 0; i < INIT8420LEN; i++) 632 I2CWrite(saa, 0x20, init8420[i * 2], init8420[i * 2 + 1], 2); 633 for (i = 0; i < MODE8420LEN; i++) 634 I2CWrite(saa, 0x20, sequence[i * 2], sequence[i * 2 + 1], 2); 635 printk("stradis%d: CS8420 initialized\n", saa->nr); 636} 637 638static void initialize_saa7121(struct saa7146 *saa, int dopal) 639{ 640 int i, mod; 641 u8 *sequence; 642 if (dopal) 643 sequence = init7121pal; 644 else 645 sequence = init7121ntsc; 646 mod = saaread(SAA7146_PSR) & 0x08; 647 /* initialize PAL/NTSC video encoder */ 648 for (i = 0; i < INIT7121LEN; i++) { 649 if (NewCard) { /* handle new card encoder differences */ 650 if (sequence[i * 2] == 0x3a) 651 I2CWrite(saa, 0x88, 0x3a, 0x13, 2); 652 else if (sequence[i * 2] == 0x6b) 653 I2CWrite(saa, 0x88, 0x6b, 0x20, 2); 654 else if (sequence[i * 2] == 0x6c) 655 I2CWrite(saa, 0x88, 0x6c, 656 dopal ? 0x09 : 0xf5, 2); 657 else if (sequence[i * 2] == 0x6d) 658 I2CWrite(saa, 0x88, 0x6d, 659 dopal ? 0x20 : 0x00, 2); 660 else if (sequence[i * 2] == 0x7a) 661 I2CWrite(saa, 0x88, 0x7a, 662 dopal ? (PALFirstActive - 1) : 663 (NTSCFirstActive - 4), 2); 664 else if (sequence[i * 2] == 0x7b) 665 I2CWrite(saa, 0x88, 0x7b, 666 dopal ? PALLastActive : 667 NTSCLastActive, 2); 668 else 669 I2CWrite(saa, 0x88, sequence[i * 2], 670 sequence[i * 2 + 1], 2); 671 } else { 672 if (sequence[i * 2] == 0x6b && mod) 673 I2CWrite(saa, 0x88, 0x6b, 674 (sequence[i * 2 + 1] ^ 0x09), 2); 675 else if (sequence[i * 2] == 0x7a) 676 I2CWrite(saa, 0x88, 0x7a, 677 dopal ? (PALFirstActive - 1) : 678 (NTSCFirstActive - 4), 2); 679 else if (sequence[i * 2] == 0x7b) 680 I2CWrite(saa, 0x88, 0x7b, 681 dopal ? PALLastActive : 682 NTSCLastActive, 2); 683 else 684 I2CWrite(saa, 0x88, sequence[i * 2], 685 sequence[i * 2 + 1], 2); 686 } 687 } 688} 689 690static void set_genlock_offset(struct saa7146 *saa, int noffset) 691{ 692 int nCode; 693 int PixelsPerLine = 858; 694 if (CurrentMode == VIDEO_MODE_PAL) 695 PixelsPerLine = 864; 696 if (noffset > 500) 697 noffset = 500; 698 else if (noffset < -500) 699 noffset = -500; 700 nCode = noffset + 0x100; 701 if (nCode == 1) 702 nCode = 0x401; 703 else if (nCode < 1) 704 nCode = 0x400 + PixelsPerLine + nCode; 705 debiwrite(saa, debNormal, XILINX_GLDELAY, nCode, 2); 706} 707 708static void set_out_format(struct saa7146 *saa, int mode) 709{ 710 initialize_saa7121(saa, (mode == VIDEO_MODE_NTSC ? 0 : 1)); 711 saa->boardcfg[2] = mode; 712 /* do not adjust analog video parameters here, use saa7121 init */ 713 /* you will affect the SDI output on the new card */ 714 if (mode == VIDEO_MODE_PAL) { /* PAL */ 715 debiwrite(saa, debNormal, XILINX_CTL0, 0x0808, 2); 716 mdelay(50); 717 saawrite(0x012002c0, SAA7146_NUM_LINE_BYTE1); 718 if (NewCard) { 719 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 0xe100, 2); 720 mdelay(50); 721 } 722 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 723 NewCard ? 0xe500 : 0x6500, 2); 724 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY, 725 (1 << 8) | 726 (NewCard ? PALFirstActive : PALFirstActive - 6), 2); 727 } else { /* NTSC */ 728 debiwrite(saa, debNormal, XILINX_CTL0, 0x0800, 2); 729 mdelay(50); 730 saawrite(0x00f002c0, SAA7146_NUM_LINE_BYTE1); 731 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 732 NewCard ? 0xe100 : 0x6100, 2); 733 debiwrite(saa, debNormal, IBM_MP2_DISP_DLY, 734 (1 << 8) | 735 (NewCard ? NTSCFirstActive : NTSCFirstActive - 6), 2); 736 } 737} 738 739/* Intialize bitmangler to map from a byte value to the mangled word that 740 * must be output to program the Xilinx part through the DEBI port. 741 * Xilinx Data Bit->DEBI Bit: 0->15 1->7 2->6 3->12 4->11 5->2 6->1 7->0 742 * transfer FPGA code, init IBM chip, transfer IBM microcode 743 * rev2 card mangles: 0->7 1->6 2->5 3->4 4->3 5->2 6->1 7->0 744 */ 745static u16 bitmangler[256]; 746 747static int initialize_fpga(struct video_code *bitdata) 748{ 749 int i, num, startindex, failure = 0, loadtwo, loadfile = 0; 750 u16 *dmabuf; 751 u8 *newdma; 752 struct saa7146 *saa; 753 754 /* verify fpga code */ 755 for (startindex = 0; startindex < bitdata->datasize; startindex++) 756 if (bitdata->data[startindex] == 255) 757 break; 758 if (startindex == bitdata->datasize) { 759 printk(KERN_INFO "stradis: bad fpga code\n"); 760 return -1; 761 } 762 /* initialize all detected cards */ 763 for (num = 0; num < saa_num; num++) { 764 saa = &saa7146s[num]; 765 if (saa->boardcfg[0] > 20) 766 continue; /* card was programmed */ 767 loadtwo = (saa->boardcfg[18] & 0x10); 768 if (!NewCard) /* we have an old board */ 769 for (i = 0; i < 256; i++) 770 bitmangler[i] = ((i & 0x01) << 15) | 771 ((i & 0x02) << 6) | ((i & 0x04) << 4) | 772 ((i & 0x08) << 9) | ((i & 0x10) << 7) | 773 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) | 774 ((i & 0x80) >> 7); 775 else /* else we have a new board */ 776 for (i = 0; i < 256; i++) 777 bitmangler[i] = ((i & 0x01) << 7) | 778 ((i & 0x02) << 5) | ((i & 0x04) << 3) | 779 ((i & 0x08) << 1) | ((i & 0x10) >> 1) | 780 ((i & 0x20) >> 3) | ((i & 0x40) >> 5) | 781 ((i & 0x80) >> 7); 782 783 dmabuf = (u16 *) saa->dmadebi; 784 newdma = (u8 *) saa->dmadebi; 785 if (NewCard) { /* SDM2xxx */ 786 if (!strncmp(bitdata->loadwhat, "decoder2", 8)) 787 continue; /* fpga not for this card */ 788 if (!strncmp(&saa->boardcfg[42], bitdata->loadwhat, 8)) 789 loadfile = 1; 790 else if (loadtwo && !strncmp(&saa->boardcfg[19], 791 bitdata->loadwhat, 8)) 792 loadfile = 2; 793 else if (!saa->boardcfg[42] && !strncmp("decxl", 794 bitdata->loadwhat, 8)) 795 loadfile = 1; /* special */ 796 else 797 continue; /* fpga not for this card */ 798 if (loadfile != 1 && loadfile != 2) 799 continue; /* skip to next card */ 800 if (saa->boardcfg[0] && loadfile == 1) 801 continue; /* skip to next card */ 802 if (saa->boardcfg[0] != 1 && loadfile == 2) 803 continue; /* skip to next card */ 804 saa->boardcfg[0]++; /* mark fpga handled */ 805 printk("stradis%d: loading %s\n", saa->nr, 806 bitdata->loadwhat); 807 if (loadtwo && loadfile == 2) 808 goto send_fpga_stuff; 809 /* turn on the Audio interface to set PROG low */ 810 saawrite(0x00400040, SAA7146_GPIO_CTRL); 811 saaread(SAA7146_PSR); /* ensure posted write */ 812 /* wait for everyone to reset */ 813 mdelay(10); 814 saawrite(0x00400000, SAA7146_GPIO_CTRL); 815 } else { /* original card */ 816 if (strncmp(bitdata->loadwhat, "decoder2", 8)) 817 continue; /* fpga not for this card */ 818 /* Pull the Xilinx PROG signal WS3 low */ 819 saawrite(0x02000200, SAA7146_MC1); 820 /* Turn on the Audio interface so can set PROG low */ 821 saawrite(0x000000c0, SAA7146_ACON1); 822 /* Pull the Xilinx INIT signal (GPIO2) low */ 823 saawrite(0x00400000, SAA7146_GPIO_CTRL); 824 /* Make sure everybody resets */ 825 saaread(SAA7146_PSR); /* ensure posted write */ 826 mdelay(10); 827 /* Release the Xilinx PROG signal */ 828 saawrite(0x00000000, SAA7146_ACON1); 829 /* Turn off the Audio interface */ 830 saawrite(0x02000000, SAA7146_MC1); 831 } 832 /* Release Xilinx INIT signal (WS2) */ 833 saawrite(0x00000000, SAA7146_GPIO_CTRL); 834 /* Wait for the INIT to go High */ 835 for (i = 0; 836 i < 10000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); 837 i++) 838 schedule(); 839 if (i == 1000) { 840 printk(KERN_INFO "stradis%d: no fpga INIT\n", saa->nr); 841 return -1; 842 } 843send_fpga_stuff: 844 if (NewCard) { 845 for (i = startindex; i < bitdata->datasize; i++) 846 newdma[i - startindex] = 847 bitmangler[bitdata->data[i]]; 848 debiwrite(saa, 0x01420000, 0, 0, 849 ((bitdata->datasize - startindex) + 5)); 850 if (loadtwo && loadfile == 1) { 851 printk("stradis%d: awaiting 2nd FPGA bitfile\n", 852 saa->nr); 853 continue; /* skip to next card */ 854 } 855 } else { 856 for (i = startindex; i < bitdata->datasize; i++) 857 dmabuf[i - startindex] = 858 bitmangler[bitdata->data[i]]; 859 debiwrite(saa, 0x014a0000, 0, 0, 860 ((bitdata->datasize - startindex) + 5) * 2); 861 } 862 for (i = 0; 863 i < 1000 && !(saaread(SAA7146_PSR) & SAA7146_PSR_PIN2); 864 i++) 865 schedule(); 866 if (i == 1000) { 867 printk(KERN_INFO "stradis%d: FPGA load failed\n", 868 saa->nr); 869 failure++; 870 continue; 871 } 872 if (!NewCard) { 873 /* Pull the Xilinx INIT signal (GPIO2) low */ 874 saawrite(0x00400000, SAA7146_GPIO_CTRL); 875 saaread(SAA7146_PSR); /* ensure posted write */ 876 mdelay(2); 877 saawrite(0x00000000, SAA7146_GPIO_CTRL); 878 mdelay(2); 879 } 880 printk(KERN_INFO "stradis%d: FPGA Loaded\n", saa->nr); 881 saa->boardcfg[0] = 26; /* mark fpga programmed */ 882 /* set VXCO to its lowest frequency */ 883 debiwrite(saa, debNormal, XILINX_PWM, 0, 2); 884 if (NewCard) { 885 /* mute CS3310 */ 886 if (HaveCS3310) 887 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 888 0, 2); 889 /* set VXCO to PWM mode, release reset, blank on */ 890 debiwrite(saa, debNormal, XILINX_CTL0, 0xffc4, 2); 891 mdelay(10); 892 /* unmute CS3310 */ 893 if (HaveCS3310) 894 debiwrite(saa, debNormal, XILINX_CTL0, 895 0x2020, 2); 896 } 897 /* set source Black */ 898 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2); 899 saa->boardcfg[4] = 22; /* set NTSC First Active Line */ 900 saa->boardcfg[5] = 23; /* set PAL First Active Line */ 901 saa->boardcfg[54] = 2; /* set NTSC Last Active Line - 256 */ 902 saa->boardcfg[55] = 54; /* set PAL Last Active Line - 256 */ 903 set_out_format(saa, VIDEO_MODE_NTSC); 904 mdelay(50); 905 /* begin IBM chip init */ 906 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2); 907 saaread(SAA7146_PSR); /* wait for reset */ 908 mdelay(5); 909 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2); 910 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2); 911 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0x10, 2); 912 debiwrite(saa, debNormal, IBM_MP2_CMD_ADDR, 0, 2); 913 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2); 914 if (NewCard) { 915 mdelay(5); 916 /* set i2s rate converter to 48KHz */ 917 debiwrite(saa, debNormal, 0x80c0, 6, 2); 918 /* we must init CS8420 first since rev b pulls i2s */ 919 /* master clock low and CS4341 needs i2s master to */ 920 /* run the i2c port. */ 921 if (HaveCS8420) 922 /* 0=consumer, 1=pro */ 923 initialize_cs8420(saa, 0); 924 925 mdelay(5); 926 if (HaveCS4341) 927 initialize_cs4341(saa); 928 } 929 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2); 930 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2); 931 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2); 932 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2); 933 if (NewCard) 934 set_genlock_offset(saa, 0); 935 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2); 936 /* disable genlock */ 937 debiwrite(saa, debNormal, XILINX_CTL0, 0x8080, 2); 938 } 939 940 return failure; 941} 942 943static int do_ibm_reset(struct saa7146 *saa) 944{ 945 /* failure if decoder not previously programmed */ 946 if (saa->boardcfg[0] < 37) 947 return -EIO; 948 /* mute CS3310 */ 949 if (HaveCS3310) 950 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 0, 2); 951 /* disable interrupts */ 952 saawrite(0, SAA7146_IER); 953 saa->audhead = saa->audtail = 0; 954 saa->vidhead = saa->vidtail = 0; 955 /* tristate debi bus, disable debi transfers */ 956 saawrite(0x00880000, SAA7146_MC1); 957 /* ensure posted write */ 958 saaread(SAA7146_MC1); 959 mdelay(50); 960 /* re-enable debi transfers */ 961 saawrite(0x00880088, SAA7146_MC1); 962 /* set source Black */ 963 debiwrite(saa, debNormal, XILINX_CTL0, 0x1707, 2); 964 /* begin IBM chip init */ 965 set_out_format(saa, CurrentMode); 966 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 4, 2); 967 saaread(SAA7146_PSR); /* wait for reset */ 968 mdelay(5); 969 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 0, 2); 970 debiread(saa, debNormal, IBM_MP2_CHIP_CONTROL, 2); 971 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2); 972 debiwrite(saa, debNormal, IBM_MP2_CHIP_MODE, 0x2e, 2); 973 if (NewCard) { 974 mdelay(5); 975 /* set i2s rate converter to 48KHz */ 976 debiwrite(saa, debNormal, 0x80c0, 6, 2); 977 /* we must init CS8420 first since rev b pulls i2s */ 978 /* master clock low and CS4341 needs i2s master to */ 979 /* run the i2c port. */ 980 if (HaveCS8420) 981 /* 0=consumer, 1=pro */ 982 initialize_cs8420(saa, 1); 983 984 mdelay(5); 985 if (HaveCS4341) 986 initialize_cs4341(saa); 987 } 988 debiwrite(saa, debNormal, IBM_MP2_INFC_CTL, 0x48, 2); 989 debiwrite(saa, debNormal, IBM_MP2_BEEP_CTL, 0xa000, 2); 990 debiwrite(saa, debNormal, IBM_MP2_DISP_LBOR, 0, 2); 991 debiwrite(saa, debNormal, IBM_MP2_DISP_TBOR, 0, 2); 992 if (NewCard) 993 set_genlock_offset(saa, 0); 994 debiwrite(saa, debNormal, IBM_MP2_FRNT_ATTEN, 0, 2); 995 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2); 996 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2); 997 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER, 998 (ChipControl == 0x43 ? 0xe800 : 0xe000), 1)) { 999 printk(KERN_ERR "stradis%d: IBM config failed\n", saa->nr); 1000 } 1001 if (HaveCS3310) { 1002 int i = CS3310MaxLvl; 1003 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, ((i << 8)| i),2); 1004 } 1005 /* start video decoder */ 1006 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1007 /* 256k vid, 3520 bytes aud */ 1008 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 2); 1009 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2); 1010 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1011 /* enable buffer threshold irq */ 1012 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 1013 /* clear pending interrupts */ 1014 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 1015 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2); 1016 1017 return 0; 1018} 1019 1020/* load the decoder microcode */ 1021static int initialize_ibmmpeg2(struct video_code *microcode) 1022{ 1023 int i, num; 1024 struct saa7146 *saa; 1025 1026 for (num = 0; num < saa_num; num++) { 1027 saa = &saa7146s[num]; 1028 /* check that FPGA is loaded */ 1029 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0xa55a, 2); 1030 i = debiread(saa, debNormal, IBM_MP2_OSD_SIZE, 2); 1031 if (i != 0xa55a) { 1032 printk(KERN_INFO "stradis%d: %04x != 0xa55a\n", 1033 saa->nr, i); 1034 } 1035 if (!strncmp(microcode->loadwhat, "decoder.vid", 11)) { 1036 if (saa->boardcfg[0] > 27) 1037 continue; /* skip to next card */ 1038 /* load video control store */ 1039 saa->boardcfg[1] = 0x13; /* no-sync default */ 1040 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2); 1041 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2); 1042 for (i = 0; i < microcode->datasize / 2; i++) 1043 debiwrite(saa, debNormal, IBM_MP2_PROC_IDATA, 1044 (microcode->data[i * 2] << 8) | 1045 microcode->data[i * 2 + 1], 2); 1046 debiwrite(saa, debNormal, IBM_MP2_PROC_IADDR, 0, 2); 1047 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2); 1048 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1049 ChipControl, 2); 1050 saa->boardcfg[0] = 28; 1051 } 1052 if (!strncmp(microcode->loadwhat, "decoder.aud", 11)) { 1053 if (saa->boardcfg[0] > 35) 1054 continue; /* skip to next card */ 1055 /* load audio control store */ 1056 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 1, 2); 1057 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2); 1058 for (i = 0; i < microcode->datasize; i++) 1059 debiwrite(saa, debNormal, IBM_MP2_AUD_IDATA, 1060 microcode->data[i], 1); 1061 debiwrite(saa, debNormal, IBM_MP2_AUD_IADDR, 0, 2); 1062 debiwrite(saa, debNormal, IBM_MP2_WR_PROT, 0, 2); 1063 debiwrite(saa, debNormal, IBM_MP2_OSD_SIZE, 0x2000, 2); 1064 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4552, 2); 1065 if (ibm_send_command(saa, IBM_MP2_CONFIG_DECODER, 1066 0xe000, 1)) { 1067 printk(KERN_ERR "stradis%d: IBM config " 1068 "failed\n", saa->nr); 1069 return -1; 1070 } 1071 /* set PWM to center value */ 1072 if (NewCard) { 1073 debiwrite(saa, debNormal, XILINX_PWM, 1074 saa->boardcfg[14] + 1075 (saa->boardcfg[13] << 8), 2); 1076 } else 1077 debiwrite(saa, debNormal, XILINX_PWM, 0x46, 2); 1078 1079 if (HaveCS3310) { 1080 i = CS3310MaxLvl; 1081 debiwrite(saa, debNormal, XILINX_CS3310_CMPLT, 1082 (i << 8) | i, 2); 1083 } 1084 printk(KERN_INFO "stradis%d: IBM MPEGCD%d Inited\n", 1085 saa->nr, 18 + (debiread(saa, debNormal, 1086 IBM_MP2_CHIP_CONTROL, 2) >> 12)); 1087 /* start video decoder */ 1088 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1089 ChipControl, 2); 1090 debiwrite(saa, debNormal, IBM_MP2_RB_THRESHOLD, 0x4037, 1091 2); /* 256k vid, 3520 bytes aud */ 1092 debiwrite(saa, debNormal, IBM_MP2_AUD_CTL, 0x4573, 2); 1093 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1094 /* enable buffer threshold irq */ 1095 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00c, 2); 1096 debiread(saa, debNormal, IBM_MP2_HOST_INT, 2); 1097 /* enable gpio irq */ 1098 saawrite(0x00002000, SAA7146_GPIO_CTRL); 1099 /* enable decoder output to HPS */ 1100 debiwrite(saa, debNormal, XILINX_CTL0, 0x1711, 2); 1101 saa->boardcfg[0] = 37; 1102 } 1103 } 1104 1105 return 0; 1106} 1107 1108static u32 palette2fmt[] = { /* some of these YUV translations are wrong */ 1109 0xffffffff, 0x86000000, 0x87000000, 0x80000000, 0x8100000, 0x82000000, 1110 0x83000000, 0x00000000, 0x03000000, 0x03000000, 0x0a00000, 0x03000000, 1111 0x06000000, 0x00000000, 0x03000000, 0x0a000000, 0x0300000 1112}; 1113static int bpp2fmt[4] = { 1114 VIDEO_PALETTE_HI240, VIDEO_PALETTE_RGB565, VIDEO_PALETTE_RGB24, 1115 VIDEO_PALETTE_RGB32 1116}; 1117 1118/* I wish I could find a formula to calculate these... */ 1119static u32 h_prescale[64] = { 1120 0x10000000, 0x18040202, 0x18080000, 0x380c0606, 0x38100204, 0x38140808, 1121 0x38180000, 0x381c0000, 0x3820161c, 0x38242a3b, 0x38281230, 0x382c4460, 1122 0x38301040, 0x38340080, 0x38380000, 0x383c0000, 0x3840fefe, 0x3844ee9f, 1123 0x3848ee9f, 0x384cee9f, 0x3850ee9f, 0x38542a3b, 0x38581230, 0x385c0000, 1124 0x38600000, 0x38640000, 0x38680000, 0x386c0000, 0x38700000, 0x38740000, 1125 0x38780000, 0x387c0000, 0x30800000, 0x38840000, 0x38880000, 0x388c0000, 1126 0x38900000, 0x38940000, 0x38980000, 0x389c0000, 0x38a00000, 0x38a40000, 1127 0x38a80000, 0x38ac0000, 0x38b00000, 0x38b40000, 0x38b80000, 0x38bc0000, 1128 0x38c00000, 0x38c40000, 0x38c80000, 0x38cc0000, 0x38d00000, 0x38d40000, 1129 0x38d80000, 0x38dc0000, 0x38e00000, 0x38e40000, 0x38e80000, 0x38ec0000, 1130 0x38f00000, 0x38f40000, 0x38f80000, 0x38fc0000, 1131}; 1132static u32 v_gain[64] = { 1133 0x016000ff, 0x016100ff, 0x016100ff, 0x016200ff, 0x016200ff, 0x016200ff, 1134 0x016200ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 0x016300ff, 1135 0x016300ff, 0x016300ff, 0x016300ff, 0x016400ff, 0x016400ff, 0x016400ff, 1136 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1137 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1138 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1139 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1140 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1141 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1142 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1143 0x016400ff, 0x016400ff, 0x016400ff, 0x016400ff, 1144}; 1145 1146static void saa7146_set_winsize(struct saa7146 *saa) 1147{ 1148 u32 format; 1149 int offset, yacl, ysci; 1150 saa->win.color_fmt = format = 1151 (saa->win.depth == 15) ? palette2fmt[VIDEO_PALETTE_RGB555] : 1152 palette2fmt[bpp2fmt[(saa->win.bpp - 1) & 3]]; 1153 offset = saa->win.x * saa->win.bpp + saa->win.y * saa->win.bpl; 1154 saawrite(saa->win.vidadr + offset, SAA7146_BASE_EVEN1); 1155 saawrite(saa->win.vidadr + offset + saa->win.bpl, SAA7146_BASE_ODD1); 1156 saawrite(saa->win.bpl * 2, SAA7146_PITCH1); 1157 saawrite(saa->win.vidadr + saa->win.bpl * saa->win.sheight, 1158 SAA7146_PROT_ADDR1); 1159 saawrite(0, SAA7146_PAGE1); 1160 saawrite(format | 0x60, SAA7146_CLIP_FORMAT_CTRL); 1161 offset = (704 / (saa->win.width - 1)) & 0x3f; 1162 saawrite(h_prescale[offset], SAA7146_HPS_H_PRESCALE); 1163 offset = (720896 / saa->win.width) / (offset + 1); 1164 saawrite((offset << 12) | 0x0c, SAA7146_HPS_H_SCALE); 1165 if (CurrentMode == VIDEO_MODE_NTSC) { 1166 yacl = /*(480 / saa->win.height - 1) & 0x3f */ 0; 1167 ysci = 1024 - (saa->win.height * 1024 / 480); 1168 } else { 1169 yacl = /*(576 / saa->win.height - 1) & 0x3f */ 0; 1170 ysci = 1024 - (saa->win.height * 1024 / 576); 1171 } 1172 saawrite((1 << 31) | (ysci << 21) | (yacl << 15), SAA7146_HPS_V_SCALE); 1173 saawrite(v_gain[yacl], SAA7146_HPS_V_GAIN); 1174 saawrite(((SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_HPS_V | 1175 SAA7146_MC2_UPLD_HPS_H) << 16) | (SAA7146_MC2_UPLD_DMA1 | 1176 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_HPS_H), SAA7146_MC2); 1177} 1178 1179/* clip_draw_rectangle(cm,x,y,w,h) -- handle clipping an area 1180 * bitmap is fixed width, 128 bytes (1024 pixels represented) 1181 * arranged most-sigificant-bit-left in 32-bit words 1182 * based on saa7146 clipping hardware, it swaps bytes if LE 1183 * much of this makes up for egcs brain damage -- so if you 1184 * are wondering "why did he do this?" it is because the C 1185 * was adjusted to generate the optimal asm output without 1186 * writing non-portable __asm__ directives. 1187 */ 1188 1189static void clip_draw_rectangle(u32 *clipmap, int x, int y, int w, int h) 1190{ 1191 register int startword, endword; 1192 register u32 bitsleft, bitsright; 1193 u32 *temp; 1194 if (x < 0) { 1195 w += x; 1196 x = 0; 1197 } 1198 if (y < 0) { 1199 h += y; 1200 y = 0; 1201 } 1202 if (w <= 0 || h <= 0 || x > 1023 || y > 639) 1203 return; /* throw away bad clips */ 1204 if (x + w > 1024) 1205 w = 1024 - x; 1206 if (y + h > 640) 1207 h = 640 - y; 1208 startword = (x >> 5); 1209 endword = ((x + w) >> 5); 1210 bitsleft = (0xffffffff >> (x & 31)); 1211 bitsright = (0xffffffff << (~((x + w) - (endword << 5)))); 1212 temp = &clipmap[(y << 5) + startword]; 1213 w = endword - startword; 1214 if (!w) { 1215 bitsleft |= bitsright; 1216 for (y = 0; y < h; y++) { 1217 *temp |= bitsleft; 1218 temp += 32; 1219 } 1220 } else { 1221 for (y = 0; y < h; y++) { 1222 *temp++ |= bitsleft; 1223 for (x = 1; x < w; x++) 1224 *temp++ = 0xffffffff; 1225 *temp |= bitsright; 1226 temp += (32 - w); 1227 } 1228 } 1229} 1230 1231static void make_clip_tab(struct saa7146 *saa, struct video_clip *cr, int ncr) 1232{ 1233 int i, width, height; 1234 u32 *clipmap; 1235 1236 clipmap = saa->dmavid2; 1237 if ((width = saa->win.width) > 1023) 1238 width = 1023; /* sanity check */ 1239 if ((height = saa->win.height) > 640) 1240 height = 639; /* sanity check */ 1241 if (ncr > 0) { /* rectangles pased */ 1242 /* convert rectangular clips to a bitmap */ 1243 memset(clipmap, 0, VIDEO_CLIPMAP_SIZE); /* clear map */ 1244 for (i = 0; i < ncr; i++) 1245 clip_draw_rectangle(clipmap, cr[i].x, cr[i].y, 1246 cr[i].width, cr[i].height); 1247 } 1248 /* clip against viewing window AND screen 1249 so we do not have to rely on the user program 1250 */ 1251 clip_draw_rectangle(clipmap, (saa->win.x + width > saa->win.swidth) ? 1252 (saa->win.swidth - saa->win.x) : width, 0, 1024, 768); 1253 clip_draw_rectangle(clipmap, 0, 1254 (saa->win.y + height > saa->win.sheight) ? 1255 (saa->win.sheight - saa->win.y) : height, 1024, 768); 1256 if (saa->win.x < 0) 1257 clip_draw_rectangle(clipmap, 0, 0, -saa->win.x, 768); 1258 if (saa->win.y < 0) 1259 clip_draw_rectangle(clipmap, 0, 0, 1024, -saa->win.y); 1260} 1261 1262static long saa_ioctl(struct file *file, 1263 unsigned int cmd, unsigned long argl) 1264{ 1265 struct saa7146 *saa = file->private_data; 1266 void __user *arg = (void __user *)argl; 1267 1268 switch (cmd) { 1269 case VIDIOCGCAP: 1270 { 1271 struct video_capability b; 1272 strcpy(b.name, saa->video_dev.name); 1273 b.type = VID_TYPE_CAPTURE | VID_TYPE_OVERLAY | 1274 VID_TYPE_CLIPPING | VID_TYPE_FRAMERAM | 1275 VID_TYPE_SCALES; 1276 b.channels = 1; 1277 b.audios = 1; 1278 b.maxwidth = 768; 1279 b.maxheight = 576; 1280 b.minwidth = 32; 1281 b.minheight = 32; 1282 if (copy_to_user(arg, &b, sizeof(b))) 1283 return -EFAULT; 1284 return 0; 1285 } 1286 case VIDIOCGPICT: 1287 { 1288 struct video_picture p = saa->picture; 1289 if (saa->win.depth == 8) 1290 p.palette = VIDEO_PALETTE_HI240; 1291 if (saa->win.depth == 15) 1292 p.palette = VIDEO_PALETTE_RGB555; 1293 if (saa->win.depth == 16) 1294 p.palette = VIDEO_PALETTE_RGB565; 1295 if (saa->win.depth == 24) 1296 p.palette = VIDEO_PALETTE_RGB24; 1297 if (saa->win.depth == 32) 1298 p.palette = VIDEO_PALETTE_RGB32; 1299 if (copy_to_user(arg, &p, sizeof(p))) 1300 return -EFAULT; 1301 return 0; 1302 } 1303 case VIDIOCSPICT: 1304 { 1305 struct video_picture p; 1306 u32 format; 1307 if (copy_from_user(&p, arg, sizeof(p))) 1308 return -EFAULT; 1309 if (p.palette < ARRAY_SIZE(palette2fmt)) { 1310 format = palette2fmt[p.palette]; 1311 saa->win.color_fmt = format; 1312 saawrite(format | 0x60, 1313 SAA7146_CLIP_FORMAT_CTRL); 1314 } 1315 saawrite(((p.brightness & 0xff00) << 16) | 1316 ((p.contrast & 0xfe00) << 7) | 1317 ((p.colour & 0xfe00) >> 9), SAA7146_BCS_CTRL); 1318 saa->picture = p; 1319 /* upload changed registers */ 1320 saawrite(((SAA7146_MC2_UPLD_HPS_H | 1321 SAA7146_MC2_UPLD_HPS_V) << 16) | 1322 SAA7146_MC2_UPLD_HPS_H | 1323 SAA7146_MC2_UPLD_HPS_V, SAA7146_MC2); 1324 return 0; 1325 } 1326 case VIDIOCSWIN: 1327 { 1328 struct video_window vw; 1329 struct video_clip *vcp = NULL; 1330 1331 if (copy_from_user(&vw, arg, sizeof(vw))) 1332 return -EFAULT; 1333 1334 /* stop capture */ 1335 if (vw.flags || vw.width < 16 || vw.height < 16) { 1336 saawrite((SAA7146_MC1_TR_E_1 << 16), 1337 SAA7146_MC1); 1338 return -EINVAL; 1339 } 1340 /* 32-bit align start and adjust width */ 1341 if (saa->win.bpp < 4) { 1342 int i = vw.x; 1343 vw.x = (vw.x + 3) & ~3; 1344 i = vw.x - i; 1345 vw.width -= i; 1346 } 1347 saa->win.x = vw.x; 1348 saa->win.y = vw.y; 1349 saa->win.width = vw.width; 1350 if (saa->win.width > 768) 1351 saa->win.width = 768; 1352 saa->win.height = vw.height; 1353 if (CurrentMode == VIDEO_MODE_NTSC) { 1354 if (saa->win.height > 480) 1355 saa->win.height = 480; 1356 } else { 1357 if (saa->win.height > 576) 1358 saa->win.height = 576; 1359 } 1360 1361 /* stop capture */ 1362 saawrite((SAA7146_MC1_TR_E_1 << 16), SAA7146_MC1); 1363 saa7146_set_winsize(saa); 1364 1365 /* 1366 * Do any clips. 1367 */ 1368 if (vw.clipcount < 0) { 1369 if (copy_from_user(saa->dmavid2, vw.clips, 1370 VIDEO_CLIPMAP_SIZE)) 1371 return -EFAULT; 1372 } else if (vw.clipcount > 16384) { 1373 return -EINVAL; 1374 } else if (vw.clipcount > 0) { 1375 vcp = vmalloc(sizeof(struct video_clip) * 1376 vw.clipcount); 1377 if (vcp == NULL) 1378 return -ENOMEM; 1379 if (copy_from_user(vcp, vw.clips, 1380 sizeof(struct video_clip) * 1381 vw.clipcount)) { 1382 vfree(vcp); 1383 return -EFAULT; 1384 } 1385 } else /* nothing clipped */ 1386 memset(saa->dmavid2, 0, VIDEO_CLIPMAP_SIZE); 1387 1388 make_clip_tab(saa, vcp, vw.clipcount); 1389 if (vw.clipcount > 0) 1390 vfree(vcp); 1391 1392 /* start capture & clip dma if we have an address */ 1393 if ((saa->cap & 3) && saa->win.vidadr != 0) 1394 saawrite(((SAA7146_MC1_TR_E_1 | 1395 SAA7146_MC1_TR_E_2) << 16) | 0xffff, 1396 SAA7146_MC1); 1397 return 0; 1398 } 1399 case VIDIOCGWIN: 1400 { 1401 struct video_window vw; 1402 vw.x = saa->win.x; 1403 vw.y = saa->win.y; 1404 vw.width = saa->win.width; 1405 vw.height = saa->win.height; 1406 vw.chromakey = 0; 1407 vw.flags = 0; 1408 if (copy_to_user(arg, &vw, sizeof(vw))) 1409 return -EFAULT; 1410 return 0; 1411 } 1412 case VIDIOCCAPTURE: 1413 { 1414 int v; 1415 if (copy_from_user(&v, arg, sizeof(v))) 1416 return -EFAULT; 1417 if (v == 0) { 1418 saa->cap &= ~1; 1419 saawrite((SAA7146_MC1_TR_E_1 << 16), 1420 SAA7146_MC1); 1421 } else { 1422 if (saa->win.vidadr == 0 || saa->win.width == 0 1423 || saa->win.height == 0) 1424 return -EINVAL; 1425 saa->cap |= 1; 1426 saawrite((SAA7146_MC1_TR_E_1 << 16) | 0xffff, 1427 SAA7146_MC1); 1428 } 1429 return 0; 1430 } 1431 case VIDIOCGFBUF: 1432 { 1433 struct video_buffer v; 1434 v.base = (void *)saa->win.vidadr; 1435 v.height = saa->win.sheight; 1436 v.width = saa->win.swidth; 1437 v.depth = saa->win.depth; 1438 v.bytesperline = saa->win.bpl; 1439 if (copy_to_user(arg, &v, sizeof(v))) 1440 return -EFAULT; 1441 return 0; 1442 1443 } 1444 case VIDIOCSFBUF: 1445 { 1446 struct video_buffer v; 1447 if (!capable(CAP_SYS_ADMIN)) 1448 return -EPERM; 1449 if (copy_from_user(&v, arg, sizeof(v))) 1450 return -EFAULT; 1451 if (v.depth != 8 && v.depth != 15 && v.depth != 16 && 1452 v.depth != 24 && v.depth != 32 && v.width > 16 && 1453 v.height > 16 && v.bytesperline > 16) 1454 return -EINVAL; 1455 if (v.base) 1456 saa->win.vidadr = (unsigned long)v.base; 1457 saa->win.sheight = v.height; 1458 saa->win.swidth = v.width; 1459 saa->win.bpp = ((v.depth + 7) & 0x38) / 8; 1460 saa->win.depth = v.depth; 1461 saa->win.bpl = v.bytesperline; 1462 1463 DEBUG(printk("Display at %p is %d by %d, bytedepth %d, " 1464 "bpl %d\n", v.base, v.width, v.height, 1465 saa->win.bpp, saa->win.bpl)); 1466 saa7146_set_winsize(saa); 1467 return 0; 1468 } 1469 case VIDIOCKEY: 1470 { 1471 /* Will be handled higher up .. */ 1472 return 0; 1473 } 1474 1475 case VIDIOCGAUDIO: 1476 { 1477 struct video_audio v; 1478 v = saa->audio_dev; 1479 v.flags &= ~(VIDEO_AUDIO_MUTE | VIDEO_AUDIO_MUTABLE); 1480 v.flags |= VIDEO_AUDIO_MUTABLE | VIDEO_AUDIO_VOLUME; 1481 strcpy(v.name, "MPEG"); 1482 v.mode = VIDEO_SOUND_STEREO; 1483 if (copy_to_user(arg, &v, sizeof(v))) 1484 return -EFAULT; 1485 return 0; 1486 } 1487 case VIDIOCSAUDIO: 1488 { 1489 struct video_audio v; 1490 int i; 1491 if (copy_from_user(&v, arg, sizeof(v))) 1492 return -EFAULT; 1493 i = (~(v.volume >> 8)) & 0xff; 1494 if (!HaveCS4341) { 1495 if (v.flags & VIDEO_AUDIO_MUTE) 1496 debiwrite(saa, debNormal, 1497 IBM_MP2_FRNT_ATTEN, 0xffff, 2); 1498 if (!(v.flags & VIDEO_AUDIO_MUTE)) 1499 debiwrite(saa, debNormal, 1500 IBM_MP2_FRNT_ATTEN, 0x0000, 2); 1501 if (v.flags & VIDEO_AUDIO_VOLUME) 1502 debiwrite(saa, debNormal, 1503 IBM_MP2_FRNT_ATTEN, 1504 (i << 8) | i, 2); 1505 } else { 1506 if (v.flags & VIDEO_AUDIO_MUTE) 1507 cs4341_setlevel(saa, 0xff, 0xff); 1508 if (!(v.flags & VIDEO_AUDIO_MUTE)) 1509 cs4341_setlevel(saa, 0, 0); 1510 if (v.flags & VIDEO_AUDIO_VOLUME) 1511 cs4341_setlevel(saa, i, i); 1512 } 1513 saa->audio_dev = v; 1514 return 0; 1515 } 1516 1517 case VIDIOCGUNIT: 1518 { 1519 struct video_unit vu; 1520 vu.video = saa->video_dev.minor; 1521 vu.vbi = VIDEO_NO_UNIT; 1522 vu.radio = VIDEO_NO_UNIT; 1523 vu.audio = VIDEO_NO_UNIT; 1524 vu.teletext = VIDEO_NO_UNIT; 1525 if (copy_to_user(arg, &vu, sizeof(vu))) 1526 return -EFAULT; 1527 return 0; 1528 } 1529 case VIDIOCSPLAYMODE: 1530 { 1531 struct video_play_mode pmode; 1532 if (copy_from_user((void *)&pmode, arg, 1533 sizeof(struct video_play_mode))) 1534 return -EFAULT; 1535 switch (pmode.mode) { 1536 case VID_PLAY_VID_OUT_MODE: 1537 if (pmode.p1 != VIDEO_MODE_NTSC && 1538 pmode.p1 != VIDEO_MODE_PAL) 1539 return -EINVAL; 1540 set_out_format(saa, pmode.p1); 1541 return 0; 1542 case VID_PLAY_GENLOCK: 1543 debiwrite(saa, debNormal, XILINX_CTL0, 1544 pmode.p1 ? 0x8000 : 0x8080, 2); 1545 if (NewCard) 1546 set_genlock_offset(saa, pmode.p2); 1547 return 0; 1548 case VID_PLAY_NORMAL: 1549 debiwrite(saa, debNormal, 1550 IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1551 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1552 saa->playmode = pmode.mode; 1553 return 0; 1554 case VID_PLAY_PAUSE: 1555 /* IBM removed the PAUSE command */ 1556 /* they say use SINGLE_FRAME now */ 1557 case VID_PLAY_SINGLE_FRAME: 1558 ibm_send_command(saa, IBM_MP2_SINGLE_FRAME,0,0); 1559 if (saa->playmode == pmode.mode) { 1560 debiwrite(saa, debNormal, 1561 IBM_MP2_CHIP_CONTROL, 1562 ChipControl, 2); 1563 } 1564 saa->playmode = pmode.mode; 1565 return 0; 1566 case VID_PLAY_FAST_FORWARD: 1567 ibm_send_command(saa, IBM_MP2_FAST_FORWARD,0,0); 1568 saa->playmode = pmode.mode; 1569 return 0; 1570 case VID_PLAY_SLOW_MOTION: 1571 ibm_send_command(saa, IBM_MP2_SLOW_MOTION, 1572 pmode.p1, 0); 1573 saa->playmode = pmode.mode; 1574 return 0; 1575 case VID_PLAY_IMMEDIATE_NORMAL: 1576 /* ensure transfers resume */ 1577 debiwrite(saa, debNormal, 1578 IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1579 ibm_send_command(saa, IBM_MP2_IMED_NORM_PLAY, 1580 0, 0); 1581 saa->playmode = VID_PLAY_NORMAL; 1582 return 0; 1583 case VID_PLAY_SWITCH_CHANNELS: 1584 saa->audhead = saa->audtail = 0; 1585 saa->vidhead = saa->vidtail = 0; 1586 ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,1); 1587 ibm_send_command(saa, IBM_MP2_RESET_AUD_RATE, 1588 0, 1); 1589 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1590 0, 2); 1591 ibm_send_command(saa, IBM_MP2_CHANNEL_SWITCH, 1592 0, 1); 1593 debiwrite(saa, debNormal, IBM_MP2_CHIP_CONTROL, 1594 ChipControl, 2); 1595 ibm_send_command(saa, IBM_MP2_PLAY, 0, 0); 1596 saa->playmode = VID_PLAY_NORMAL; 1597 return 0; 1598 case VID_PLAY_FREEZE_FRAME: 1599 ibm_send_command(saa, IBM_MP2_FREEZE_FRAME,0,0); 1600 saa->playmode = pmode.mode; 1601 return 0; 1602 case VID_PLAY_STILL_MODE: 1603 ibm_send_command(saa, IBM_MP2_SET_STILL_MODE, 1604 0, 0); 1605 saa->playmode = pmode.mode; 1606 return 0; 1607 case VID_PLAY_MASTER_MODE: 1608 if (pmode.p1 == VID_PLAY_MASTER_NONE) 1609 saa->boardcfg[1] = 0x13; 1610 else if (pmode.p1 == VID_PLAY_MASTER_VIDEO) 1611 saa->boardcfg[1] = 0x23; 1612 else if (pmode.p1 == VID_PLAY_MASTER_AUDIO) 1613 saa->boardcfg[1] = 0x43; 1614 else 1615 return -EINVAL; 1616 debiwrite(saa, debNormal, 1617 IBM_MP2_CHIP_CONTROL, ChipControl, 2); 1618 return 0; 1619 case VID_PLAY_ACTIVE_SCANLINES: 1620 if (CurrentMode == VIDEO_MODE_PAL) { 1621 if (pmode.p1 < 1 || pmode.p2 > 625) 1622 return -EINVAL; 1623 saa->boardcfg[5] = pmode.p1; 1624 saa->boardcfg[55] = (pmode.p1 + 1625 (pmode.p2 / 2) - 1) & 0xff; 1626 } else { 1627 if (pmode.p1 < 4 || pmode.p2 > 525) 1628 return -EINVAL; 1629 saa->boardcfg[4] = pmode.p1; 1630 saa->boardcfg[54] = (pmode.p1 + 1631 (pmode.p2 / 2) - 4) & 0xff; 1632 } 1633 set_out_format(saa, CurrentMode); 1634 case VID_PLAY_RESET: 1635 return do_ibm_reset(saa); 1636 case VID_PLAY_END_MARK: 1637 if (saa->endmarktail < saa->endmarkhead) { 1638 if (saa->endmarkhead - 1639 saa->endmarktail < 2) 1640 return -ENOSPC; 1641 } else if (saa->endmarkhead <=saa->endmarktail){ 1642 if (saa->endmarktail - saa->endmarkhead 1643 > (MAX_MARKS - 2)) 1644 return -ENOSPC; 1645 } else 1646 return -ENOSPC; 1647 saa->endmark[saa->endmarktail] = saa->audtail; 1648 saa->endmarktail++; 1649 if (saa->endmarktail >= MAX_MARKS) 1650 saa->endmarktail = 0; 1651 } 1652 return -EINVAL; 1653 } 1654 case VIDIOCSWRITEMODE: 1655 { 1656 int mode; 1657 if (copy_from_user((void *)&mode, arg, sizeof(int))) 1658 return -EFAULT; 1659 if (mode == VID_WRITE_MPEG_AUD || 1660 mode == VID_WRITE_MPEG_VID || 1661 mode == VID_WRITE_CC || 1662 mode == VID_WRITE_TTX || 1663 mode == VID_WRITE_OSD) { 1664 saa->writemode = mode; 1665 return 0; 1666 } 1667 return -EINVAL; 1668 } 1669 case VIDIOCSMICROCODE: 1670 { 1671 struct video_code ucode; 1672 __u8 *udata; 1673 int i; 1674 if (copy_from_user(&ucode, arg, sizeof(ucode))) 1675 return -EFAULT; 1676 if (ucode.datasize > 65536 || ucode.datasize < 1024 || 1677 strncmp(ucode.loadwhat, "dec", 3)) 1678 return -EINVAL; 1679 if ((udata = vmalloc(ucode.datasize)) == NULL) 1680 return -ENOMEM; 1681 if (copy_from_user(udata, ucode.data, ucode.datasize)) { 1682 vfree(udata); 1683 return -EFAULT; 1684 } 1685 ucode.data = udata; 1686 if (!strncmp(ucode.loadwhat, "decoder.aud", 11) || 1687 !strncmp(ucode.loadwhat, "decoder.vid", 11)) 1688 i = initialize_ibmmpeg2(&ucode); 1689 else 1690 i = initialize_fpga(&ucode); 1691 vfree(udata); 1692 if (i) 1693 return -EINVAL; 1694 return 0; 1695 1696 } 1697 case VIDIOCGCHAN: /* this makes xawtv happy */ 1698 { 1699 struct video_channel v; 1700 if (copy_from_user(&v, arg, sizeof(v))) 1701 return -EFAULT; 1702 v.flags = VIDEO_VC_AUDIO; 1703 v.tuners = 0; 1704 v.type = VID_TYPE_MPEG_DECODER; 1705 v.norm = CurrentMode; 1706 strcpy(v.name, "MPEG2"); 1707 if (copy_to_user(arg, &v, sizeof(v))) 1708 return -EFAULT; 1709 return 0; 1710 } 1711 case VIDIOCSCHAN: /* this makes xawtv happy */ 1712 { 1713 struct video_channel v; 1714 if (copy_from_user(&v, arg, sizeof(v))) 1715 return -EFAULT; 1716 /* do nothing */ 1717 return 0; 1718 } 1719 default: 1720 return -ENOIOCTLCMD; 1721 } 1722 return 0; 1723} 1724 1725static int saa_mmap(struct file *file, struct vm_area_struct *vma) 1726{ 1727 struct saa7146 *saa = file->private_data; 1728 printk(KERN_DEBUG "stradis%d: saa_mmap called\n", saa->nr); 1729 return -EINVAL; 1730} 1731 1732static ssize_t saa_read(struct file *file, char __user * buf, 1733 size_t count, loff_t * ppos) 1734{ 1735 return -EINVAL; 1736} 1737 1738static ssize_t saa_write(struct file *file, const char __user * buf, 1739 size_t count, loff_t * ppos) 1740{ 1741 struct saa7146 *saa = file->private_data; 1742 unsigned long todo = count; 1743 int blocksize, split; 1744 unsigned long flags; 1745 1746 while (todo > 0) { 1747 if (saa->writemode == VID_WRITE_MPEG_AUD) { 1748 spin_lock_irqsave(&saa->lock, flags); 1749 if (saa->audhead <= saa->audtail) 1750 blocksize = 65536 - 1751 (saa->audtail - saa->audhead); 1752 else 1753 blocksize = saa->audhead - saa->audtail; 1754 spin_unlock_irqrestore(&saa->lock, flags); 1755 if (blocksize < 16384) { 1756 saawrite(SAA7146_PSR_DEBI_S | 1757 SAA7146_PSR_PIN1, SAA7146_IER); 1758 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1759 /* wait for buffer space to open */ 1760 interruptible_sleep_on(&saa->audq); 1761 } 1762 spin_lock_irqsave(&saa->lock, flags); 1763 if (saa->audhead <= saa->audtail) { 1764 blocksize = 65536 - 1765 (saa->audtail - saa->audhead); 1766 split = 65536 - saa->audtail; 1767 } else { 1768 blocksize = saa->audhead - saa->audtail; 1769 split = 65536; 1770 } 1771 spin_unlock_irqrestore(&saa->lock, flags); 1772 blocksize--; 1773 if (blocksize > todo) 1774 blocksize = todo; 1775 /* double check that we really have space */ 1776 if (!blocksize) 1777 return -ENOSPC; 1778 if (split < blocksize) { 1779 if (copy_from_user(saa->audbuf + 1780 saa->audtail, buf, split)) 1781 return -EFAULT; 1782 buf += split; 1783 todo -= split; 1784 blocksize -= split; 1785 saa->audtail = 0; 1786 } 1787 if (copy_from_user(saa->audbuf + saa->audtail, buf, 1788 blocksize)) 1789 return -EFAULT; 1790 saa->audtail += blocksize; 1791 todo -= blocksize; 1792 buf += blocksize; 1793 saa->audtail &= 0xffff; 1794 } else if (saa->writemode == VID_WRITE_MPEG_VID) { 1795 spin_lock_irqsave(&saa->lock, flags); 1796 if (saa->vidhead <= saa->vidtail) 1797 blocksize = 524288 - 1798 (saa->vidtail - saa->vidhead); 1799 else 1800 blocksize = saa->vidhead - saa->vidtail; 1801 spin_unlock_irqrestore(&saa->lock, flags); 1802 if (blocksize < 65536) { 1803 saawrite(SAA7146_PSR_DEBI_S | 1804 SAA7146_PSR_PIN1, SAA7146_IER); 1805 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1806 /* wait for buffer space to open */ 1807 interruptible_sleep_on(&saa->vidq); 1808 } 1809 spin_lock_irqsave(&saa->lock, flags); 1810 if (saa->vidhead <= saa->vidtail) { 1811 blocksize = 524288 - 1812 (saa->vidtail - saa->vidhead); 1813 split = 524288 - saa->vidtail; 1814 } else { 1815 blocksize = saa->vidhead - saa->vidtail; 1816 split = 524288; 1817 } 1818 spin_unlock_irqrestore(&saa->lock, flags); 1819 blocksize--; 1820 if (blocksize > todo) 1821 blocksize = todo; 1822 /* double check that we really have space */ 1823 if (!blocksize) 1824 return -ENOSPC; 1825 if (split < blocksize) { 1826 if (copy_from_user(saa->vidbuf + 1827 saa->vidtail, buf, split)) 1828 return -EFAULT; 1829 buf += split; 1830 todo -= split; 1831 blocksize -= split; 1832 saa->vidtail = 0; 1833 } 1834 if (copy_from_user(saa->vidbuf + saa->vidtail, buf, 1835 blocksize)) 1836 return -EFAULT; 1837 saa->vidtail += blocksize; 1838 todo -= blocksize; 1839 buf += blocksize; 1840 saa->vidtail &= 0x7ffff; 1841 } else if (saa->writemode == VID_WRITE_OSD) { 1842 if (count > 131072) 1843 return -ENOSPC; 1844 if (copy_from_user(saa->osdbuf, buf, count)) 1845 return -EFAULT; 1846 buf += count; 1847 saa->osdhead = 0; 1848 saa->osdtail = count; 1849 debiwrite(saa, debNormal, IBM_MP2_OSD_ADDR, 0, 2); 1850 debiwrite(saa, debNormal, IBM_MP2_OSD_LINK_ADDR, 0, 2); 1851 debiwrite(saa, debNormal, IBM_MP2_MASK0, 0xc00d, 2); 1852 debiwrite(saa, debNormal, IBM_MP2_DISP_MODE, 1853 debiread(saa, debNormal, 1854 IBM_MP2_DISP_MODE, 2) | 1, 2); 1855 /* trigger osd data transfer */ 1856 saawrite(SAA7146_PSR_DEBI_S | 1857 SAA7146_PSR_PIN1, SAA7146_IER); 1858 saawrite(SAA7146_PSR_PIN1, SAA7146_PSR); 1859 } 1860 } 1861 return count; 1862} 1863 1864static int saa_open(struct file *file) 1865{ 1866 struct video_device *vdev = video_devdata(file); 1867 struct saa7146 *saa = container_of(vdev, struct saa7146, video_dev); 1868 1869 lock_kernel(); 1870 file->private_data = saa; 1871 1872 saa->user++; 1873 if (saa->user > 1) { 1874 unlock_kernel(); 1875 return 0; /* device open already, don't reset */ 1876 } 1877 saa->writemode = VID_WRITE_MPEG_VID; /* default to video */ 1878 unlock_kernel(); 1879 return 0; 1880} 1881 1882static int saa_release(struct file *file) 1883{ 1884 struct saa7146 *saa = file->private_data; 1885 saa->user--; 1886 1887 if (saa->user > 0) /* still someone using device */ 1888 return 0; 1889 saawrite(0x007f0000, SAA7146_MC1); /* stop all overlay dma */ 1890 return 0; 1891} 1892 1893static const struct v4l2_file_operations saa_fops = { 1894 .owner = THIS_MODULE, 1895 .open = saa_open, 1896 .release = saa_release, 1897 .ioctl = saa_ioctl, 1898 .read = saa_read, 1899 .write = saa_write, 1900 .mmap = saa_mmap, 1901}; 1902 1903/* template for video_device-structure */ 1904static struct video_device saa_template = { 1905 .name = "SAA7146A", 1906 .fops = &saa_fops, 1907 .release = video_device_release_empty, 1908}; 1909 1910static int __devinit configure_saa7146(struct pci_dev *pdev, int num) 1911{ 1912 int retval; 1913 struct saa7146 *saa = pci_get_drvdata(pdev); 1914 1915 saa->endmarkhead = saa->endmarktail = 0; 1916 saa->win.x = saa->win.y = 0; 1917 saa->win.width = saa->win.cropwidth = 720; 1918 saa->win.height = saa->win.cropheight = 480; 1919 saa->win.cropx = saa->win.cropy = 0; 1920 saa->win.bpp = 2; 1921 saa->win.depth = 16; 1922 saa->win.color_fmt = palette2fmt[VIDEO_PALETTE_RGB565]; 1923 saa->win.bpl = 1024 * saa->win.bpp; 1924 saa->win.swidth = 1024; 1925 saa->win.sheight = 768; 1926 saa->picture.brightness = 32768; 1927 saa->picture.contrast = 38768; 1928 saa->picture.colour = 32768; 1929 saa->cap = 0; 1930 saa->nr = num; 1931 saa->playmode = VID_PLAY_NORMAL; 1932 memset(saa->boardcfg, 0, 64); /* clear board config area */ 1933 saa->saa7146_mem = NULL; 1934 saa->dmavid1 = saa->dmavid2 = saa->dmavid3 = saa->dmaa1in = 1935 saa->dmaa1out = saa->dmaa2in = saa->dmaa2out = 1936 saa->pagevid1 = saa->pagevid2 = saa->pagevid3 = saa->pagea1in = 1937 saa->pagea1out = saa->pagea2in = saa->pagea2out = 1938 saa->pagedebi = saa->dmaRPS1 = saa->dmaRPS2 = saa->pageRPS1 = 1939 saa->pageRPS2 = NULL; 1940 saa->audbuf = saa->vidbuf = saa->osdbuf = saa->dmadebi = NULL; 1941 saa->audhead = saa->vidtail = 0; 1942 1943 init_waitqueue_head(&saa->i2cq); 1944 init_waitqueue_head(&saa->audq); 1945 init_waitqueue_head(&saa->debiq); 1946 init_waitqueue_head(&saa->vidq); 1947 spin_lock_init(&saa->lock); 1948 1949 retval = pci_enable_device(pdev); 1950 if (retval) { 1951 dev_err(&pdev->dev, "%d: pci_enable_device failed!\n", num); 1952 goto err; 1953 } 1954 1955 saa->id = pdev->device; 1956 saa->irq = pdev->irq; 1957 saa->saa7146_adr = pci_resource_start(pdev, 0); 1958 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &saa->revision); 1959 1960 saa->saa7146_mem = ioremap(saa->saa7146_adr, 0x200); 1961 if (saa->saa7146_mem == NULL) { 1962 dev_err(&pdev->dev, "%d: ioremap failed!\n", num); 1963 retval = -EIO; 1964 goto err; 1965 } 1966 1967 memcpy(&saa->video_dev, &saa_template, sizeof(saa_template)); 1968 saawrite(0, SAA7146_IER); /* turn off all interrupts */ 1969 1970 retval = request_irq(saa->irq, saa7146_irq, IRQF_SHARED | IRQF_DISABLED, 1971 "stradis", saa); 1972 if (retval == -EINVAL) 1973 dev_err(&pdev->dev, "%d: Bad irq number or handler\n", num); 1974 else if (retval == -EBUSY) 1975 dev_err(&pdev->dev, "%d: IRQ %ld busy, change your PnP config " 1976 "in BIOS\n", num, saa->irq); 1977 if (retval < 0) 1978 goto errio; 1979 1980 pci_set_master(pdev); 1981 retval = video_register_device(&saa->video_dev, VFL_TYPE_GRABBER, 1982 video_nr); 1983 if (retval < 0) { 1984 dev_err(&pdev->dev, "%d: error in registering video device!\n", 1985 num); 1986 goto errio; 1987 } 1988 1989 return 0; 1990errio: 1991 iounmap(saa->saa7146_mem); 1992err: 1993 return retval; 1994} 1995 1996static int __devinit init_saa7146(struct pci_dev *pdev) 1997{ 1998 struct saa7146 *saa = pci_get_drvdata(pdev); 1999 2000 saa->user = 0; 2001 /* reset the saa7146 */ 2002 saawrite(0xffff0000, SAA7146_MC1); 2003 mdelay(5); 2004 /* enable debi and i2c transfers and pins */ 2005 saawrite(((SAA7146_MC1_EDP | SAA7146_MC1_EI2C | 2006 SAA7146_MC1_TR_E_DEBI) << 16) | 0xffff, SAA7146_MC1); 2007 /* ensure proper state of chip */ 2008 saawrite(0x00000000, SAA7146_PAGE1); 2009 saawrite(0x00f302c0, SAA7146_NUM_LINE_BYTE1); 2010 saawrite(0x00000000, SAA7146_PAGE2); 2011 saawrite(0x01400080, SAA7146_NUM_LINE_BYTE2); 2012 saawrite(0x00000000, SAA7146_DD1_INIT); 2013 saawrite(0x00000000, SAA7146_DD1_STREAM_B); 2014 saawrite(0x00000000, SAA7146_DD1_STREAM_A); 2015 saawrite(0x00000000, SAA7146_BRS_CTRL); 2016 saawrite(0x80400040, SAA7146_BCS_CTRL); 2017 saawrite(0x0000e000 /*| (1<<29) */ , SAA7146_HPS_CTRL); 2018 saawrite(0x00000060, SAA7146_CLIP_FORMAT_CTRL); 2019 saawrite(0x00000000, SAA7146_ACON1); 2020 saawrite(0x00000000, SAA7146_ACON2); 2021 saawrite(0x00000600, SAA7146_I2C_STATUS); 2022 saawrite(((SAA7146_MC2_UPLD_D1_B | SAA7146_MC2_UPLD_D1_A | 2023 SAA7146_MC2_UPLD_BRS | SAA7146_MC2_UPLD_HPS_H | 2024 SAA7146_MC2_UPLD_HPS_V | SAA7146_MC2_UPLD_DMA2 | 2025 SAA7146_MC2_UPLD_DMA1 | SAA7146_MC2_UPLD_I2C) << 16) | 0xffff, 2026 SAA7146_MC2); 2027 /* setup arbitration control registers */ 2028 saawrite(0x1412121a, SAA7146_PCI_BT_V1); 2029 2030 /* allocate 32k dma buffer + 4k for page table */ 2031 if ((saa->dmadebi = kmalloc(32768 + 4096, GFP_KERNEL)) == NULL) { 2032 dev_err(&pdev->dev, "%d: debi kmalloc failed\n", saa->nr); 2033 goto err; 2034 } 2035 saa->audhead = saa->vidhead = saa->osdhead = 0; 2036 saa->audtail = saa->vidtail = saa->osdtail = 0; 2037 if (saa->vidbuf == NULL && (saa->vidbuf = vmalloc(524288)) == NULL) { 2038 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2039 goto err; 2040 } 2041 if (saa->audbuf == NULL && (saa->audbuf = vmalloc(65536)) == NULL) { 2042 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2043 goto errfree; 2044 } 2045 if (saa->osdbuf == NULL && (saa->osdbuf = vmalloc(131072)) == NULL) { 2046 dev_err(&pdev->dev, "%d: malloc failed\n", saa->nr); 2047 goto errfree; 2048 } 2049 /* allocate 81920 byte buffer for clipping */ 2050 if ((saa->dmavid2 = kzalloc(VIDEO_CLIPMAP_SIZE, GFP_KERNEL)) == NULL) { 2051 dev_err(&pdev->dev, "%d: clip kmalloc failed\n", saa->nr); 2052 goto errfree; 2053 } 2054 /* setup clipping registers */ 2055 saawrite(virt_to_bus(saa->dmavid2), SAA7146_BASE_EVEN2); 2056 saawrite(virt_to_bus(saa->dmavid2) + 128, SAA7146_BASE_ODD2); 2057 saawrite(virt_to_bus(saa->dmavid2) + VIDEO_CLIPMAP_SIZE, 2058 SAA7146_PROT_ADDR2); 2059 saawrite(256, SAA7146_PITCH2); 2060 saawrite(4, SAA7146_PAGE2); /* dma direction: read, no byteswap */ 2061 saawrite(((SAA7146_MC2_UPLD_DMA2) << 16) | SAA7146_MC2_UPLD_DMA2, 2062 SAA7146_MC2); 2063 I2CBusScan(saa); 2064 2065 return 0; 2066errfree: 2067 vfree(saa->osdbuf); 2068 vfree(saa->audbuf); 2069 vfree(saa->vidbuf); 2070 saa->audbuf = saa->osdbuf = saa->vidbuf = NULL; 2071err: 2072 return -ENOMEM; 2073} 2074 2075static void stradis_release_saa(struct pci_dev *pdev) 2076{ 2077 u8 command; 2078 struct saa7146 *saa = pci_get_drvdata(pdev); 2079 2080 /* turn off all capturing, DMA and IRQs */ 2081 saawrite(0xffff0000, SAA7146_MC1); /* reset chip */ 2082 saawrite(0, SAA7146_MC2); 2083 saawrite(0, SAA7146_IER); 2084 saawrite(0xffffffffUL, SAA7146_ISR); 2085 2086 /* disable PCI bus-mastering */ 2087 pci_read_config_byte(pdev, PCI_COMMAND, &command); 2088 command &= ~PCI_COMMAND_MASTER; 2089 pci_write_config_byte(pdev, PCI_COMMAND, command); 2090 2091 /* unmap and free memory */ 2092 saa->audhead = saa->audtail = saa->osdhead = 0; 2093 saa->vidhead = saa->vidtail = saa->osdtail = 0; 2094 vfree(saa->vidbuf); 2095 vfree(saa->audbuf); 2096 vfree(saa->osdbuf); 2097 kfree(saa->dmavid2); 2098 saa->audbuf = saa->vidbuf = saa->osdbuf = NULL; 2099 saa->dmavid2 = NULL; 2100 kfree(saa->dmadebi); 2101 kfree(saa->dmavid1); 2102 kfree(saa->dmavid3); 2103 kfree(saa->dmaa1in); 2104 kfree(saa->dmaa1out); 2105 kfree(saa->dmaa2in); 2106 kfree(saa->dmaa2out); 2107 kfree(saa->dmaRPS1); 2108 kfree(saa->dmaRPS2); 2109 free_irq(saa->irq, saa); 2110 if (saa->saa7146_mem) 2111 iounmap(saa->saa7146_mem); 2112 if (video_is_registered(&saa->video_dev)) 2113 video_unregister_device(&saa->video_dev); 2114} 2115 2116static int __devinit stradis_probe(struct pci_dev *pdev, 2117 const struct pci_device_id *ent) 2118{ 2119 int retval = -EINVAL; 2120 2121 if (saa_num >= SAA7146_MAX) 2122 goto err; 2123 2124 if (!pdev->subsystem_vendor) 2125 dev_info(&pdev->dev, "%d: rev1 decoder\n", saa_num); 2126 else 2127 dev_info(&pdev->dev, "%d: SDM2xx found\n", saa_num); 2128 2129 pci_set_drvdata(pdev, &saa7146s[saa_num]); 2130 2131 retval = configure_saa7146(pdev, saa_num); 2132 if (retval) { 2133 dev_err(&pdev->dev, "%d: error in configuring\n", saa_num); 2134 goto err; 2135 } 2136 2137 if (init_saa7146(pdev) < 0) { 2138 dev_err(&pdev->dev, "%d: error in initialization\n", saa_num); 2139 retval = -EIO; 2140 goto errrel; 2141 } 2142 2143 saa_num++; 2144 2145 return 0; 2146errrel: 2147 stradis_release_saa(pdev); 2148err: 2149 return retval; 2150} 2151 2152static void __devexit stradis_remove(struct pci_dev *pdev) 2153{ 2154 stradis_release_saa(pdev); 2155} 2156 2157static struct pci_device_id stradis_pci_tbl[] = { 2158 { PCI_DEVICE(PCI_VENDOR_ID_PHILIPS, PCI_DEVICE_ID_PHILIPS_SAA7146) }, 2159 { 0 } 2160}; 2161 2162 2163static struct pci_driver stradis_driver = { 2164 .name = "stradis", 2165 .id_table = stradis_pci_tbl, 2166 .probe = stradis_probe, 2167 .remove = __devexit_p(stradis_remove) 2168}; 2169 2170static int __init stradis_init(void) 2171{ 2172 int retval; 2173 2174 saa_num = 0; 2175 2176 retval = pci_register_driver(&stradis_driver); 2177 if (retval) 2178 printk(KERN_ERR "stradis: Unable to register pci driver.\n"); 2179 2180 return retval; 2181} 2182 2183static void __exit stradis_exit(void) 2184{ 2185 pci_unregister_driver(&stradis_driver); 2186 printk(KERN_INFO "stradis: module cleanup complete\n"); 2187} 2188 2189module_init(stradis_init); 2190module_exit(stradis_exit); 2191