1/* 2 * cx18 gpio functions 3 * 4 * Derived from ivtv-gpio.c 5 * 6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 22 * 02111-1307 USA 23 */ 24 25#include "cx18-driver.h" 26#include "cx18-io.h" 27#include "cx18-cards.h" 28#include "cx18-gpio.h" 29#include "tuner-xc2028.h" 30 31/********************* GPIO stuffs *********************/ 32 33/* GPIO registers */ 34#define CX18_REG_GPIO_IN 0xc72010 35#define CX18_REG_GPIO_OUT1 0xc78100 36#define CX18_REG_GPIO_DIR1 0xc78108 37#define CX18_REG_GPIO_OUT2 0xc78104 38#define CX18_REG_GPIO_DIR2 0xc7810c 39 40/* 41 * HVR-1600 GPIO pins, courtesy of Hauppauge: 42 * 43 * gpio0: zilog ir process reset pin 44 * gpio1: zilog programming pin (you should never use this) 45 * gpio12: cx24227 reset pin 46 * gpio13: cs5345 reset pin 47*/ 48 49/* 50 * File scope utility functions 51 */ 52static void gpio_write(struct cx18 *cx) 53{ 54 u32 dir_lo = cx->gpio_dir & 0xffff; 55 u32 val_lo = cx->gpio_val & 0xffff; 56 u32 dir_hi = cx->gpio_dir >> 16; 57 u32 val_hi = cx->gpio_val >> 16; 58 59 cx18_write_reg_expect(cx, dir_lo << 16, 60 CX18_REG_GPIO_DIR1, ~dir_lo, dir_lo); 61 cx18_write_reg_expect(cx, (dir_lo << 16) | val_lo, 62 CX18_REG_GPIO_OUT1, val_lo, dir_lo); 63 cx18_write_reg_expect(cx, dir_hi << 16, 64 CX18_REG_GPIO_DIR2, ~dir_hi, dir_hi); 65 cx18_write_reg_expect(cx, (dir_hi << 16) | val_hi, 66 CX18_REG_GPIO_OUT2, val_hi, dir_hi); 67} 68 69static void gpio_update(struct cx18 *cx, u32 mask, u32 data) 70{ 71 if (mask == 0) 72 return; 73 74 mutex_lock(&cx->gpio_lock); 75 cx->gpio_val = (cx->gpio_val & ~mask) | (data & mask); 76 gpio_write(cx); 77 mutex_unlock(&cx->gpio_lock); 78} 79 80static void gpio_reset_seq(struct cx18 *cx, u32 active_lo, u32 active_hi, 81 unsigned int assert_msecs, 82 unsigned int recovery_msecs) 83{ 84 u32 mask; 85 86 mask = active_lo | active_hi; 87 if (mask == 0) 88 return; 89 90 /* 91 * Assuming that active_hi and active_lo are a subsets of the bits in 92 * gpio_dir. Also assumes that active_lo and active_hi don't overlap 93 * in any bit position 94 */ 95 96 /* Assert */ 97 gpio_update(cx, mask, ~active_lo); 98 schedule_timeout_uninterruptible(msecs_to_jiffies(assert_msecs)); 99 100 /* Deassert */ 101 gpio_update(cx, mask, ~active_hi); 102 schedule_timeout_uninterruptible(msecs_to_jiffies(recovery_msecs)); 103} 104 105/* 106 * GPIO Multiplexer - logical device 107 */ 108static int gpiomux_log_status(struct v4l2_subdev *sd) 109{ 110 struct cx18 *cx = v4l2_get_subdevdata(sd); 111 112 mutex_lock(&cx->gpio_lock); 113 CX18_INFO_DEV(sd, "GPIO: direction 0x%08x, value 0x%08x\n", 114 cx->gpio_dir, cx->gpio_val); 115 mutex_unlock(&cx->gpio_lock); 116 return 0; 117} 118 119static int gpiomux_s_radio(struct v4l2_subdev *sd) 120{ 121 struct cx18 *cx = v4l2_get_subdevdata(sd); 122 123 gpio_update(cx, cx->card->gpio_audio_input.mask, 124 cx->card->gpio_audio_input.radio); 125 return 0; 126} 127 128static int gpiomux_s_std(struct v4l2_subdev *sd, v4l2_std_id norm) 129{ 130 struct cx18 *cx = v4l2_get_subdevdata(sd); 131 u32 data; 132 133 switch (cx->card->audio_inputs[cx->audio_input].muxer_input) { 134 case 1: 135 data = cx->card->gpio_audio_input.linein; 136 break; 137 case 0: 138 data = cx->card->gpio_audio_input.tuner; 139 break; 140 default: 141 data = cx->card->gpio_audio_input.tuner; 142 break; 143 } 144 gpio_update(cx, cx->card->gpio_audio_input.mask, data); 145 return 0; 146} 147 148static int gpiomux_s_audio_routing(struct v4l2_subdev *sd, 149 u32 input, u32 output, u32 config) 150{ 151 struct cx18 *cx = v4l2_get_subdevdata(sd); 152 u32 data; 153 154 switch (input) { 155 case 0: 156 data = cx->card->gpio_audio_input.tuner; 157 break; 158 case 1: 159 data = cx->card->gpio_audio_input.linein; 160 break; 161 case 2: 162 data = cx->card->gpio_audio_input.radio; 163 break; 164 default: 165 return -EINVAL; 166 } 167 gpio_update(cx, cx->card->gpio_audio_input.mask, data); 168 return 0; 169} 170 171static const struct v4l2_subdev_core_ops gpiomux_core_ops = { 172 .log_status = gpiomux_log_status, 173 .s_std = gpiomux_s_std, 174}; 175 176static const struct v4l2_subdev_tuner_ops gpiomux_tuner_ops = { 177 .s_radio = gpiomux_s_radio, 178}; 179 180static const struct v4l2_subdev_audio_ops gpiomux_audio_ops = { 181 .s_routing = gpiomux_s_audio_routing, 182}; 183 184static const struct v4l2_subdev_ops gpiomux_ops = { 185 .core = &gpiomux_core_ops, 186 .tuner = &gpiomux_tuner_ops, 187 .audio = &gpiomux_audio_ops, 188}; 189 190/* 191 * GPIO Reset Controller - logical device 192 */ 193static int resetctrl_log_status(struct v4l2_subdev *sd) 194{ 195 struct cx18 *cx = v4l2_get_subdevdata(sd); 196 197 mutex_lock(&cx->gpio_lock); 198 CX18_INFO_DEV(sd, "GPIO: direction 0x%08x, value 0x%08x\n", 199 cx->gpio_dir, cx->gpio_val); 200 mutex_unlock(&cx->gpio_lock); 201 return 0; 202} 203 204static int resetctrl_reset(struct v4l2_subdev *sd, u32 val) 205{ 206 struct cx18 *cx = v4l2_get_subdevdata(sd); 207 const struct cx18_gpio_i2c_slave_reset *p; 208 209 p = &cx->card->gpio_i2c_slave_reset; 210 switch (val) { 211 case CX18_GPIO_RESET_I2C: 212 gpio_reset_seq(cx, p->active_lo_mask, p->active_hi_mask, 213 p->msecs_asserted, p->msecs_recovery); 214 break; 215 case CX18_GPIO_RESET_Z8F0811: 216 /* 217 * Assert timing for the Z8F0811 on HVR-1600 boards: 218 * 1. Assert RESET for min of 4 clock cycles at 18.432 MHz to 219 * initiate 220 * 2. Reset then takes 66 WDT cycles at 10 kHz + 16 xtal clock 221 * cycles (6,601,085 nanoseconds ~= 7 milliseconds) 222 * 3. DBG pin must be high before chip exits reset for normal 223 * operation. DBG is open drain and hopefully pulled high 224 * since we don't normally drive it (GPIO 1?) for the 225 * HVR-1600 226 * 4. Z8F0811 won't exit reset until RESET is deasserted 227 * 5. Zilog comes out of reset, loads reset vector address and 228 * executes from there. Required recovery delay unknown. 229 */ 230 gpio_reset_seq(cx, p->ir_reset_mask, 0, 231 p->msecs_asserted, p->msecs_recovery); 232 break; 233 case CX18_GPIO_RESET_XC2028: 234 if (cx->card->tuners[0].tuner == TUNER_XC2028) 235 gpio_reset_seq(cx, (1 << cx->card->xceive_pin), 0, 236 1, 1); 237 break; 238 } 239 return 0; 240} 241 242static const struct v4l2_subdev_core_ops resetctrl_core_ops = { 243 .log_status = resetctrl_log_status, 244 .reset = resetctrl_reset, 245}; 246 247static const struct v4l2_subdev_ops resetctrl_ops = { 248 .core = &resetctrl_core_ops, 249}; 250 251/* 252 * External entry points 253 */ 254void cx18_gpio_init(struct cx18 *cx) 255{ 256 mutex_lock(&cx->gpio_lock); 257 cx->gpio_dir = cx->card->gpio_init.direction; 258 cx->gpio_val = cx->card->gpio_init.initial_value; 259 260 if (cx->card->tuners[0].tuner == TUNER_XC2028) { 261 cx->gpio_dir |= 1 << cx->card->xceive_pin; 262 cx->gpio_val |= 1 << cx->card->xceive_pin; 263 } 264 265 if (cx->gpio_dir == 0) { 266 mutex_unlock(&cx->gpio_lock); 267 return; 268 } 269 270 CX18_DEBUG_INFO("GPIO initial dir: %08x/%08x out: %08x/%08x\n", 271 cx18_read_reg(cx, CX18_REG_GPIO_DIR1), 272 cx18_read_reg(cx, CX18_REG_GPIO_DIR2), 273 cx18_read_reg(cx, CX18_REG_GPIO_OUT1), 274 cx18_read_reg(cx, CX18_REG_GPIO_OUT2)); 275 276 gpio_write(cx); 277 mutex_unlock(&cx->gpio_lock); 278} 279 280int cx18_gpio_register(struct cx18 *cx, u32 hw) 281{ 282 struct v4l2_subdev *sd; 283 const struct v4l2_subdev_ops *ops; 284 char *str; 285 286 switch (hw) { 287 case CX18_HW_GPIO_MUX: 288 sd = &cx->sd_gpiomux; 289 ops = &gpiomux_ops; 290 str = "gpio-mux"; 291 break; 292 case CX18_HW_GPIO_RESET_CTRL: 293 sd = &cx->sd_resetctrl; 294 ops = &resetctrl_ops; 295 str = "gpio-reset-ctrl"; 296 break; 297 default: 298 return -EINVAL; 299 } 300 301 v4l2_subdev_init(sd, ops); 302 v4l2_set_subdevdata(sd, cx); 303 snprintf(sd->name, sizeof(sd->name), "%s %s", cx->v4l2_dev.name, str); 304 sd->grp_id = hw; 305 return v4l2_device_register_subdev(&cx->v4l2_dev, sd); 306} 307 308void cx18_reset_ir_gpio(void *data) 309{ 310 struct cx18 *cx = to_cx18((struct v4l2_device *)data); 311 312 if (cx->card->gpio_i2c_slave_reset.ir_reset_mask == 0) 313 return; 314 315 CX18_DEBUG_INFO("Resetting IR microcontroller\n"); 316 317 v4l2_subdev_call(&cx->sd_resetctrl, 318 core, reset, CX18_GPIO_RESET_Z8F0811); 319} 320EXPORT_SYMBOL(cx18_reset_ir_gpio); 321/* This symbol is exported for use by lirc_pvr150 for the IR-blaster */ 322 323/* Xceive tuner reset function */ 324int cx18_reset_tuner_gpio(void *dev, int component, int cmd, int value) 325{ 326 struct i2c_algo_bit_data *algo = dev; 327 struct cx18_i2c_algo_callback_data *cb_data = algo->data; 328 struct cx18 *cx = cb_data->cx; 329 330 if (cmd != XC2028_TUNER_RESET || 331 cx->card->tuners[0].tuner != TUNER_XC2028) 332 return 0; 333 334 CX18_DEBUG_INFO("Resetting XCeive tuner\n"); 335 return v4l2_subdev_call(&cx->sd_resetctrl, 336 core, reset, CX18_GPIO_RESET_XC2028); 337} 338