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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/isdn/hardware/mISDN/
1/*
2 * w6692.c     mISDN driver for Winbond w6692 based cards
3 *
4 * Author      Karsten Keil <kkeil@suse.de>
5 *             based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
6 *
7 * Copyright 2009  by Karsten Keil <keil@isdn4linux.de>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/pci.h>
26#include <linux/delay.h>
27#include <linux/mISDNhw.h>
28#include <linux/slab.h>
29#include "w6692.h"
30
31#define W6692_REV	"2.0"
32
33#define DBUSY_TIMER_VALUE	80
34
35enum {
36	W6692_ASUS,
37	W6692_WINBOND,
38	W6692_USR
39};
40
41/* private data in the PCI devices list */
42struct w6692map {
43	u_int	subtype;
44	char	*name;
45};
46
47static const struct w6692map  w6692_map[] =
48{
49	{W6692_ASUS, "Dynalink/AsusCom IS64PH"},
50	{W6692_WINBOND, "Winbond W6692"},
51	{W6692_USR, "USR W6692"}
52};
53
54#ifndef PCI_VENDOR_ID_USR
55#define PCI_VENDOR_ID_USR	0x16ec
56#define PCI_DEVICE_ID_USR_6692	0x3409
57#endif
58
59struct w6692_ch {
60	struct bchannel		bch;
61	u32			addr;
62	struct timer_list	timer;
63	u8			b_mode;
64};
65
66struct w6692_hw {
67	struct list_head	list;
68	struct pci_dev		*pdev;
69	char			name[MISDN_MAX_IDLEN];
70	u32			irq;
71	u32			irqcnt;
72	u32			addr;
73	u32			fmask;	/* feature mask - bit set per card nr */
74	int			subtype;
75	spinlock_t		lock;	/* hw lock */
76	u8			imask;
77	u8			pctl;
78	u8			xaddr;
79	u8			xdata;
80	u8			state;
81	struct w6692_ch		bc[2];
82	struct dchannel		dch;
83	char			log[64];
84};
85
86static LIST_HEAD(Cards);
87static DEFINE_RWLOCK(card_lock); /* protect Cards */
88
89static int w6692_cnt;
90static int debug;
91static u32 led;
92static u32 pots;
93
94static void
95_set_debug(struct w6692_hw *card)
96{
97	card->dch.debug = debug;
98	card->bc[0].bch.debug = debug;
99	card->bc[1].bch.debug = debug;
100}
101
102static int
103set_debug(const char *val, struct kernel_param *kp)
104{
105	int ret;
106	struct w6692_hw *card;
107
108	ret = param_set_uint(val, kp);
109	if (!ret) {
110		read_lock(&card_lock);
111		list_for_each_entry(card, &Cards, list)
112			_set_debug(card);
113		read_unlock(&card_lock);
114	}
115	return ret;
116}
117
118MODULE_AUTHOR("Karsten Keil");
119MODULE_LICENSE("GPL v2");
120MODULE_VERSION(W6692_REV);
121module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
122MODULE_PARM_DESC(debug, "W6692 debug mask");
123module_param(led, uint, S_IRUGO | S_IWUSR);
124MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
125module_param(pots, uint, S_IRUGO | S_IWUSR);
126MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
127
128static inline u8
129ReadW6692(struct w6692_hw *card, u8 offset)
130{
131	return inb(card->addr + offset);
132}
133
134static inline void
135WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
136{
137	outb(value, card->addr + offset);
138}
139
140static inline u8
141ReadW6692B(struct w6692_ch *bc, u8 offset)
142{
143	return inb(bc->addr + offset);
144}
145
146static inline void
147WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
148{
149	outb(value, bc->addr + offset);
150}
151
152static void
153enable_hwirq(struct w6692_hw *card)
154{
155	WriteW6692(card, W_IMASK, card->imask);
156}
157
158static void
159disable_hwirq(struct w6692_hw *card)
160{
161	WriteW6692(card, W_IMASK, 0xff);
162}
163
164static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
165
166static void
167W6692Version(struct w6692_hw *card)
168{
169	int val;
170
171	val = ReadW6692(card, W_D_RBCH);
172	pr_notice("%s: Winbond W6692 version: %s\n", card->name,
173		W6692Ver[(val >> 6) & 3]);
174}
175
176static void
177w6692_led_handler(struct w6692_hw *card, int on)
178{
179	if ((!(card->fmask & led)) || card->subtype == W6692_USR)
180		return;
181	if (on) {
182		card->xdata &= 0xfb;	/*  LED ON */
183		WriteW6692(card, W_XDATA, card->xdata);
184	} else {
185		card->xdata |= 0x04;	/*  LED OFF */
186		WriteW6692(card, W_XDATA, card->xdata);
187	}
188}
189
190static void
191ph_command(struct w6692_hw *card, u8 cmd)
192{
193	pr_debug("%s: ph_command %x\n", card->name, cmd);
194	WriteW6692(card, W_CIX, cmd);
195}
196
197static void
198W6692_new_ph(struct w6692_hw *card)
199{
200	if (card->state == W_L1CMD_RST)
201		ph_command(card, W_L1CMD_DRC);
202	schedule_event(&card->dch, FLG_PHCHANGE);
203}
204
205static void
206W6692_ph_bh(struct dchannel *dch)
207{
208	struct w6692_hw *card = dch->hw;
209
210	switch (card->state) {
211	case W_L1CMD_RST:
212		dch->state = 0;
213		l1_event(dch->l1, HW_RESET_IND);
214		break;
215	case W_L1IND_CD:
216		dch->state = 3;
217		l1_event(dch->l1, HW_DEACT_CNF);
218		break;
219	case W_L1IND_DRD:
220		dch->state = 3;
221		l1_event(dch->l1, HW_DEACT_IND);
222		break;
223	case W_L1IND_CE:
224		dch->state = 4;
225		l1_event(dch->l1, HW_POWERUP_IND);
226		break;
227	case W_L1IND_LD:
228		if (dch->state <= 5) {
229			dch->state = 5;
230			l1_event(dch->l1, ANYSIGNAL);
231		} else {
232			dch->state = 8;
233			l1_event(dch->l1, LOSTFRAMING);
234		}
235		break;
236	case W_L1IND_ARD:
237		dch->state = 6;
238		l1_event(dch->l1, INFO2);
239		break;
240	case W_L1IND_AI8:
241		dch->state = 7;
242		l1_event(dch->l1, INFO4_P8);
243		break;
244	case W_L1IND_AI10:
245		dch->state = 7;
246		l1_event(dch->l1, INFO4_P10);
247		break;
248	default:
249		pr_debug("%s: TE unknown state %02x dch state %02x\n",
250			card->name, card->state, dch->state);
251		break;
252	}
253	pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
254}
255
256static void
257W6692_empty_Dfifo(struct w6692_hw *card, int count)
258{
259	struct dchannel *dch = &card->dch;
260	u8 *ptr;
261
262	pr_debug("%s: empty_Dfifo %d\n", card->name, count);
263	if (!dch->rx_skb) {
264		dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
265		if (!dch->rx_skb) {
266			pr_info("%s: D receive out of memory\n", card->name);
267			WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
268			return;
269		}
270	}
271	if ((dch->rx_skb->len + count) >= dch->maxlen) {
272		pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
273			dch->rx_skb->len + count);
274		WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
275		return;
276	}
277	ptr = skb_put(dch->rx_skb, count);
278	insb(card->addr + W_D_RFIFO, ptr, count);
279	WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
280	if (debug & DEBUG_HW_DFIFO) {
281		snprintf(card->log, 63, "D-recv %s %d ",
282			card->name, count);
283		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
284	}
285}
286
287static void
288W6692_fill_Dfifo(struct w6692_hw *card)
289{
290	struct dchannel *dch = &card->dch;
291	int count;
292	u8 *ptr;
293	u8 cmd = W_D_CMDR_XMS;
294
295	pr_debug("%s: fill_Dfifo\n", card->name);
296	if (!dch->tx_skb)
297		return;
298	count = dch->tx_skb->len - dch->tx_idx;
299	if (count <= 0)
300		return;
301	if (count > W_D_FIFO_THRESH)
302		count = W_D_FIFO_THRESH;
303	else
304		cmd |= W_D_CMDR_XME;
305	ptr = dch->tx_skb->data + dch->tx_idx;
306	dch->tx_idx += count;
307	outsb(card->addr + W_D_XFIFO, ptr, count);
308	WriteW6692(card, W_D_CMDR, cmd);
309	if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
310		pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
311		del_timer(&dch->timer);
312	}
313	init_timer(&dch->timer);
314	dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
315	add_timer(&dch->timer);
316	if (debug & DEBUG_HW_DFIFO) {
317		snprintf(card->log, 63, "D-send %s %d ",
318			card->name, count);
319		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
320	}
321}
322
323static void
324d_retransmit(struct w6692_hw *card)
325{
326	struct dchannel *dch = &card->dch;
327
328	if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
329		del_timer(&dch->timer);
330#ifdef FIXME
331	if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
332		dchannel_sched_event(dch, D_CLEARBUSY);
333#endif
334	if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
335		/* Restart frame */
336		dch->tx_idx = 0;
337		W6692_fill_Dfifo(card);
338	} else if (dch->tx_skb) { /* should not happen */
339		pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
340		test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
341		dch->tx_idx = 0;
342		W6692_fill_Dfifo(card);
343	} else {
344		pr_info("%s: XDU no TX_BUSY\n", card->name);
345		if (get_next_dframe(dch))
346			W6692_fill_Dfifo(card);
347	}
348}
349
350static void
351handle_rxD(struct w6692_hw *card) {
352	u8	stat;
353	int	count;
354
355	stat = ReadW6692(card, W_D_RSTA);
356	if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
357		if (stat & W_D_RSTA_RDOV) {
358			pr_debug("%s: D-channel RDOV\n", card->name);
359#ifdef ERROR_STATISTIC
360			card->dch.err_rx++;
361#endif
362		}
363		if (stat & W_D_RSTA_CRCE) {
364			pr_debug("%s: D-channel CRC error\n", card->name);
365#ifdef ERROR_STATISTIC
366			card->dch.err_crc++;
367#endif
368		}
369		if (stat & W_D_RSTA_RMB) {
370			pr_debug("%s: D-channel ABORT\n", card->name);
371#ifdef ERROR_STATISTIC
372			card->dch.err_rx++;
373#endif
374		}
375		if (card->dch.rx_skb)
376			dev_kfree_skb(card->dch.rx_skb);
377		card->dch.rx_skb = NULL;
378		WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
379	} else {
380		count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
381		if (count == 0)
382			count = W_D_FIFO_THRESH;
383		W6692_empty_Dfifo(card, count);
384		recv_Dchannel(&card->dch);
385	}
386}
387
388static void
389handle_txD(struct w6692_hw *card) {
390	if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
391		del_timer(&card->dch.timer);
392	if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
393		W6692_fill_Dfifo(card);
394	} else {
395		if (card->dch.tx_skb)
396			dev_kfree_skb(card->dch.tx_skb);
397		if (get_next_dframe(&card->dch))
398			W6692_fill_Dfifo(card);
399	}
400}
401
402static void
403handle_statusD(struct w6692_hw *card)
404{
405	struct dchannel *dch = &card->dch;
406	u8 exval, v1, cir;
407
408	exval = ReadW6692(card, W_D_EXIR);
409
410	pr_debug("%s: D_EXIR %02x\n", card->name, exval);
411	if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
412		/* Transmit underrun/collision */
413		pr_debug("%s: D-channel underrun/collision\n", card->name);
414#ifdef ERROR_STATISTIC
415		dch->err_tx++;
416#endif
417		d_retransmit(card);
418	}
419	if (exval & W_D_EXI_RDOV) {	/* RDOV */
420		pr_debug("%s: D-channel RDOV\n", card->name);
421		WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
422	}
423	if (exval & W_D_EXI_TIN2)	/* TIN2 - never */
424		pr_debug("%s: spurious TIN2 interrupt\n", card->name);
425	if (exval & W_D_EXI_MOC) {	/* MOC - not supported */
426		v1 = ReadW6692(card, W_MOSR);
427		pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
428			card->name, v1);
429	}
430	if (exval & W_D_EXI_ISC) {	/* ISC - Level1 change */
431		cir = ReadW6692(card, W_CIR);
432		pr_debug("%s: ISC CIR %02X\n", card->name, cir);
433		if (cir & W_CIR_ICC) {
434			v1 = cir & W_CIR_COD_MASK;
435			pr_debug("%s: ph_state_change %x -> %x\n", card->name,
436				dch->state, v1);
437			card->state = v1;
438			if (card->fmask & led) {
439				switch (v1) {
440				case W_L1IND_AI8:
441				case W_L1IND_AI10:
442					w6692_led_handler(card, 1);
443					break;
444				default:
445					w6692_led_handler(card, 0);
446					break;
447				}
448			}
449			W6692_new_ph(card);
450		}
451		if (cir & W_CIR_SCC) {
452			v1 = ReadW6692(card, W_SQR);
453			pr_debug("%s: SCC SQR %02X\n", card->name, v1);
454		}
455	}
456	if (exval & W_D_EXI_WEXP)
457		pr_debug("%s: spurious WEXP interrupt!\n", card->name);
458	if (exval & W_D_EXI_TEXP)
459		pr_debug("%s: spurious TEXP interrupt!\n", card->name);
460}
461
462static void
463W6692_empty_Bfifo(struct w6692_ch *wch, int count)
464{
465	struct w6692_hw *card = wch->bch.hw;
466	u8 *ptr;
467
468	pr_debug("%s: empty_Bfifo %d\n", card->name, count);
469	if (unlikely(wch->bch.state == ISDN_P_NONE)) {
470		pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
471		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
472		if (wch->bch.rx_skb)
473			skb_trim(wch->bch.rx_skb, 0);
474		return;
475	}
476	if (!wch->bch.rx_skb) {
477		wch->bch.rx_skb = mI_alloc_skb(wch->bch.maxlen, GFP_ATOMIC);
478		if (unlikely(!wch->bch.rx_skb)) {
479			pr_info("%s: B receive out of memory\n", card->name);
480			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
481				W_B_CMDR_RACT);
482			return;
483		}
484	}
485	if (wch->bch.rx_skb->len + count > wch->bch.maxlen) {
486		pr_debug("%s: empty_Bfifo incoming packet too large\n",
487			card->name);
488		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
489		skb_trim(wch->bch.rx_skb, 0);
490		return;
491	}
492	ptr = skb_put(wch->bch.rx_skb, count);
493	insb(wch->addr + W_B_RFIFO, ptr, count);
494	WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
495	if (debug & DEBUG_HW_DFIFO) {
496		snprintf(card->log, 63, "B%1d-recv %s %d ",
497			wch->bch.nr, card->name, count);
498		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
499	}
500}
501
502static void
503W6692_fill_Bfifo(struct w6692_ch *wch)
504{
505	struct w6692_hw *card = wch->bch.hw;
506	int count;
507	u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
508
509	pr_debug("%s: fill Bfifo\n", card->name);
510	if (!wch->bch.tx_skb)
511		return;
512	count = wch->bch.tx_skb->len - wch->bch.tx_idx;
513	if (count <= 0)
514		return;
515	ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
516	if (count > W_B_FIFO_THRESH)
517		count = W_B_FIFO_THRESH;
518	else if (test_bit(FLG_HDLC, &wch->bch.Flags))
519		cmd |= W_B_CMDR_XME;
520
521	pr_debug("%s: fill Bfifo%d/%d\n", card->name,
522			count, wch->bch.tx_idx);
523	wch->bch.tx_idx += count;
524	outsb(wch->addr + W_B_XFIFO, ptr, count);
525	WriteW6692B(wch, W_B_CMDR, cmd);
526	if (debug & DEBUG_HW_DFIFO) {
527		snprintf(card->log, 63, "B%1d-send %s %d ",
528			wch->bch.nr, card->name, count);
529		print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
530	}
531}
532
533
534static int
535disable_pots(struct w6692_ch *wch)
536{
537	struct w6692_hw *card = wch->bch.hw;
538
539	if (!(card->fmask & pots))
540		return -ENODEV;
541	wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
542	WriteW6692B(wch, W_B_MODE, wch->b_mode);
543	WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
544		W_B_CMDR_XRST);
545	return 0;
546}
547
548static int
549w6692_mode(struct w6692_ch *wch, u32 pr)
550{
551	struct w6692_hw	*card;
552
553	card = wch->bch.hw;
554	pr_debug("%s: B%d protocol %x-->%x\n", card->name,
555		wch->bch.nr, wch->bch.state, pr);
556	switch (pr) {
557	case ISDN_P_NONE:
558		if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
559			disable_pots(wch);
560		wch->b_mode = 0;
561		mISDN_clear_bchannel(&wch->bch);
562		WriteW6692B(wch, W_B_MODE, wch->b_mode);
563		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
564		test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
565		test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
566		break;
567	case ISDN_P_B_RAW:
568		wch->b_mode = W_B_MODE_MMS;
569		WriteW6692B(wch, W_B_MODE, wch->b_mode);
570		WriteW6692B(wch, W_B_EXIM, 0);
571		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
572			W_B_CMDR_XRST);
573		test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
574		break;
575	case ISDN_P_B_HDLC:
576		wch->b_mode = W_B_MODE_ITF;
577		WriteW6692B(wch, W_B_MODE, wch->b_mode);
578		WriteW6692B(wch, W_B_ADM1, 0xff);
579		WriteW6692B(wch, W_B_ADM2, 0xff);
580		WriteW6692B(wch, W_B_EXIM, 0);
581		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
582			W_B_CMDR_XRST);
583		test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
584		break;
585	default:
586		pr_info("%s: protocol %x not known\n", card->name, pr);
587		return -ENOPROTOOPT;
588	}
589	wch->bch.state = pr;
590	return 0;
591}
592
593static void
594send_next(struct w6692_ch *wch)
595{
596	if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len)
597		W6692_fill_Bfifo(wch);
598	else {
599		if (wch->bch.tx_skb) {
600			/* send confirm, on trans, free on hdlc. */
601			if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
602				confirm_Bsend(&wch->bch);
603			dev_kfree_skb(wch->bch.tx_skb);
604		}
605		if (get_next_bframe(&wch->bch))
606			W6692_fill_Bfifo(wch);
607	}
608}
609
610static void
611W6692B_interrupt(struct w6692_hw *card, int ch)
612{
613	struct w6692_ch	*wch = &card->bc[ch];
614	int		count;
615	u8		stat, star = 0;
616
617	stat = ReadW6692B(wch, W_B_EXIR);
618	pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
619	if (stat & W_B_EXI_RME) {
620		star = ReadW6692B(wch, W_B_STAR);
621		if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
622			if ((star & W_B_STAR_RDOV) &&
623			    test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
624				pr_debug("%s: B%d RDOV proto=%x\n", card->name,
625					wch->bch.nr, wch->bch.state);
626#ifdef ERROR_STATISTIC
627				wch->bch.err_rdo++;
628#endif
629			}
630			if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
631				if (star & W_B_STAR_CRCE) {
632					pr_debug("%s: B%d CRC error\n",
633						card->name, wch->bch.nr);
634#ifdef ERROR_STATISTIC
635					wch->bch.err_crc++;
636#endif
637				}
638				if (star & W_B_STAR_RMB) {
639					pr_debug("%s: B%d message abort\n",
640						card->name, wch->bch.nr);
641#ifdef ERROR_STATISTIC
642					wch->bch.err_inv++;
643#endif
644				}
645			}
646			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
647				W_B_CMDR_RRST | W_B_CMDR_RACT);
648			if (wch->bch.rx_skb)
649				skb_trim(wch->bch.rx_skb, 0);
650		} else {
651			count = ReadW6692B(wch, W_B_RBCL) &
652				(W_B_FIFO_THRESH - 1);
653			if (count == 0)
654				count = W_B_FIFO_THRESH;
655			W6692_empty_Bfifo(wch, count);
656			recv_Bchannel(&wch->bch, 0);
657		}
658	}
659	if (stat & W_B_EXI_RMR) {
660		if (!(stat & W_B_EXI_RME))
661			star = ReadW6692B(wch, W_B_STAR);
662		if (star & W_B_STAR_RDOV) {
663			pr_debug("%s: B%d RDOV proto=%x\n", card->name,
664				wch->bch.nr, wch->bch.state);
665#ifdef ERROR_STATISTIC
666			wch->bch.err_rdo++;
667#endif
668			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
669				W_B_CMDR_RRST | W_B_CMDR_RACT);
670		} else {
671			W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
672			if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags) &&
673			    wch->bch.rx_skb && (wch->bch.rx_skb->len > 0))
674				recv_Bchannel(&wch->bch, 0);
675		}
676	}
677	if (stat & W_B_EXI_RDOV) {
678		/* only if it is not handled yet */
679		if (!(star & W_B_STAR_RDOV)) {
680			pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
681				wch->bch.nr, wch->bch.state);
682#ifdef ERROR_STATISTIC
683			wch->bch.err_rdo++;
684#endif
685			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
686				W_B_CMDR_RRST | W_B_CMDR_RACT);
687		}
688	}
689	if (stat & W_B_EXI_XFR) {
690		if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
691			star = ReadW6692B(wch, W_B_STAR);
692			pr_debug("%s: B%d star %02x\n", card->name,
693				wch->bch.nr, star);
694		}
695		if (star & W_B_STAR_XDOW) {
696			pr_debug("%s: B%d XDOW proto=%x\n", card->name,
697				wch->bch.nr, wch->bch.state);
698#ifdef ERROR_STATISTIC
699			wch->bch.err_xdu++;
700#endif
701			WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
702				W_B_CMDR_RACT);
703			/* resend */
704			if (wch->bch.tx_skb) {
705				if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
706					wch->bch.tx_idx = 0;
707			}
708		}
709		send_next(wch);
710		if (stat & W_B_EXI_XDUN)
711			return; /* handle XDOW only once */
712	}
713	if (stat & W_B_EXI_XDUN) {
714		pr_debug("%s: B%d XDUN proto=%x\n", card->name,
715			wch->bch.nr, wch->bch.state);
716#ifdef ERROR_STATISTIC
717		wch->bch.err_xdu++;
718#endif
719		WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
720		/* resend */
721		if (wch->bch.tx_skb) {
722			if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
723				wch->bch.tx_idx = 0;
724		}
725		send_next(wch);
726	}
727}
728
729static irqreturn_t
730w6692_irq(int intno, void *dev_id)
731{
732	struct w6692_hw	*card = dev_id;
733	u8		ista;
734
735	spin_lock(&card->lock);
736	ista = ReadW6692(card, W_ISTA);
737	if ((ista | card->imask) == card->imask) {
738		/* possible a shared  IRQ reqest */
739		spin_unlock(&card->lock);
740		return IRQ_NONE;
741	}
742	card->irqcnt++;
743	pr_debug("%s: ista %02x\n", card->name, ista);
744	ista &= ~card->imask;
745	if (ista & W_INT_B1_EXI)
746		W6692B_interrupt(card, 0);
747	if (ista & W_INT_B2_EXI)
748		W6692B_interrupt(card, 1);
749	if (ista & W_INT_D_RME)
750		handle_rxD(card);
751	if (ista & W_INT_D_RMR)
752		W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
753	if (ista & W_INT_D_XFR)
754		handle_txD(card);
755	if (ista & W_INT_D_EXI)
756		handle_statusD(card);
757	if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
758		pr_debug("%s: W6692 spurious XINT!\n", card->name);
759/* End IRQ Handler */
760	spin_unlock(&card->lock);
761	return IRQ_HANDLED;
762}
763
764static void
765dbusy_timer_handler(struct dchannel *dch)
766{
767	struct w6692_hw	*card = dch->hw;
768	int		rbch, star;
769	u_long		flags;
770
771	if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
772		spin_lock_irqsave(&card->lock, flags);
773		rbch = ReadW6692(card, W_D_RBCH);
774		star = ReadW6692(card, W_D_STAR);
775		pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
776			card->name, rbch, star);
777		if (star & W_D_STAR_XBZ)	/* D-Channel Busy */
778			test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
779		else {
780			/* discard frame; reset transceiver */
781			test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
782			if (dch->tx_idx)
783				dch->tx_idx = 0;
784			else
785				pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
786					card->name);
787			/* Transmitter reset */
788			WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
789		}
790		spin_unlock_irqrestore(&card->lock, flags);
791	}
792}
793
794void initW6692(struct w6692_hw *card)
795{
796	u8	val;
797
798	card->dch.timer.function = (void *)dbusy_timer_handler;
799	card->dch.timer.data = (u_long)&card->dch;
800	init_timer(&card->dch.timer);
801	w6692_mode(&card->bc[0], ISDN_P_NONE);
802	w6692_mode(&card->bc[1], ISDN_P_NONE);
803	WriteW6692(card, W_D_CTL, 0x00);
804	disable_hwirq(card);
805	WriteW6692(card, W_D_SAM, 0xff);
806	WriteW6692(card, W_D_TAM, 0xff);
807	WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
808	card->state = W_L1CMD_RST;
809	ph_command(card, W_L1CMD_RST);
810	ph_command(card, W_L1CMD_ECK);
811	/* enable all IRQ but extern */
812	card->imask = 0x18;
813	WriteW6692(card, W_D_EXIM, 0x00);
814	WriteW6692B(&card->bc[0], W_B_EXIM, 0);
815	WriteW6692B(&card->bc[1], W_B_EXIM, 0);
816	/* Reset D-chan receiver and transmitter */
817	WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
818	/* Reset B-chan receiver and transmitter */
819	WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
820	WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
821	/* enable peripheral */
822	if (card->subtype == W6692_USR) {
823		/* seems that USR implemented some power control features
824		 * Pin 79 is connected to the oscilator circuit so we
825		 * have to handle it here
826		 */
827		card->pctl = 0x80;
828		card->xdata = 0;
829		WriteW6692(card, W_PCTL, card->pctl);
830		WriteW6692(card, W_XDATA, card->xdata);
831	} else {
832		card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
833			W_PCTL_OE1 | W_PCTL_OE0;
834		card->xaddr = 0x00;/* all sw off */
835		if (card->fmask & pots)
836			card->xdata |= 0x06;	/*  POWER UP/ LED OFF / ALAW */
837		if (card->fmask & led)
838			card->xdata |= 0x04;	/* LED OFF */
839		if ((card->fmask & pots) || (card->fmask & led)) {
840			WriteW6692(card, W_PCTL, card->pctl);
841			WriteW6692(card, W_XADDR, card->xaddr);
842			WriteW6692(card, W_XDATA, card->xdata);
843			val = ReadW6692(card, W_XADDR);
844			if (debug & DEBUG_HW)
845				pr_notice("%s: W_XADDR=%02x\n",
846					card->name, val);
847		}
848	}
849}
850
851static void
852reset_w6692(struct w6692_hw *card)
853{
854	WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
855	mdelay(10);
856	WriteW6692(card, W_D_CTL, 0);
857}
858
859static int
860init_card(struct w6692_hw *card)
861{
862	int	cnt = 3;
863	u_long	flags;
864
865	spin_lock_irqsave(&card->lock, flags);
866	disable_hwirq(card);
867	spin_unlock_irqrestore(&card->lock, flags);
868	if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
869		pr_info("%s: couldn't get interrupt %d\n", card->name,
870			card->irq);
871		return -EIO;
872	}
873	while (cnt--) {
874		spin_lock_irqsave(&card->lock, flags);
875		initW6692(card);
876		enable_hwirq(card);
877		spin_unlock_irqrestore(&card->lock, flags);
878		/* Timeout 10ms */
879		msleep_interruptible(10);
880		if (debug & DEBUG_HW)
881			pr_notice("%s: IRQ %d count %d\n", card->name,
882				card->irq, card->irqcnt);
883		if (!card->irqcnt) {
884			pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
885				card->name, card->irq, 3 - cnt);
886			reset_w6692(card);
887		} else
888			return 0;
889	}
890	free_irq(card->irq, card);
891	return -EIO;
892}
893
894static int
895w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
896{
897	struct bchannel *bch = container_of(ch, struct bchannel, ch);
898	struct w6692_ch	*bc = container_of(bch, struct w6692_ch, bch);
899	struct w6692_hw *card = bch->hw;
900	int ret = -EINVAL;
901	struct mISDNhead *hh = mISDN_HEAD_P(skb);
902	u32 id;
903	u_long flags;
904
905	switch (hh->prim) {
906	case PH_DATA_REQ:
907		spin_lock_irqsave(&card->lock, flags);
908		ret = bchannel_senddata(bch, skb);
909		if (ret > 0) { /* direct TX */
910			id = hh->id; /* skb can be freed */
911			ret = 0;
912			W6692_fill_Bfifo(bc);
913			spin_unlock_irqrestore(&card->lock, flags);
914			if (!test_bit(FLG_TRANSPARENT, &bch->Flags))
915				queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
916		} else
917			spin_unlock_irqrestore(&card->lock, flags);
918		return ret;
919	case PH_ACTIVATE_REQ:
920		spin_lock_irqsave(&card->lock, flags);
921		if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
922			ret = w6692_mode(bc, ch->protocol);
923		else
924			ret = 0;
925		spin_unlock_irqrestore(&card->lock, flags);
926		if (!ret)
927			_queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
928				NULL, GFP_KERNEL);
929		break;
930	case PH_DEACTIVATE_REQ:
931		spin_lock_irqsave(&card->lock, flags);
932		mISDN_clear_bchannel(bch);
933		w6692_mode(bc, ISDN_P_NONE);
934		spin_unlock_irqrestore(&card->lock, flags);
935		_queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
936			NULL, GFP_KERNEL);
937		ret = 0;
938		break;
939	default:
940		pr_info("%s: %s unknown prim(%x,%x)\n",
941			card->name, __func__, hh->prim, hh->id);
942		ret = -EINVAL;
943	}
944	if (!ret)
945		dev_kfree_skb(skb);
946	return ret;
947}
948
949static int
950channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
951{
952	int	ret = 0;
953
954	switch (cq->op) {
955	case MISDN_CTRL_GETOP:
956		cq->op = 0;
957		break;
958	/* Nothing implemented yet */
959	case MISDN_CTRL_FILL_EMPTY:
960	default:
961		pr_info("%s: unknown Op %x\n", __func__, cq->op);
962		ret = -EINVAL;
963		break;
964	}
965	return ret;
966}
967
968static int
969open_bchannel(struct w6692_hw *card, struct channel_req *rq)
970{
971	struct bchannel *bch;
972
973	if (rq->adr.channel > 2)
974		return -EINVAL;
975	if (rq->protocol == ISDN_P_NONE)
976		return -EINVAL;
977	bch = &card->bc[rq->adr.channel - 1].bch;
978	if (test_and_set_bit(FLG_OPEN, &bch->Flags))
979		return -EBUSY; /* b-channel can be only open once */
980	test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
981	bch->ch.protocol = rq->protocol;
982	rq->ch = &bch->ch;
983	return 0;
984}
985
986static int
987channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
988{
989	int	ret = 0;
990
991	switch (cq->op) {
992	case MISDN_CTRL_GETOP:
993		cq->op = 0;
994		break;
995	default:
996		pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
997		ret = -EINVAL;
998		break;
999	}
1000	return ret;
1001}
1002
1003static int
1004w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1005{
1006	struct bchannel *bch = container_of(ch, struct bchannel, ch);
1007	struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
1008	struct w6692_hw *card = bch->hw;
1009	int ret = -EINVAL;
1010	u_long flags;
1011
1012	pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
1013	switch (cmd) {
1014	case CLOSE_CHANNEL:
1015		test_and_clear_bit(FLG_OPEN, &bch->Flags);
1016		if (test_bit(FLG_ACTIVE, &bch->Flags)) {
1017			spin_lock_irqsave(&card->lock, flags);
1018			mISDN_freebchannel(bch);
1019			w6692_mode(bc, ISDN_P_NONE);
1020			spin_unlock_irqrestore(&card->lock, flags);
1021		} else {
1022			skb_queue_purge(&bch->rqueue);
1023			bch->rcount = 0;
1024		}
1025		ch->protocol = ISDN_P_NONE;
1026		ch->peer = NULL;
1027		module_put(THIS_MODULE);
1028		ret = 0;
1029		break;
1030	case CONTROL_CHANNEL:
1031		ret = channel_bctrl(bch, arg);
1032		break;
1033	default:
1034		pr_info("%s: %s unknown prim(%x)\n",
1035			card->name, __func__, cmd);
1036	}
1037	return ret;
1038}
1039
1040static int
1041w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
1042{
1043	struct mISDNdevice	*dev = container_of(ch, struct mISDNdevice, D);
1044	struct dchannel		*dch = container_of(dev, struct dchannel, dev);
1045	struct w6692_hw		*card = container_of(dch, struct w6692_hw, dch);
1046	int			ret = -EINVAL;
1047	struct mISDNhead	*hh = mISDN_HEAD_P(skb);
1048	u32			id;
1049	u_long			flags;
1050
1051	switch (hh->prim) {
1052	case PH_DATA_REQ:
1053		spin_lock_irqsave(&card->lock, flags);
1054		ret = dchannel_senddata(dch, skb);
1055		if (ret > 0) { /* direct TX */
1056			id = hh->id; /* skb can be freed */
1057			W6692_fill_Dfifo(card);
1058			ret = 0;
1059			spin_unlock_irqrestore(&card->lock, flags);
1060			queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
1061		} else
1062			spin_unlock_irqrestore(&card->lock, flags);
1063		return ret;
1064	case PH_ACTIVATE_REQ:
1065		ret = l1_event(dch->l1, hh->prim);
1066		break;
1067	case PH_DEACTIVATE_REQ:
1068		test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
1069		ret = l1_event(dch->l1, hh->prim);
1070		break;
1071	}
1072
1073	if (!ret)
1074		dev_kfree_skb(skb);
1075	return ret;
1076}
1077
1078static int
1079w6692_l1callback(struct dchannel *dch, u32 cmd)
1080{
1081	struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1082	u_long flags;
1083
1084	pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
1085	switch (cmd) {
1086	case INFO3_P8:
1087		spin_lock_irqsave(&card->lock, flags);
1088		ph_command(card, W_L1CMD_AR8);
1089		spin_unlock_irqrestore(&card->lock, flags);
1090		break;
1091	case INFO3_P10:
1092		spin_lock_irqsave(&card->lock, flags);
1093		ph_command(card, W_L1CMD_AR10);
1094		spin_unlock_irqrestore(&card->lock, flags);
1095		break;
1096	case HW_RESET_REQ:
1097		spin_lock_irqsave(&card->lock, flags);
1098		if (card->state != W_L1IND_DRD)
1099			ph_command(card, W_L1CMD_RST);
1100		ph_command(card, W_L1CMD_ECK);
1101		spin_unlock_irqrestore(&card->lock, flags);
1102		break;
1103	case HW_DEACT_REQ:
1104		skb_queue_purge(&dch->squeue);
1105		if (dch->tx_skb) {
1106			dev_kfree_skb(dch->tx_skb);
1107			dch->tx_skb = NULL;
1108		}
1109		dch->tx_idx = 0;
1110		if (dch->rx_skb) {
1111			dev_kfree_skb(dch->rx_skb);
1112			dch->rx_skb = NULL;
1113		}
1114		test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
1115		if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
1116			del_timer(&dch->timer);
1117		break;
1118	case HW_POWERUP_REQ:
1119		spin_lock_irqsave(&card->lock, flags);
1120		ph_command(card, W_L1CMD_ECK);
1121		spin_unlock_irqrestore(&card->lock, flags);
1122		break;
1123	case PH_ACTIVATE_IND:
1124		test_and_set_bit(FLG_ACTIVE, &dch->Flags);
1125		_queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
1126			GFP_ATOMIC);
1127		break;
1128	case PH_DEACTIVATE_IND:
1129		test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
1130		_queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
1131			GFP_ATOMIC);
1132		break;
1133	default:
1134		pr_debug("%s: %s unknown command %x\n", card->name,
1135			__func__, cmd);
1136		return -1;
1137	}
1138	return 0;
1139}
1140
1141static int
1142open_dchannel(struct w6692_hw *card, struct channel_req *rq)
1143{
1144	pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
1145		card->dch.dev.id, __builtin_return_address(1));
1146	if (rq->protocol != ISDN_P_TE_S0)
1147		return -EINVAL;
1148	if (rq->adr.channel == 1)
1149		/* E-Channel not supported */
1150		return -EINVAL;
1151	rq->ch = &card->dch.dev.D;
1152	rq->ch->protocol = rq->protocol;
1153	if (card->dch.state == 7)
1154		_queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
1155		    0, NULL, GFP_KERNEL);
1156	return 0;
1157}
1158
1159static int
1160w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
1161{
1162	struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
1163	struct dchannel *dch = container_of(dev, struct dchannel, dev);
1164	struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
1165	struct channel_req *rq;
1166	int err = 0;
1167
1168	pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
1169	switch (cmd) {
1170	case OPEN_CHANNEL:
1171		rq = arg;
1172		if (rq->protocol == ISDN_P_TE_S0)
1173			err = open_dchannel(card, rq);
1174		else
1175			err = open_bchannel(card, rq);
1176		if (err)
1177			break;
1178		if (!try_module_get(THIS_MODULE))
1179			pr_info("%s: cannot get module\n", card->name);
1180		break;
1181	case CLOSE_CHANNEL:
1182		pr_debug("%s: dev(%d) close from %p\n", card->name,
1183			dch->dev.id, __builtin_return_address(0));
1184		module_put(THIS_MODULE);
1185		break;
1186	case CONTROL_CHANNEL:
1187		err = channel_ctrl(card, arg);
1188		break;
1189	default:
1190		pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
1191		return -EINVAL;
1192	}
1193	return err;
1194}
1195
1196static int
1197setup_w6692(struct w6692_hw *card)
1198{
1199	u32	val;
1200
1201	if (!request_region(card->addr, 256, card->name)) {
1202		pr_info("%s: config port %x-%x already in use\n", card->name,
1203		       card->addr, card->addr + 255);
1204		return -EIO;
1205	}
1206	W6692Version(card);
1207	card->bc[0].addr = card->addr;
1208	card->bc[1].addr = card->addr + 0x40;
1209	val = ReadW6692(card, W_ISTA);
1210	if (debug & DEBUG_HW)
1211		pr_notice("%s ISTA=%02x\n", card->name, val);
1212	val = ReadW6692(card, W_IMASK);
1213	if (debug & DEBUG_HW)
1214		pr_notice("%s IMASK=%02x\n", card->name, val);
1215	val = ReadW6692(card, W_D_EXIR);
1216	if (debug & DEBUG_HW)
1217		pr_notice("%s D_EXIR=%02x\n", card->name, val);
1218	val = ReadW6692(card, W_D_EXIM);
1219	if (debug & DEBUG_HW)
1220		pr_notice("%s D_EXIM=%02x\n", card->name, val);
1221	val = ReadW6692(card, W_D_RSTA);
1222	if (debug & DEBUG_HW)
1223		pr_notice("%s D_RSTA=%02x\n", card->name, val);
1224	return 0;
1225}
1226
1227static void
1228release_card(struct w6692_hw *card)
1229{
1230	u_long	flags;
1231
1232	spin_lock_irqsave(&card->lock, flags);
1233	disable_hwirq(card);
1234	w6692_mode(&card->bc[0], ISDN_P_NONE);
1235	w6692_mode(&card->bc[1], ISDN_P_NONE);
1236	if ((card->fmask & led) || card->subtype == W6692_USR) {
1237		card->xdata |= 0x04;	/*  LED OFF */
1238		WriteW6692(card, W_XDATA, card->xdata);
1239	}
1240	spin_unlock_irqrestore(&card->lock, flags);
1241	free_irq(card->irq, card);
1242	l1_event(card->dch.l1, CLOSE_CHANNEL);
1243	mISDN_unregister_device(&card->dch.dev);
1244	release_region(card->addr, 256);
1245	mISDN_freebchannel(&card->bc[1].bch);
1246	mISDN_freebchannel(&card->bc[0].bch);
1247	mISDN_freedchannel(&card->dch);
1248	write_lock_irqsave(&card_lock, flags);
1249	list_del(&card->list);
1250	write_unlock_irqrestore(&card_lock, flags);
1251	pci_disable_device(card->pdev);
1252	pci_set_drvdata(card->pdev, NULL);
1253	kfree(card);
1254}
1255
1256static int
1257setup_instance(struct w6692_hw *card)
1258{
1259	int		i, err;
1260	u_long		flags;
1261
1262	snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
1263	write_lock_irqsave(&card_lock, flags);
1264	list_add_tail(&card->list, &Cards);
1265	write_unlock_irqrestore(&card_lock, flags);
1266	card->fmask = (1 << w6692_cnt);
1267	_set_debug(card);
1268	spin_lock_init(&card->lock);
1269	mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
1270	card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
1271	card->dch.dev.D.send = w6692_l2l1D;
1272	card->dch.dev.D.ctrl = w6692_dctrl;
1273	card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
1274		(1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
1275	card->dch.hw = card;
1276	card->dch.dev.nrbchan = 2;
1277	for (i = 0; i < 2; i++) {
1278		mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM);
1279		card->bc[i].bch.hw = card;
1280		card->bc[i].bch.nr = i + 1;
1281		card->bc[i].bch.ch.nr = i + 1;
1282		card->bc[i].bch.ch.send = w6692_l2l1B;
1283		card->bc[i].bch.ch.ctrl = w6692_bctrl;
1284		set_channelmap(i + 1, card->dch.dev.channelmap);
1285		list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
1286	}
1287	err = setup_w6692(card);
1288	if (err)
1289		goto error_setup;
1290	err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
1291		card->name);
1292	if (err)
1293		goto error_reg;
1294	err = init_card(card);
1295	if (err)
1296		goto error_init;
1297	err = create_l1(&card->dch, w6692_l1callback);
1298	if (!err) {
1299		w6692_cnt++;
1300		pr_notice("W6692 %d cards installed\n", w6692_cnt);
1301		return 0;
1302	}
1303
1304	free_irq(card->irq, card);
1305error_init:
1306	mISDN_unregister_device(&card->dch.dev);
1307error_reg:
1308	release_region(card->addr, 256);
1309error_setup:
1310	mISDN_freebchannel(&card->bc[1].bch);
1311	mISDN_freebchannel(&card->bc[0].bch);
1312	mISDN_freedchannel(&card->dch);
1313	write_lock_irqsave(&card_lock, flags);
1314	list_del(&card->list);
1315	write_unlock_irqrestore(&card_lock, flags);
1316	kfree(card);
1317	return err;
1318}
1319
1320static int __devinit
1321w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1322{
1323	int		err = -ENOMEM;
1324	struct w6692_hw	*card;
1325	struct w6692map	*m = (struct w6692map *)ent->driver_data;
1326
1327	card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
1328	if (!card) {
1329		pr_info("No kmem for w6692 card\n");
1330		return err;
1331	}
1332	card->pdev = pdev;
1333	card->subtype = m->subtype;
1334	err = pci_enable_device(pdev);
1335	if (err) {
1336		kfree(card);
1337		return err;
1338	}
1339
1340	printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
1341	       m->name, pci_name(pdev));
1342
1343	card->addr = pci_resource_start(pdev, 1);
1344	card->irq = pdev->irq;
1345	pci_set_drvdata(pdev, card);
1346	err = setup_instance(card);
1347	if (err)
1348		pci_set_drvdata(pdev, NULL);
1349	return err;
1350}
1351
1352static void __devexit
1353w6692_remove_pci(struct pci_dev *pdev)
1354{
1355	struct w6692_hw	*card = pci_get_drvdata(pdev);
1356
1357	if (card)
1358		release_card(card);
1359	else
1360		if (debug)
1361			pr_notice("%s: drvdata already removed\n", __func__);
1362}
1363
1364static struct pci_device_id w6692_ids[] = {
1365	{ PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
1366	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
1367	{ PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
1368	  PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
1369	  (ulong)&w6692_map[2]},
1370	{ PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
1371	  PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
1372	{ }
1373};
1374MODULE_DEVICE_TABLE(pci, w6692_ids);
1375
1376static struct pci_driver w6692_driver = {
1377	.name =  "w6692",
1378	.probe = w6692_probe,
1379	.remove = __devexit_p(w6692_remove_pci),
1380	.id_table = w6692_ids,
1381};
1382
1383static int __init w6692_init(void)
1384{
1385	int err;
1386
1387	pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
1388
1389	err = pci_register_driver(&w6692_driver);
1390	return err;
1391}
1392
1393static void __exit w6692_cleanup(void)
1394{
1395	pci_unregister_driver(&w6692_driver);
1396}
1397
1398module_init(w6692_init);
1399module_exit(w6692_cleanup);
1400