1/* 2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver. 3 * 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com). 5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com> 6 * 7 * This code is loosely based on the 1.8 moxa driver which is based on 8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and 9 * others. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox 17 * <alan@lxorguk.ukuu.org.uk>. The original 1.8 code is available on 18 * www.moxa.com. 19 * - Fixed x86_64 cleanness 20 */ 21 22#include <linux/module.h> 23#include <linux/errno.h> 24#include <linux/signal.h> 25#include <linux/sched.h> 26#include <linux/timer.h> 27#include <linux/interrupt.h> 28#include <linux/tty.h> 29#include <linux/tty_flip.h> 30#include <linux/serial.h> 31#include <linux/serial_reg.h> 32#include <linux/major.h> 33#include <linux/string.h> 34#include <linux/fcntl.h> 35#include <linux/ptrace.h> 36#include <linux/ioport.h> 37#include <linux/mm.h> 38#include <linux/delay.h> 39#include <linux/pci.h> 40#include <linux/bitops.h> 41#include <linux/slab.h> 42 43#include <asm/system.h> 44#include <asm/io.h> 45#include <asm/irq.h> 46#include <asm/uaccess.h> 47 48#include "mxser.h" 49 50#define MXSER_VERSION "2.0.5" /* 1.14 */ 51#define MXSERMAJOR 174 52 53#define MXSER_BOARDS 4 /* Max. boards */ 54#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ 55#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) 56#define MXSER_ISR_PASS_LIMIT 100 57 58/*CheckIsMoxaMust return value*/ 59#define MOXA_OTHER_UART 0x00 60#define MOXA_MUST_MU150_HWID 0x01 61#define MOXA_MUST_MU860_HWID 0x02 62 63#define WAKEUP_CHARS 256 64 65#define UART_MCR_AFE 0x20 66#define UART_LSR_SPECIAL 0x1E 67 68#define PCI_DEVICE_ID_POS104UL 0x1044 69#define PCI_DEVICE_ID_CB108 0x1080 70#define PCI_DEVICE_ID_CP102UF 0x1023 71#define PCI_DEVICE_ID_CP112UL 0x1120 72#define PCI_DEVICE_ID_CB114 0x1142 73#define PCI_DEVICE_ID_CP114UL 0x1143 74#define PCI_DEVICE_ID_CB134I 0x1341 75#define PCI_DEVICE_ID_CP138U 0x1380 76 77 78#define C168_ASIC_ID 1 79#define C104_ASIC_ID 2 80#define C102_ASIC_ID 0xB 81#define CI132_ASIC_ID 4 82#define CI134_ASIC_ID 3 83#define CI104J_ASIC_ID 5 84 85#define MXSER_HIGHBAUD 1 86#define MXSER_HAS2 2 87 88/* This is only for PCI */ 89static const struct { 90 int type; 91 int tx_fifo; 92 int rx_fifo; 93 int xmit_fifo_size; 94 int rx_high_water; 95 int rx_trigger; 96 int rx_low_water; 97 long max_baud; 98} Gpci_uart_info[] = { 99 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, 100 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, 101 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} 102}; 103#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) 104 105struct mxser_cardinfo { 106 char *name; 107 unsigned int nports; 108 unsigned int flags; 109}; 110 111static const struct mxser_cardinfo mxser_cards[] = { 112/* 0*/ { "C168 series", 8, }, 113 { "C104 series", 4, }, 114 { "CI-104J series", 4, }, 115 { "C168H/PCI series", 8, }, 116 { "C104H/PCI series", 4, }, 117/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */ 118 { "CI-132 series", 4, MXSER_HAS2 }, 119 { "CI-134 series", 4, }, 120 { "CP-132 series", 2, }, 121 { "CP-114 series", 4, }, 122/*10*/ { "CT-114 series", 4, }, 123 { "CP-102 series", 2, MXSER_HIGHBAUD }, 124 { "CP-104U series", 4, }, 125 { "CP-168U series", 8, }, 126 { "CP-132U series", 2, }, 127/*15*/ { "CP-134U series", 4, }, 128 { "CP-104JU series", 4, }, 129 { "Moxa UC7000 Serial", 8, }, /* RC7000 */ 130 { "CP-118U series", 8, }, 131 { "CP-102UL series", 2, }, 132/*20*/ { "CP-102U series", 2, }, 133 { "CP-118EL series", 8, }, 134 { "CP-168EL series", 8, }, 135 { "CP-104EL series", 4, }, 136 { "CB-108 series", 8, }, 137/*25*/ { "CB-114 series", 4, }, 138 { "CB-134I series", 4, }, 139 { "CP-138U series", 8, }, 140 { "POS-104UL series", 4, }, 141 { "CP-114UL series", 4, }, 142/*30*/ { "CP-102UF series", 2, }, 143 { "CP-112UL series", 2, }, 144}; 145 146/* driver_data correspond to the lines in the structure above 147 see also ISA probe function before you change something */ 148static struct pci_device_id mxser_pcibrds[] = { 149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, 150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, 151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, 152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, 153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, 154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, 155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, 156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, 157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, 158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, 159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, 160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, 161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, 162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, 163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, 164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, 165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, 166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, 167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, 168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, 171 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, 172 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 }, 173 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 }, 174 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP112UL), .driver_data = 31 }, 175 { } 176}; 177MODULE_DEVICE_TABLE(pci, mxser_pcibrds); 178 179static unsigned long ioaddr[MXSER_BOARDS]; 180static int ttymajor = MXSERMAJOR; 181 182/* Variables for insmod */ 183 184MODULE_AUTHOR("Casper Yang"); 185MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); 186module_param_array(ioaddr, ulong, NULL, 0); 187MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board"); 188module_param(ttymajor, int, 0); 189MODULE_LICENSE("GPL"); 190 191struct mxser_log { 192 int tick; 193 unsigned long rxcnt[MXSER_PORTS]; 194 unsigned long txcnt[MXSER_PORTS]; 195}; 196 197struct mxser_mon { 198 unsigned long rxcnt; 199 unsigned long txcnt; 200 unsigned long up_rxcnt; 201 unsigned long up_txcnt; 202 int modem_status; 203 unsigned char hold_reason; 204}; 205 206struct mxser_mon_ext { 207 unsigned long rx_cnt[32]; 208 unsigned long tx_cnt[32]; 209 unsigned long up_rxcnt[32]; 210 unsigned long up_txcnt[32]; 211 int modem_status[32]; 212 213 long baudrate[32]; 214 int databits[32]; 215 int stopbits[32]; 216 int parity[32]; 217 int flowctrl[32]; 218 int fifo[32]; 219 int iftype[32]; 220}; 221 222struct mxser_board; 223 224struct mxser_port { 225 struct tty_port port; 226 struct mxser_board *board; 227 228 unsigned long ioaddr; 229 unsigned long opmode_ioaddr; 230 int max_baud; 231 232 int rx_high_water; 233 int rx_trigger; /* Rx fifo trigger level */ 234 int rx_low_water; 235 int baud_base; /* max. speed */ 236 int type; /* UART type */ 237 238 int x_char; /* xon/xoff character */ 239 int IER; /* Interrupt Enable Register */ 240 int MCR; /* Modem control register */ 241 242 unsigned char stop_rx; 243 unsigned char ldisc_stop_rx; 244 245 int custom_divisor; 246 unsigned char err_shadow; 247 248 struct async_icount icount; /* kernel counters for 4 input interrupts */ 249 int timeout; 250 251 int read_status_mask; 252 int ignore_status_mask; 253 int xmit_fifo_size; 254 int xmit_head; 255 int xmit_tail; 256 int xmit_cnt; 257 258 struct ktermios normal_termios; 259 260 struct mxser_mon mon_data; 261 262 spinlock_t slock; 263}; 264 265struct mxser_board { 266 unsigned int idx; 267 int irq; 268 const struct mxser_cardinfo *info; 269 unsigned long vector; 270 unsigned long vector_mask; 271 272 int chip_flag; 273 int uart_type; 274 275 struct mxser_port ports[MXSER_PORTS_PER_BOARD]; 276}; 277 278struct mxser_mstatus { 279 tcflag_t cflag; 280 int cts; 281 int dsr; 282 int ri; 283 int dcd; 284}; 285 286static struct mxser_board mxser_boards[MXSER_BOARDS]; 287static struct tty_driver *mxvar_sdriver; 288static struct mxser_log mxvar_log; 289static int mxser_set_baud_method[MXSER_PORTS + 1]; 290 291static void mxser_enable_must_enchance_mode(unsigned long baseio) 292{ 293 u8 oldlcr; 294 u8 efr; 295 296 oldlcr = inb(baseio + UART_LCR); 297 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 298 299 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 300 efr |= MOXA_MUST_EFR_EFRB_ENABLE; 301 302 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 303 outb(oldlcr, baseio + UART_LCR); 304} 305 306static void mxser_disable_must_enchance_mode(unsigned long baseio) 307{ 308 u8 oldlcr; 309 u8 efr; 310 311 oldlcr = inb(baseio + UART_LCR); 312 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 313 314 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 315 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE; 316 317 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 318 outb(oldlcr, baseio + UART_LCR); 319} 320 321static void mxser_set_must_xon1_value(unsigned long baseio, u8 value) 322{ 323 u8 oldlcr; 324 u8 efr; 325 326 oldlcr = inb(baseio + UART_LCR); 327 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 328 329 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 330 efr &= ~MOXA_MUST_EFR_BANK_MASK; 331 efr |= MOXA_MUST_EFR_BANK0; 332 333 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 334 outb(value, baseio + MOXA_MUST_XON1_REGISTER); 335 outb(oldlcr, baseio + UART_LCR); 336} 337 338static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value) 339{ 340 u8 oldlcr; 341 u8 efr; 342 343 oldlcr = inb(baseio + UART_LCR); 344 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 345 346 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 347 efr &= ~MOXA_MUST_EFR_BANK_MASK; 348 efr |= MOXA_MUST_EFR_BANK0; 349 350 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 351 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER); 352 outb(oldlcr, baseio + UART_LCR); 353} 354 355static void mxser_set_must_fifo_value(struct mxser_port *info) 356{ 357 u8 oldlcr; 358 u8 efr; 359 360 oldlcr = inb(info->ioaddr + UART_LCR); 361 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR); 362 363 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER); 364 efr &= ~MOXA_MUST_EFR_BANK_MASK; 365 efr |= MOXA_MUST_EFR_BANK1; 366 367 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER); 368 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER); 369 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER); 370 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER); 371 outb(oldlcr, info->ioaddr + UART_LCR); 372} 373 374static void mxser_set_must_enum_value(unsigned long baseio, u8 value) 375{ 376 u8 oldlcr; 377 u8 efr; 378 379 oldlcr = inb(baseio + UART_LCR); 380 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 381 382 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 383 efr &= ~MOXA_MUST_EFR_BANK_MASK; 384 efr |= MOXA_MUST_EFR_BANK2; 385 386 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 387 outb(value, baseio + MOXA_MUST_ENUM_REGISTER); 388 outb(oldlcr, baseio + UART_LCR); 389} 390 391static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId) 392{ 393 u8 oldlcr; 394 u8 efr; 395 396 oldlcr = inb(baseio + UART_LCR); 397 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 398 399 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 400 efr &= ~MOXA_MUST_EFR_BANK_MASK; 401 efr |= MOXA_MUST_EFR_BANK2; 402 403 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 404 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER); 405 outb(oldlcr, baseio + UART_LCR); 406} 407 408static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio) 409{ 410 u8 oldlcr; 411 u8 efr; 412 413 oldlcr = inb(baseio + UART_LCR); 414 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 415 416 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 417 efr &= ~MOXA_MUST_EFR_SF_MASK; 418 419 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 420 outb(oldlcr, baseio + UART_LCR); 421} 422 423static void mxser_enable_must_tx_software_flow_control(unsigned long baseio) 424{ 425 u8 oldlcr; 426 u8 efr; 427 428 oldlcr = inb(baseio + UART_LCR); 429 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 430 431 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 432 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 433 efr |= MOXA_MUST_EFR_SF_TX1; 434 435 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 436 outb(oldlcr, baseio + UART_LCR); 437} 438 439static void mxser_disable_must_tx_software_flow_control(unsigned long baseio) 440{ 441 u8 oldlcr; 442 u8 efr; 443 444 oldlcr = inb(baseio + UART_LCR); 445 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 446 447 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 448 efr &= ~MOXA_MUST_EFR_SF_TX_MASK; 449 450 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 451 outb(oldlcr, baseio + UART_LCR); 452} 453 454static void mxser_enable_must_rx_software_flow_control(unsigned long baseio) 455{ 456 u8 oldlcr; 457 u8 efr; 458 459 oldlcr = inb(baseio + UART_LCR); 460 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 461 462 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 463 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 464 efr |= MOXA_MUST_EFR_SF_RX1; 465 466 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 467 outb(oldlcr, baseio + UART_LCR); 468} 469 470static void mxser_disable_must_rx_software_flow_control(unsigned long baseio) 471{ 472 u8 oldlcr; 473 u8 efr; 474 475 oldlcr = inb(baseio + UART_LCR); 476 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR); 477 478 efr = inb(baseio + MOXA_MUST_EFR_REGISTER); 479 efr &= ~MOXA_MUST_EFR_SF_RX_MASK; 480 481 outb(efr, baseio + MOXA_MUST_EFR_REGISTER); 482 outb(oldlcr, baseio + UART_LCR); 483} 484 485#ifdef CONFIG_PCI 486static int __devinit CheckIsMoxaMust(unsigned long io) 487{ 488 u8 oldmcr, hwid; 489 int i; 490 491 outb(0, io + UART_LCR); 492 mxser_disable_must_enchance_mode(io); 493 oldmcr = inb(io + UART_MCR); 494 outb(0, io + UART_MCR); 495 mxser_set_must_xon1_value(io, 0x11); 496 if ((hwid = inb(io + UART_MCR)) != 0) { 497 outb(oldmcr, io + UART_MCR); 498 return MOXA_OTHER_UART; 499 } 500 501 mxser_get_must_hardware_id(io, &hwid); 502 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ 503 if (hwid == Gpci_uart_info[i].type) 504 return (int)hwid; 505 } 506 return MOXA_OTHER_UART; 507} 508#endif 509 510static void process_txrx_fifo(struct mxser_port *info) 511{ 512 int i; 513 514 if ((info->type == PORT_16450) || (info->type == PORT_8250)) { 515 info->rx_trigger = 1; 516 info->rx_high_water = 1; 517 info->rx_low_water = 1; 518 info->xmit_fifo_size = 1; 519 } else 520 for (i = 0; i < UART_INFO_NUM; i++) 521 if (info->board->chip_flag == Gpci_uart_info[i].type) { 522 info->rx_trigger = Gpci_uart_info[i].rx_trigger; 523 info->rx_low_water = Gpci_uart_info[i].rx_low_water; 524 info->rx_high_water = Gpci_uart_info[i].rx_high_water; 525 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; 526 break; 527 } 528} 529 530static unsigned char mxser_get_msr(int baseaddr, int mode, int port) 531{ 532 static unsigned char mxser_msr[MXSER_PORTS + 1]; 533 unsigned char status = 0; 534 535 status = inb(baseaddr + UART_MSR); 536 537 mxser_msr[port] &= 0x0F; 538 mxser_msr[port] |= status; 539 status = mxser_msr[port]; 540 if (mode) 541 mxser_msr[port] = 0; 542 543 return status; 544} 545 546static int mxser_carrier_raised(struct tty_port *port) 547{ 548 struct mxser_port *mp = container_of(port, struct mxser_port, port); 549 return (inb(mp->ioaddr + UART_MSR) & UART_MSR_DCD)?1:0; 550} 551 552static void mxser_dtr_rts(struct tty_port *port, int on) 553{ 554 struct mxser_port *mp = container_of(port, struct mxser_port, port); 555 unsigned long flags; 556 557 spin_lock_irqsave(&mp->slock, flags); 558 if (on) 559 outb(inb(mp->ioaddr + UART_MCR) | 560 UART_MCR_DTR | UART_MCR_RTS, mp->ioaddr + UART_MCR); 561 else 562 outb(inb(mp->ioaddr + UART_MCR)&~(UART_MCR_DTR | UART_MCR_RTS), 563 mp->ioaddr + UART_MCR); 564 spin_unlock_irqrestore(&mp->slock, flags); 565} 566 567static int mxser_set_baud(struct tty_struct *tty, long newspd) 568{ 569 struct mxser_port *info = tty->driver_data; 570 int quot = 0, baud; 571 unsigned char cval; 572 573 if (!info->ioaddr) 574 return -1; 575 576 if (newspd > info->max_baud) 577 return -1; 578 579 if (newspd == 134) { 580 quot = 2 * info->baud_base / 269; 581 tty_encode_baud_rate(tty, 134, 134); 582 } else if (newspd) { 583 quot = info->baud_base / newspd; 584 if (quot == 0) 585 quot = 1; 586 baud = info->baud_base/quot; 587 tty_encode_baud_rate(tty, baud, baud); 588 } else { 589 quot = 0; 590 } 591 592 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); 593 info->timeout += HZ / 50; /* Add .02 seconds of slop */ 594 595 if (quot) { 596 info->MCR |= UART_MCR_DTR; 597 outb(info->MCR, info->ioaddr + UART_MCR); 598 } else { 599 info->MCR &= ~UART_MCR_DTR; 600 outb(info->MCR, info->ioaddr + UART_MCR); 601 return 0; 602 } 603 604 cval = inb(info->ioaddr + UART_LCR); 605 606 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ 607 608 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ 609 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ 610 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ 611 612#ifdef BOTHER 613 if (C_BAUD(tty) == BOTHER) { 614 quot = info->baud_base % newspd; 615 quot *= 8; 616 if (quot % newspd > newspd / 2) { 617 quot /= newspd; 618 quot++; 619 } else 620 quot /= newspd; 621 622 mxser_set_must_enum_value(info->ioaddr, quot); 623 } else 624#endif 625 mxser_set_must_enum_value(info->ioaddr, 0); 626 627 return 0; 628} 629 630/* 631 * This routine is called to set the UART divisor registers to match 632 * the specified baud rate for a serial port. 633 */ 634static int mxser_change_speed(struct tty_struct *tty, 635 struct ktermios *old_termios) 636{ 637 struct mxser_port *info = tty->driver_data; 638 unsigned cflag, cval, fcr; 639 int ret = 0; 640 unsigned char status; 641 642 cflag = tty->termios->c_cflag; 643 if (!info->ioaddr) 644 return ret; 645 646 if (mxser_set_baud_method[tty->index] == 0) 647 mxser_set_baud(tty, tty_get_baud_rate(tty)); 648 649 /* byte size and parity */ 650 switch (cflag & CSIZE) { 651 case CS5: 652 cval = 0x00; 653 break; 654 case CS6: 655 cval = 0x01; 656 break; 657 case CS7: 658 cval = 0x02; 659 break; 660 case CS8: 661 cval = 0x03; 662 break; 663 default: 664 cval = 0x00; 665 break; /* too keep GCC shut... */ 666 } 667 if (cflag & CSTOPB) 668 cval |= 0x04; 669 if (cflag & PARENB) 670 cval |= UART_LCR_PARITY; 671 if (!(cflag & PARODD)) 672 cval |= UART_LCR_EPAR; 673 if (cflag & CMSPAR) 674 cval |= UART_LCR_SPAR; 675 676 if ((info->type == PORT_8250) || (info->type == PORT_16450)) { 677 if (info->board->chip_flag) { 678 fcr = UART_FCR_ENABLE_FIFO; 679 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 680 mxser_set_must_fifo_value(info); 681 } else 682 fcr = 0; 683 } else { 684 fcr = UART_FCR_ENABLE_FIFO; 685 if (info->board->chip_flag) { 686 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; 687 mxser_set_must_fifo_value(info); 688 } else { 689 switch (info->rx_trigger) { 690 case 1: 691 fcr |= UART_FCR_TRIGGER_1; 692 break; 693 case 4: 694 fcr |= UART_FCR_TRIGGER_4; 695 break; 696 case 8: 697 fcr |= UART_FCR_TRIGGER_8; 698 break; 699 default: 700 fcr |= UART_FCR_TRIGGER_14; 701 break; 702 } 703 } 704 } 705 706 /* CTS flow control flag and modem status interrupts */ 707 info->IER &= ~UART_IER_MSI; 708 info->MCR &= ~UART_MCR_AFE; 709 if (cflag & CRTSCTS) { 710 info->port.flags |= ASYNC_CTS_FLOW; 711 info->IER |= UART_IER_MSI; 712 if ((info->type == PORT_16550A) || (info->board->chip_flag)) { 713 info->MCR |= UART_MCR_AFE; 714 } else { 715 status = inb(info->ioaddr + UART_MSR); 716 if (tty->hw_stopped) { 717 if (status & UART_MSR_CTS) { 718 tty->hw_stopped = 0; 719 if (info->type != PORT_16550A && 720 !info->board->chip_flag) { 721 outb(info->IER & ~UART_IER_THRI, 722 info->ioaddr + 723 UART_IER); 724 info->IER |= UART_IER_THRI; 725 outb(info->IER, info->ioaddr + 726 UART_IER); 727 } 728 tty_wakeup(tty); 729 } 730 } else { 731 if (!(status & UART_MSR_CTS)) { 732 tty->hw_stopped = 1; 733 if ((info->type != PORT_16550A) && 734 (!info->board->chip_flag)) { 735 info->IER &= ~UART_IER_THRI; 736 outb(info->IER, info->ioaddr + 737 UART_IER); 738 } 739 } 740 } 741 } 742 } else { 743 info->port.flags &= ~ASYNC_CTS_FLOW; 744 } 745 outb(info->MCR, info->ioaddr + UART_MCR); 746 if (cflag & CLOCAL) { 747 info->port.flags &= ~ASYNC_CHECK_CD; 748 } else { 749 info->port.flags |= ASYNC_CHECK_CD; 750 info->IER |= UART_IER_MSI; 751 } 752 outb(info->IER, info->ioaddr + UART_IER); 753 754 /* 755 * Set up parity check flag 756 */ 757 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; 758 if (I_INPCK(tty)) 759 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; 760 if (I_BRKINT(tty) || I_PARMRK(tty)) 761 info->read_status_mask |= UART_LSR_BI; 762 763 info->ignore_status_mask = 0; 764 765 if (I_IGNBRK(tty)) { 766 info->ignore_status_mask |= UART_LSR_BI; 767 info->read_status_mask |= UART_LSR_BI; 768 /* 769 * If we're ignore parity and break indicators, ignore 770 * overruns too. (For real raw support). 771 */ 772 if (I_IGNPAR(tty)) { 773 info->ignore_status_mask |= 774 UART_LSR_OE | 775 UART_LSR_PE | 776 UART_LSR_FE; 777 info->read_status_mask |= 778 UART_LSR_OE | 779 UART_LSR_PE | 780 UART_LSR_FE; 781 } 782 } 783 if (info->board->chip_flag) { 784 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty)); 785 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty)); 786 if (I_IXON(tty)) { 787 mxser_enable_must_rx_software_flow_control( 788 info->ioaddr); 789 } else { 790 mxser_disable_must_rx_software_flow_control( 791 info->ioaddr); 792 } 793 if (I_IXOFF(tty)) { 794 mxser_enable_must_tx_software_flow_control( 795 info->ioaddr); 796 } else { 797 mxser_disable_must_tx_software_flow_control( 798 info->ioaddr); 799 } 800 } 801 802 803 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ 804 outb(cval, info->ioaddr + UART_LCR); 805 806 return ret; 807} 808 809static void mxser_check_modem_status(struct tty_struct *tty, 810 struct mxser_port *port, int status) 811{ 812 /* update input line counters */ 813 if (status & UART_MSR_TERI) 814 port->icount.rng++; 815 if (status & UART_MSR_DDSR) 816 port->icount.dsr++; 817 if (status & UART_MSR_DDCD) 818 port->icount.dcd++; 819 if (status & UART_MSR_DCTS) 820 port->icount.cts++; 821 port->mon_data.modem_status = status; 822 wake_up_interruptible(&port->port.delta_msr_wait); 823 824 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { 825 if (status & UART_MSR_DCD) 826 wake_up_interruptible(&port->port.open_wait); 827 } 828 829 if (port->port.flags & ASYNC_CTS_FLOW) { 830 if (tty->hw_stopped) { 831 if (status & UART_MSR_CTS) { 832 tty->hw_stopped = 0; 833 834 if ((port->type != PORT_16550A) && 835 (!port->board->chip_flag)) { 836 outb(port->IER & ~UART_IER_THRI, 837 port->ioaddr + UART_IER); 838 port->IER |= UART_IER_THRI; 839 outb(port->IER, port->ioaddr + 840 UART_IER); 841 } 842 tty_wakeup(tty); 843 } 844 } else { 845 if (!(status & UART_MSR_CTS)) { 846 tty->hw_stopped = 1; 847 if (port->type != PORT_16550A && 848 !port->board->chip_flag) { 849 port->IER &= ~UART_IER_THRI; 850 outb(port->IER, port->ioaddr + 851 UART_IER); 852 } 853 } 854 } 855 } 856} 857 858static int mxser_activate(struct tty_port *port, struct tty_struct *tty) 859{ 860 struct mxser_port *info = container_of(port, struct mxser_port, port); 861 unsigned long page; 862 unsigned long flags; 863 864 page = __get_free_page(GFP_KERNEL); 865 if (!page) 866 return -ENOMEM; 867 868 spin_lock_irqsave(&info->slock, flags); 869 870 if (!info->ioaddr || !info->type) { 871 set_bit(TTY_IO_ERROR, &tty->flags); 872 free_page(page); 873 spin_unlock_irqrestore(&info->slock, flags); 874 return 0; 875 } 876 info->port.xmit_buf = (unsigned char *) page; 877 878 /* 879 * Clear the FIFO buffers and disable them 880 * (they will be reenabled in mxser_change_speed()) 881 */ 882 if (info->board->chip_flag) 883 outb((UART_FCR_CLEAR_RCVR | 884 UART_FCR_CLEAR_XMIT | 885 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); 886 else 887 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 888 info->ioaddr + UART_FCR); 889 890 /* 891 * At this point there's no way the LSR could still be 0xFF; 892 * if it is, then bail out, because there's likely no UART 893 * here. 894 */ 895 if (inb(info->ioaddr + UART_LSR) == 0xff) { 896 spin_unlock_irqrestore(&info->slock, flags); 897 if (capable(CAP_SYS_ADMIN)) { 898 set_bit(TTY_IO_ERROR, &tty->flags); 899 return 0; 900 } else 901 return -ENODEV; 902 } 903 904 /* 905 * Clear the interrupt registers. 906 */ 907 (void) inb(info->ioaddr + UART_LSR); 908 (void) inb(info->ioaddr + UART_RX); 909 (void) inb(info->ioaddr + UART_IIR); 910 (void) inb(info->ioaddr + UART_MSR); 911 912 /* 913 * Now, initialize the UART 914 */ 915 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ 916 info->MCR = UART_MCR_DTR | UART_MCR_RTS; 917 outb(info->MCR, info->ioaddr + UART_MCR); 918 919 /* 920 * Finally, enable interrupts 921 */ 922 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 923 924 if (info->board->chip_flag) 925 info->IER |= MOXA_MUST_IER_EGDAI; 926 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ 927 928 /* 929 * And clear the interrupt registers again for luck. 930 */ 931 (void) inb(info->ioaddr + UART_LSR); 932 (void) inb(info->ioaddr + UART_RX); 933 (void) inb(info->ioaddr + UART_IIR); 934 (void) inb(info->ioaddr + UART_MSR); 935 936 clear_bit(TTY_IO_ERROR, &tty->flags); 937 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 938 939 /* 940 * and set the speed of the serial port 941 */ 942 mxser_change_speed(tty, NULL); 943 spin_unlock_irqrestore(&info->slock, flags); 944 945 return 0; 946} 947 948/* 949 * This routine will shutdown a serial port 950 */ 951static void mxser_shutdown_port(struct tty_port *port) 952{ 953 struct mxser_port *info = container_of(port, struct mxser_port, port); 954 unsigned long flags; 955 956 spin_lock_irqsave(&info->slock, flags); 957 958 /* 959 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 960 * here so the queue might never be waken up 961 */ 962 wake_up_interruptible(&info->port.delta_msr_wait); 963 964 /* 965 * Free the xmit buffer, if necessary 966 */ 967 if (info->port.xmit_buf) { 968 free_page((unsigned long) info->port.xmit_buf); 969 info->port.xmit_buf = NULL; 970 } 971 972 info->IER = 0; 973 outb(0x00, info->ioaddr + UART_IER); 974 975 /* clear Rx/Tx FIFO's */ 976 if (info->board->chip_flag) 977 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | 978 MOXA_MUST_FCR_GDA_MODE_ENABLE, 979 info->ioaddr + UART_FCR); 980 else 981 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, 982 info->ioaddr + UART_FCR); 983 984 /* read data port to reset things */ 985 (void) inb(info->ioaddr + UART_RX); 986 987 988 if (info->board->chip_flag) 989 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); 990 991 spin_unlock_irqrestore(&info->slock, flags); 992} 993 994/* 995 * This routine is called whenever a serial port is opened. It 996 * enables interrupts for a serial port, linking in its async structure into 997 * the IRQ chain. It also performs the serial-specific 998 * initialization for the tty structure. 999 */ 1000static int mxser_open(struct tty_struct *tty, struct file *filp) 1001{ 1002 struct mxser_port *info; 1003 int line; 1004 1005 line = tty->index; 1006 if (line == MXSER_PORTS) 1007 return 0; 1008 if (line < 0 || line > MXSER_PORTS) 1009 return -ENODEV; 1010 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; 1011 if (!info->ioaddr) 1012 return -ENODEV; 1013 1014 tty->driver_data = info; 1015 return tty_port_open(&info->port, tty, filp); 1016} 1017 1018static void mxser_flush_buffer(struct tty_struct *tty) 1019{ 1020 struct mxser_port *info = tty->driver_data; 1021 char fcr; 1022 unsigned long flags; 1023 1024 1025 spin_lock_irqsave(&info->slock, flags); 1026 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; 1027 1028 fcr = inb(info->ioaddr + UART_FCR); 1029 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), 1030 info->ioaddr + UART_FCR); 1031 outb(fcr, info->ioaddr + UART_FCR); 1032 1033 spin_unlock_irqrestore(&info->slock, flags); 1034 1035 tty_wakeup(tty); 1036} 1037 1038 1039static void mxser_close_port(struct tty_port *port) 1040{ 1041 struct mxser_port *info = container_of(port, struct mxser_port, port); 1042 unsigned long timeout; 1043 /* 1044 * At this point we stop accepting input. To do this, we 1045 * disable the receive line status interrupts, and tell the 1046 * interrupt driver to stop checking the data ready bit in the 1047 * line status register. 1048 */ 1049 info->IER &= ~UART_IER_RLSI; 1050 if (info->board->chip_flag) 1051 info->IER &= ~MOXA_MUST_RECV_ISR; 1052 1053 outb(info->IER, info->ioaddr + UART_IER); 1054 /* 1055 * Before we drop DTR, make sure the UART transmitter 1056 * has completely drained; this is especially 1057 * important if there is a transmit FIFO! 1058 */ 1059 timeout = jiffies + HZ; 1060 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { 1061 schedule_timeout_interruptible(5); 1062 if (time_after(jiffies, timeout)) 1063 break; 1064 } 1065} 1066 1067/* 1068 * This routine is called when the serial port gets closed. First, we 1069 * wait for the last remaining data to be sent. Then, we unlink its 1070 * async structure from the interrupt chain if necessary, and we free 1071 * that IRQ if nothing is left in the chain. 1072 */ 1073static void mxser_close(struct tty_struct *tty, struct file *filp) 1074{ 1075 struct mxser_port *info = tty->driver_data; 1076 struct tty_port *port = &info->port; 1077 1078 if (tty->index == MXSER_PORTS || info == NULL) 1079 return; 1080 if (tty_port_close_start(port, tty, filp) == 0) 1081 return; 1082 mutex_lock(&port->mutex); 1083 mxser_close_port(port); 1084 mxser_flush_buffer(tty); 1085 mxser_shutdown_port(port); 1086 clear_bit(ASYNCB_INITIALIZED, &port->flags); 1087 mutex_unlock(&port->mutex); 1088 /* Right now the tty_port set is done outside of the close_end helper 1089 as we don't yet have everyone using refcounts */ 1090 tty_port_close_end(port, tty); 1091 tty_port_tty_set(port, NULL); 1092} 1093 1094static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) 1095{ 1096 int c, total = 0; 1097 struct mxser_port *info = tty->driver_data; 1098 unsigned long flags; 1099 1100 if (!info->port.xmit_buf) 1101 return 0; 1102 1103 while (1) { 1104 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, 1105 SERIAL_XMIT_SIZE - info->xmit_head)); 1106 if (c <= 0) 1107 break; 1108 1109 memcpy(info->port.xmit_buf + info->xmit_head, buf, c); 1110 spin_lock_irqsave(&info->slock, flags); 1111 info->xmit_head = (info->xmit_head + c) & 1112 (SERIAL_XMIT_SIZE - 1); 1113 info->xmit_cnt += c; 1114 spin_unlock_irqrestore(&info->slock, flags); 1115 1116 buf += c; 1117 count -= c; 1118 total += c; 1119 } 1120 1121 if (info->xmit_cnt && !tty->stopped) { 1122 if (!tty->hw_stopped || 1123 (info->type == PORT_16550A) || 1124 (info->board->chip_flag)) { 1125 spin_lock_irqsave(&info->slock, flags); 1126 outb(info->IER & ~UART_IER_THRI, info->ioaddr + 1127 UART_IER); 1128 info->IER |= UART_IER_THRI; 1129 outb(info->IER, info->ioaddr + UART_IER); 1130 spin_unlock_irqrestore(&info->slock, flags); 1131 } 1132 } 1133 return total; 1134} 1135 1136static int mxser_put_char(struct tty_struct *tty, unsigned char ch) 1137{ 1138 struct mxser_port *info = tty->driver_data; 1139 unsigned long flags; 1140 1141 if (!info->port.xmit_buf) 1142 return 0; 1143 1144 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) 1145 return 0; 1146 1147 spin_lock_irqsave(&info->slock, flags); 1148 info->port.xmit_buf[info->xmit_head++] = ch; 1149 info->xmit_head &= SERIAL_XMIT_SIZE - 1; 1150 info->xmit_cnt++; 1151 spin_unlock_irqrestore(&info->slock, flags); 1152 if (!tty->stopped) { 1153 if (!tty->hw_stopped || 1154 (info->type == PORT_16550A) || 1155 info->board->chip_flag) { 1156 spin_lock_irqsave(&info->slock, flags); 1157 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1158 info->IER |= UART_IER_THRI; 1159 outb(info->IER, info->ioaddr + UART_IER); 1160 spin_unlock_irqrestore(&info->slock, flags); 1161 } 1162 } 1163 return 1; 1164} 1165 1166 1167static void mxser_flush_chars(struct tty_struct *tty) 1168{ 1169 struct mxser_port *info = tty->driver_data; 1170 unsigned long flags; 1171 1172 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf || 1173 (tty->hw_stopped && info->type != PORT_16550A && 1174 !info->board->chip_flag)) 1175 return; 1176 1177 spin_lock_irqsave(&info->slock, flags); 1178 1179 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1180 info->IER |= UART_IER_THRI; 1181 outb(info->IER, info->ioaddr + UART_IER); 1182 1183 spin_unlock_irqrestore(&info->slock, flags); 1184} 1185 1186static int mxser_write_room(struct tty_struct *tty) 1187{ 1188 struct mxser_port *info = tty->driver_data; 1189 int ret; 1190 1191 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; 1192 return ret < 0 ? 0 : ret; 1193} 1194 1195static int mxser_chars_in_buffer(struct tty_struct *tty) 1196{ 1197 struct mxser_port *info = tty->driver_data; 1198 return info->xmit_cnt; 1199} 1200 1201/* 1202 * ------------------------------------------------------------ 1203 * friends of mxser_ioctl() 1204 * ------------------------------------------------------------ 1205 */ 1206static int mxser_get_serial_info(struct tty_struct *tty, 1207 struct serial_struct __user *retinfo) 1208{ 1209 struct mxser_port *info = tty->driver_data; 1210 struct serial_struct tmp = { 1211 .type = info->type, 1212 .line = tty->index, 1213 .port = info->ioaddr, 1214 .irq = info->board->irq, 1215 .flags = info->port.flags, 1216 .baud_base = info->baud_base, 1217 .close_delay = info->port.close_delay, 1218 .closing_wait = info->port.closing_wait, 1219 .custom_divisor = info->custom_divisor, 1220 .hub6 = 0 1221 }; 1222 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) 1223 return -EFAULT; 1224 return 0; 1225} 1226 1227static int mxser_set_serial_info(struct tty_struct *tty, 1228 struct serial_struct __user *new_info) 1229{ 1230 struct mxser_port *info = tty->driver_data; 1231 struct tty_port *port = &info->port; 1232 struct serial_struct new_serial; 1233 speed_t baud; 1234 unsigned long sl_flags; 1235 unsigned int flags; 1236 int retval = 0; 1237 1238 if (!new_info || !info->ioaddr) 1239 return -ENODEV; 1240 if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) 1241 return -EFAULT; 1242 1243 if (new_serial.irq != info->board->irq || 1244 new_serial.port != info->ioaddr) 1245 return -EINVAL; 1246 1247 flags = port->flags & ASYNC_SPD_MASK; 1248 1249 if (!capable(CAP_SYS_ADMIN)) { 1250 if ((new_serial.baud_base != info->baud_base) || 1251 (new_serial.close_delay != info->port.close_delay) || 1252 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK))) 1253 return -EPERM; 1254 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) | 1255 (new_serial.flags & ASYNC_USR_MASK)); 1256 } else { 1257 /* 1258 * OK, past this point, all the error checking has been done. 1259 * At this point, we start making changes..... 1260 */ 1261 port->flags = ((port->flags & ~ASYNC_FLAGS) | 1262 (new_serial.flags & ASYNC_FLAGS)); 1263 port->close_delay = new_serial.close_delay * HZ / 100; 1264 port->closing_wait = new_serial.closing_wait * HZ / 100; 1265 tty->low_latency = (port->flags & ASYNC_LOW_LATENCY) ? 1 : 0; 1266 if ((port->flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST && 1267 (new_serial.baud_base != info->baud_base || 1268 new_serial.custom_divisor != 1269 info->custom_divisor)) { 1270 if (new_serial.custom_divisor == 0) 1271 return -EINVAL; 1272 baud = new_serial.baud_base / new_serial.custom_divisor; 1273 tty_encode_baud_rate(tty, baud, baud); 1274 } 1275 } 1276 1277 info->type = new_serial.type; 1278 1279 process_txrx_fifo(info); 1280 1281 if (test_bit(ASYNCB_INITIALIZED, &port->flags)) { 1282 if (flags != (port->flags & ASYNC_SPD_MASK)) { 1283 spin_lock_irqsave(&info->slock, sl_flags); 1284 mxser_change_speed(tty, NULL); 1285 spin_unlock_irqrestore(&info->slock, sl_flags); 1286 } 1287 } else { 1288 retval = mxser_activate(port, tty); 1289 if (retval == 0) 1290 set_bit(ASYNCB_INITIALIZED, &port->flags); 1291 } 1292 return retval; 1293} 1294 1295/* 1296 * mxser_get_lsr_info - get line status register info 1297 * 1298 * Purpose: Let user call ioctl() to get info when the UART physically 1299 * is emptied. On bus types like RS485, the transmitter must 1300 * release the bus after transmitting. This must be done when 1301 * the transmit shift register is empty, not be done when the 1302 * transmit holding register is empty. This functionality 1303 * allows an RS485 driver to be written in user space. 1304 */ 1305static int mxser_get_lsr_info(struct mxser_port *info, 1306 unsigned int __user *value) 1307{ 1308 unsigned char status; 1309 unsigned int result; 1310 unsigned long flags; 1311 1312 spin_lock_irqsave(&info->slock, flags); 1313 status = inb(info->ioaddr + UART_LSR); 1314 spin_unlock_irqrestore(&info->slock, flags); 1315 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); 1316 return put_user(result, value); 1317} 1318 1319static int mxser_tiocmget(struct tty_struct *tty, struct file *file) 1320{ 1321 struct mxser_port *info = tty->driver_data; 1322 unsigned char control, status; 1323 unsigned long flags; 1324 1325 1326 if (tty->index == MXSER_PORTS) 1327 return -ENOIOCTLCMD; 1328 if (test_bit(TTY_IO_ERROR, &tty->flags)) 1329 return -EIO; 1330 1331 control = info->MCR; 1332 1333 spin_lock_irqsave(&info->slock, flags); 1334 status = inb(info->ioaddr + UART_MSR); 1335 if (status & UART_MSR_ANY_DELTA) 1336 mxser_check_modem_status(tty, info, status); 1337 spin_unlock_irqrestore(&info->slock, flags); 1338 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | 1339 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | 1340 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | 1341 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | 1342 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | 1343 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); 1344} 1345 1346static int mxser_tiocmset(struct tty_struct *tty, struct file *file, 1347 unsigned int set, unsigned int clear) 1348{ 1349 struct mxser_port *info = tty->driver_data; 1350 unsigned long flags; 1351 1352 1353 if (tty->index == MXSER_PORTS) 1354 return -ENOIOCTLCMD; 1355 if (test_bit(TTY_IO_ERROR, &tty->flags)) 1356 return -EIO; 1357 1358 spin_lock_irqsave(&info->slock, flags); 1359 1360 if (set & TIOCM_RTS) 1361 info->MCR |= UART_MCR_RTS; 1362 if (set & TIOCM_DTR) 1363 info->MCR |= UART_MCR_DTR; 1364 1365 if (clear & TIOCM_RTS) 1366 info->MCR &= ~UART_MCR_RTS; 1367 if (clear & TIOCM_DTR) 1368 info->MCR &= ~UART_MCR_DTR; 1369 1370 outb(info->MCR, info->ioaddr + UART_MCR); 1371 spin_unlock_irqrestore(&info->slock, flags); 1372 return 0; 1373} 1374 1375static int __init mxser_program_mode(int port) 1376{ 1377 int id, i, j, n; 1378 1379 outb(0, port); 1380 outb(0, port); 1381 outb(0, port); 1382 (void)inb(port); 1383 (void)inb(port); 1384 outb(0, port); 1385 (void)inb(port); 1386 1387 id = inb(port + 1) & 0x1F; 1388 if ((id != C168_ASIC_ID) && 1389 (id != C104_ASIC_ID) && 1390 (id != C102_ASIC_ID) && 1391 (id != CI132_ASIC_ID) && 1392 (id != CI134_ASIC_ID) && 1393 (id != CI104J_ASIC_ID)) 1394 return -1; 1395 for (i = 0, j = 0; i < 4; i++) { 1396 n = inb(port + 2); 1397 if (n == 'M') { 1398 j = 1; 1399 } else if ((j == 1) && (n == 1)) { 1400 j = 2; 1401 break; 1402 } else 1403 j = 0; 1404 } 1405 if (j != 2) 1406 id = -2; 1407 return id; 1408} 1409 1410static void __init mxser_normal_mode(int port) 1411{ 1412 int i, n; 1413 1414 outb(0xA5, port + 1); 1415 outb(0x80, port + 3); 1416 outb(12, port + 0); /* 9600 bps */ 1417 outb(0, port + 1); 1418 outb(0x03, port + 3); /* 8 data bits */ 1419 outb(0x13, port + 4); /* loop back mode */ 1420 for (i = 0; i < 16; i++) { 1421 n = inb(port + 5); 1422 if ((n & 0x61) == 0x60) 1423 break; 1424 if ((n & 1) == 1) 1425 (void)inb(port); 1426 } 1427 outb(0x00, port + 4); 1428} 1429 1430#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ 1431#define CHIP_DO 0x02 /* Serial Data Output in Eprom */ 1432#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ 1433#define CHIP_DI 0x08 /* Serial Data Input in Eprom */ 1434#define EN_CCMD 0x000 /* Chip's command register */ 1435#define EN0_RSARLO 0x008 /* Remote start address reg 0 */ 1436#define EN0_RSARHI 0x009 /* Remote start address reg 1 */ 1437#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ 1438#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ 1439#define EN0_DCFG 0x00E /* Data configuration reg WR */ 1440#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ 1441#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ 1442#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ 1443static int __init mxser_read_register(int port, unsigned short *regs) 1444{ 1445 int i, k, value, id; 1446 unsigned int j; 1447 1448 id = mxser_program_mode(port); 1449 if (id < 0) 1450 return id; 1451 for (i = 0; i < 14; i++) { 1452 k = (i & 0x3F) | 0x180; 1453 for (j = 0x100; j > 0; j >>= 1) { 1454 outb(CHIP_CS, port); 1455 if (k & j) { 1456 outb(CHIP_CS | CHIP_DO, port); 1457 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ 1458 } else { 1459 outb(CHIP_CS, port); 1460 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ 1461 } 1462 } 1463 (void)inb(port); 1464 value = 0; 1465 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { 1466 outb(CHIP_CS, port); 1467 outb(CHIP_CS | CHIP_SK, port); 1468 if (inb(port) & CHIP_DI) 1469 value |= j; 1470 } 1471 regs[i] = value; 1472 outb(0, port); 1473 } 1474 mxser_normal_mode(port); 1475 return id; 1476} 1477 1478static int mxser_ioctl_special(unsigned int cmd, void __user *argp) 1479{ 1480 struct mxser_port *ip; 1481 struct tty_port *port; 1482 struct tty_struct *tty; 1483 int result, status; 1484 unsigned int i, j; 1485 int ret = 0; 1486 1487 switch (cmd) { 1488 case MOXA_GET_MAJOR: 1489 if (printk_ratelimit()) 1490 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl " 1491 "%x (GET_MAJOR), fix your userspace\n", 1492 current->comm, cmd); 1493 return put_user(ttymajor, (int __user *)argp); 1494 1495 case MOXA_CHKPORTENABLE: 1496 result = 0; 1497 for (i = 0; i < MXSER_BOARDS; i++) 1498 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) 1499 if (mxser_boards[i].ports[j].ioaddr) 1500 result |= (1 << i); 1501 return put_user(result, (unsigned long __user *)argp); 1502 case MOXA_GETDATACOUNT: 1503 /* The receive side is locked by port->slock but it isn't 1504 clear that an exact snapshot is worth copying here */ 1505 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) 1506 ret = -EFAULT; 1507 return ret; 1508 case MOXA_GETMSTATUS: { 1509 struct mxser_mstatus ms, __user *msu = argp; 1510 for (i = 0; i < MXSER_BOARDS; i++) 1511 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { 1512 ip = &mxser_boards[i].ports[j]; 1513 port = &ip->port; 1514 memset(&ms, 0, sizeof(ms)); 1515 1516 mutex_lock(&port->mutex); 1517 if (!ip->ioaddr) 1518 goto copy; 1519 1520 tty = tty_port_tty_get(port); 1521 1522 if (!tty || !tty->termios) 1523 ms.cflag = ip->normal_termios.c_cflag; 1524 else 1525 ms.cflag = tty->termios->c_cflag; 1526 tty_kref_put(tty); 1527 spin_lock_irq(&ip->slock); 1528 status = inb(ip->ioaddr + UART_MSR); 1529 spin_unlock_irq(&ip->slock); 1530 if (status & UART_MSR_DCD) 1531 ms.dcd = 1; 1532 if (status & UART_MSR_DSR) 1533 ms.dsr = 1; 1534 if (status & UART_MSR_CTS) 1535 ms.cts = 1; 1536 copy: 1537 mutex_unlock(&port->mutex); 1538 if (copy_to_user(msu, &ms, sizeof(ms))) 1539 return -EFAULT; 1540 msu++; 1541 } 1542 return 0; 1543 } 1544 case MOXA_ASPP_MON_EXT: { 1545 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */ 1546 unsigned int cflag, iflag, p; 1547 u8 opmode; 1548 1549 me = kzalloc(sizeof(*me), GFP_KERNEL); 1550 if (!me) 1551 return -ENOMEM; 1552 1553 for (i = 0, p = 0; i < MXSER_BOARDS; i++) { 1554 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) { 1555 if (p >= ARRAY_SIZE(me->rx_cnt)) { 1556 i = MXSER_BOARDS; 1557 break; 1558 } 1559 ip = &mxser_boards[i].ports[j]; 1560 port = &ip->port; 1561 1562 mutex_lock(&port->mutex); 1563 if (!ip->ioaddr) { 1564 mutex_unlock(&port->mutex); 1565 continue; 1566 } 1567 1568 spin_lock_irq(&ip->slock); 1569 status = mxser_get_msr(ip->ioaddr, 0, p); 1570 1571 if (status & UART_MSR_TERI) 1572 ip->icount.rng++; 1573 if (status & UART_MSR_DDSR) 1574 ip->icount.dsr++; 1575 if (status & UART_MSR_DDCD) 1576 ip->icount.dcd++; 1577 if (status & UART_MSR_DCTS) 1578 ip->icount.cts++; 1579 1580 ip->mon_data.modem_status = status; 1581 me->rx_cnt[p] = ip->mon_data.rxcnt; 1582 me->tx_cnt[p] = ip->mon_data.txcnt; 1583 me->up_rxcnt[p] = ip->mon_data.up_rxcnt; 1584 me->up_txcnt[p] = ip->mon_data.up_txcnt; 1585 me->modem_status[p] = 1586 ip->mon_data.modem_status; 1587 spin_unlock_irq(&ip->slock); 1588 1589 tty = tty_port_tty_get(&ip->port); 1590 1591 if (!tty || !tty->termios) { 1592 cflag = ip->normal_termios.c_cflag; 1593 iflag = ip->normal_termios.c_iflag; 1594 me->baudrate[p] = tty_termios_baud_rate(&ip->normal_termios); 1595 } else { 1596 cflag = tty->termios->c_cflag; 1597 iflag = tty->termios->c_iflag; 1598 me->baudrate[p] = tty_get_baud_rate(tty); 1599 } 1600 tty_kref_put(tty); 1601 1602 me->databits[p] = cflag & CSIZE; 1603 me->stopbits[p] = cflag & CSTOPB; 1604 me->parity[p] = cflag & (PARENB | PARODD | 1605 CMSPAR); 1606 1607 if (cflag & CRTSCTS) 1608 me->flowctrl[p] |= 0x03; 1609 1610 if (iflag & (IXON | IXOFF)) 1611 me->flowctrl[p] |= 0x0C; 1612 1613 if (ip->type == PORT_16550A) 1614 me->fifo[p] = 1; 1615 1616 opmode = inb(ip->opmode_ioaddr)>>((p % 4) * 2); 1617 opmode &= OP_MODE_MASK; 1618 me->iftype[p] = opmode; 1619 mutex_unlock(&port->mutex); 1620 } 1621 } 1622 if (copy_to_user(argp, me, sizeof(*me))) 1623 ret = -EFAULT; 1624 kfree(me); 1625 return ret; 1626 } 1627 default: 1628 return -ENOIOCTLCMD; 1629 } 1630 return 0; 1631} 1632 1633static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg, 1634 struct async_icount *cprev) 1635{ 1636 struct async_icount cnow; 1637 unsigned long flags; 1638 int ret; 1639 1640 spin_lock_irqsave(&info->slock, flags); 1641 cnow = info->icount; /* atomic copy */ 1642 spin_unlock_irqrestore(&info->slock, flags); 1643 1644 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) || 1645 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) || 1646 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) || 1647 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts)); 1648 1649 *cprev = cnow; 1650 1651 return ret; 1652} 1653 1654static int mxser_ioctl(struct tty_struct *tty, struct file *file, 1655 unsigned int cmd, unsigned long arg) 1656{ 1657 struct mxser_port *info = tty->driver_data; 1658 struct tty_port *port = &info->port; 1659 struct async_icount cnow; 1660 unsigned long flags; 1661 void __user *argp = (void __user *)arg; 1662 int retval; 1663 1664 if (tty->index == MXSER_PORTS) 1665 return mxser_ioctl_special(cmd, argp); 1666 1667 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { 1668 int p; 1669 unsigned long opmode; 1670 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; 1671 int shiftbit; 1672 unsigned char val, mask; 1673 1674 p = tty->index % 4; 1675 if (cmd == MOXA_SET_OP_MODE) { 1676 if (get_user(opmode, (int __user *) argp)) 1677 return -EFAULT; 1678 if (opmode != RS232_MODE && 1679 opmode != RS485_2WIRE_MODE && 1680 opmode != RS422_MODE && 1681 opmode != RS485_4WIRE_MODE) 1682 return -EFAULT; 1683 mask = ModeMask[p]; 1684 shiftbit = p * 2; 1685 spin_lock_irq(&info->slock); 1686 val = inb(info->opmode_ioaddr); 1687 val &= mask; 1688 val |= (opmode << shiftbit); 1689 outb(val, info->opmode_ioaddr); 1690 spin_unlock_irq(&info->slock); 1691 } else { 1692 shiftbit = p * 2; 1693 spin_lock_irq(&info->slock); 1694 opmode = inb(info->opmode_ioaddr) >> shiftbit; 1695 spin_unlock_irq(&info->slock); 1696 opmode &= OP_MODE_MASK; 1697 if (put_user(opmode, (int __user *)argp)) 1698 return -EFAULT; 1699 } 1700 return 0; 1701 } 1702 1703 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && 1704 test_bit(TTY_IO_ERROR, &tty->flags)) 1705 return -EIO; 1706 1707 switch (cmd) { 1708 case TIOCGSERIAL: 1709 mutex_lock(&port->mutex); 1710 retval = mxser_get_serial_info(tty, argp); 1711 mutex_unlock(&port->mutex); 1712 return retval; 1713 case TIOCSSERIAL: 1714 mutex_lock(&port->mutex); 1715 retval = mxser_set_serial_info(tty, argp); 1716 mutex_unlock(&port->mutex); 1717 return retval; 1718 case TIOCSERGETLSR: /* Get line status register */ 1719 return mxser_get_lsr_info(info, argp); 1720 /* 1721 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change 1722 * - mask passed in arg for lines of interest 1723 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) 1724 * Caller should use TIOCGICOUNT to see which one it was 1725 */ 1726 case TIOCMIWAIT: 1727 spin_lock_irqsave(&info->slock, flags); 1728 cnow = info->icount; /* note the counters on entry */ 1729 spin_unlock_irqrestore(&info->slock, flags); 1730 1731 return wait_event_interruptible(info->port.delta_msr_wait, 1732 mxser_cflags_changed(info, arg, &cnow)); 1733 /* 1734 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) 1735 * Return: write counters to the user passed counter struct 1736 * NB: both 1->0 and 0->1 transitions are counted except for 1737 * RI where only 0->1 is counted. 1738 */ 1739 case TIOCGICOUNT: { 1740 struct serial_icounter_struct icnt = { 0 }; 1741 spin_lock_irqsave(&info->slock, flags); 1742 cnow = info->icount; 1743 spin_unlock_irqrestore(&info->slock, flags); 1744 1745 icnt.frame = cnow.frame; 1746 icnt.brk = cnow.brk; 1747 icnt.overrun = cnow.overrun; 1748 icnt.buf_overrun = cnow.buf_overrun; 1749 icnt.parity = cnow.parity; 1750 icnt.rx = cnow.rx; 1751 icnt.tx = cnow.tx; 1752 icnt.cts = cnow.cts; 1753 icnt.dsr = cnow.dsr; 1754 icnt.rng = cnow.rng; 1755 icnt.dcd = cnow.dcd; 1756 1757 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0; 1758 } 1759 case MOXA_HighSpeedOn: 1760 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); 1761 case MOXA_SDS_RSTICOUNTER: 1762 spin_lock_irq(&info->slock); 1763 info->mon_data.rxcnt = 0; 1764 info->mon_data.txcnt = 0; 1765 spin_unlock_irq(&info->slock); 1766 return 0; 1767 1768 case MOXA_ASPP_OQUEUE:{ 1769 int len, lsr; 1770 1771 len = mxser_chars_in_buffer(tty); 1772 spin_lock_irq(&info->slock); 1773 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_THRE; 1774 spin_unlock_irq(&info->slock); 1775 len += (lsr ? 0 : 1); 1776 1777 return put_user(len, (int __user *)argp); 1778 } 1779 case MOXA_ASPP_MON: { 1780 int mcr, status; 1781 1782 spin_lock_irq(&info->slock); 1783 status = mxser_get_msr(info->ioaddr, 1, tty->index); 1784 mxser_check_modem_status(tty, info, status); 1785 1786 mcr = inb(info->ioaddr + UART_MCR); 1787 spin_unlock_irq(&info->slock); 1788 1789 if (mcr & MOXA_MUST_MCR_XON_FLAG) 1790 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; 1791 else 1792 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; 1793 1794 if (mcr & MOXA_MUST_MCR_TX_XON) 1795 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; 1796 else 1797 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; 1798 1799 if (tty->hw_stopped) 1800 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; 1801 else 1802 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; 1803 1804 if (copy_to_user(argp, &info->mon_data, 1805 sizeof(struct mxser_mon))) 1806 return -EFAULT; 1807 1808 return 0; 1809 } 1810 case MOXA_ASPP_LSTATUS: { 1811 if (put_user(info->err_shadow, (unsigned char __user *)argp)) 1812 return -EFAULT; 1813 1814 info->err_shadow = 0; 1815 return 0; 1816 } 1817 case MOXA_SET_BAUD_METHOD: { 1818 int method; 1819 1820 if (get_user(method, (int __user *)argp)) 1821 return -EFAULT; 1822 mxser_set_baud_method[tty->index] = method; 1823 return put_user(method, (int __user *)argp); 1824 } 1825 default: 1826 return -ENOIOCTLCMD; 1827 } 1828 return 0; 1829} 1830 1831static void mxser_stoprx(struct tty_struct *tty) 1832{ 1833 struct mxser_port *info = tty->driver_data; 1834 1835 info->ldisc_stop_rx = 1; 1836 if (I_IXOFF(tty)) { 1837 if (info->board->chip_flag) { 1838 info->IER &= ~MOXA_MUST_RECV_ISR; 1839 outb(info->IER, info->ioaddr + UART_IER); 1840 } else { 1841 info->x_char = STOP_CHAR(tty); 1842 outb(0, info->ioaddr + UART_IER); 1843 info->IER |= UART_IER_THRI; 1844 outb(info->IER, info->ioaddr + UART_IER); 1845 } 1846 } 1847 1848 if (tty->termios->c_cflag & CRTSCTS) { 1849 info->MCR &= ~UART_MCR_RTS; 1850 outb(info->MCR, info->ioaddr + UART_MCR); 1851 } 1852} 1853 1854/* 1855 * This routine is called by the upper-layer tty layer to signal that 1856 * incoming characters should be throttled. 1857 */ 1858static void mxser_throttle(struct tty_struct *tty) 1859{ 1860 mxser_stoprx(tty); 1861} 1862 1863static void mxser_unthrottle(struct tty_struct *tty) 1864{ 1865 struct mxser_port *info = tty->driver_data; 1866 1867 /* startrx */ 1868 info->ldisc_stop_rx = 0; 1869 if (I_IXOFF(tty)) { 1870 if (info->x_char) 1871 info->x_char = 0; 1872 else { 1873 if (info->board->chip_flag) { 1874 info->IER |= MOXA_MUST_RECV_ISR; 1875 outb(info->IER, info->ioaddr + UART_IER); 1876 } else { 1877 info->x_char = START_CHAR(tty); 1878 outb(0, info->ioaddr + UART_IER); 1879 info->IER |= UART_IER_THRI; 1880 outb(info->IER, info->ioaddr + UART_IER); 1881 } 1882 } 1883 } 1884 1885 if (tty->termios->c_cflag & CRTSCTS) { 1886 info->MCR |= UART_MCR_RTS; 1887 outb(info->MCR, info->ioaddr + UART_MCR); 1888 } 1889} 1890 1891/* 1892 * mxser_stop() and mxser_start() 1893 * 1894 * This routines are called before setting or resetting tty->stopped. 1895 * They enable or disable transmitter interrupts, as necessary. 1896 */ 1897static void mxser_stop(struct tty_struct *tty) 1898{ 1899 struct mxser_port *info = tty->driver_data; 1900 unsigned long flags; 1901 1902 spin_lock_irqsave(&info->slock, flags); 1903 if (info->IER & UART_IER_THRI) { 1904 info->IER &= ~UART_IER_THRI; 1905 outb(info->IER, info->ioaddr + UART_IER); 1906 } 1907 spin_unlock_irqrestore(&info->slock, flags); 1908} 1909 1910static void mxser_start(struct tty_struct *tty) 1911{ 1912 struct mxser_port *info = tty->driver_data; 1913 unsigned long flags; 1914 1915 spin_lock_irqsave(&info->slock, flags); 1916 if (info->xmit_cnt && info->port.xmit_buf) { 1917 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); 1918 info->IER |= UART_IER_THRI; 1919 outb(info->IER, info->ioaddr + UART_IER); 1920 } 1921 spin_unlock_irqrestore(&info->slock, flags); 1922} 1923 1924static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) 1925{ 1926 struct mxser_port *info = tty->driver_data; 1927 unsigned long flags; 1928 1929 spin_lock_irqsave(&info->slock, flags); 1930 mxser_change_speed(tty, old_termios); 1931 spin_unlock_irqrestore(&info->slock, flags); 1932 1933 if ((old_termios->c_cflag & CRTSCTS) && 1934 !(tty->termios->c_cflag & CRTSCTS)) { 1935 tty->hw_stopped = 0; 1936 mxser_start(tty); 1937 } 1938 1939 /* Handle sw stopped */ 1940 if ((old_termios->c_iflag & IXON) && 1941 !(tty->termios->c_iflag & IXON)) { 1942 tty->stopped = 0; 1943 1944 if (info->board->chip_flag) { 1945 spin_lock_irqsave(&info->slock, flags); 1946 mxser_disable_must_rx_software_flow_control( 1947 info->ioaddr); 1948 spin_unlock_irqrestore(&info->slock, flags); 1949 } 1950 1951 mxser_start(tty); 1952 } 1953} 1954 1955/* 1956 * mxser_wait_until_sent() --- wait until the transmitter is empty 1957 */ 1958static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) 1959{ 1960 struct mxser_port *info = tty->driver_data; 1961 unsigned long orig_jiffies, char_time; 1962 unsigned long flags; 1963 int lsr; 1964 1965 if (info->type == PORT_UNKNOWN) 1966 return; 1967 1968 if (info->xmit_fifo_size == 0) 1969 return; /* Just in case.... */ 1970 1971 orig_jiffies = jiffies; 1972 /* 1973 * Set the check interval to be 1/5 of the estimated time to 1974 * send a single character, and make it at least 1. The check 1975 * interval should also be less than the timeout. 1976 * 1977 * Note: we have to use pretty tight timings here to satisfy 1978 * the NIST-PCTS. 1979 */ 1980 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; 1981 char_time = char_time / 5; 1982 if (char_time == 0) 1983 char_time = 1; 1984 if (timeout && timeout < char_time) 1985 char_time = timeout; 1986 /* 1987 * If the transmitter hasn't cleared in twice the approximate 1988 * amount of time to send the entire FIFO, it probably won't 1989 * ever clear. This assumes the UART isn't doing flow 1990 * control, which is currently the case. Hence, if it ever 1991 * takes longer than info->timeout, this is probably due to a 1992 * UART bug of some kind. So, we clamp the timeout parameter at 1993 * 2*info->timeout. 1994 */ 1995 if (!timeout || timeout > 2 * info->timeout) 1996 timeout = 2 * info->timeout; 1997#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 1998 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", 1999 timeout, char_time); 2000 printk("jiff=%lu...", jiffies); 2001#endif 2002 spin_lock_irqsave(&info->slock, flags); 2003 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { 2004#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 2005 printk("lsr = %d (jiff=%lu)...", lsr, jiffies); 2006#endif 2007 spin_unlock_irqrestore(&info->slock, flags); 2008 schedule_timeout_interruptible(char_time); 2009 spin_lock_irqsave(&info->slock, flags); 2010 if (signal_pending(current)) 2011 break; 2012 if (timeout && time_after(jiffies, orig_jiffies + timeout)) 2013 break; 2014 } 2015 spin_unlock_irqrestore(&info->slock, flags); 2016 set_current_state(TASK_RUNNING); 2017 2018#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT 2019 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); 2020#endif 2021} 2022 2023/* 2024 * This routine is called by tty_hangup() when a hangup is signaled. 2025 */ 2026static void mxser_hangup(struct tty_struct *tty) 2027{ 2028 struct mxser_port *info = tty->driver_data; 2029 2030 mxser_flush_buffer(tty); 2031 tty_port_hangup(&info->port); 2032} 2033 2034/* 2035 * mxser_rs_break() --- routine which turns the break handling on or off 2036 */ 2037static int mxser_rs_break(struct tty_struct *tty, int break_state) 2038{ 2039 struct mxser_port *info = tty->driver_data; 2040 unsigned long flags; 2041 2042 spin_lock_irqsave(&info->slock, flags); 2043 if (break_state == -1) 2044 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, 2045 info->ioaddr + UART_LCR); 2046 else 2047 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, 2048 info->ioaddr + UART_LCR); 2049 spin_unlock_irqrestore(&info->slock, flags); 2050 return 0; 2051} 2052 2053static void mxser_receive_chars(struct tty_struct *tty, 2054 struct mxser_port *port, int *status) 2055{ 2056 unsigned char ch, gdl; 2057 int ignored = 0; 2058 int cnt = 0; 2059 int recv_room; 2060 int max = 256; 2061 2062 recv_room = tty->receive_room; 2063 if (recv_room == 0 && !port->ldisc_stop_rx) 2064 mxser_stoprx(tty); 2065 if (port->board->chip_flag != MOXA_OTHER_UART) { 2066 2067 if (*status & UART_LSR_SPECIAL) 2068 goto intr_old; 2069 if (port->board->chip_flag == MOXA_MUST_MU860_HWID && 2070 (*status & MOXA_MUST_LSR_RERR)) 2071 goto intr_old; 2072 if (*status & MOXA_MUST_LSR_RERR) 2073 goto intr_old; 2074 2075 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); 2076 2077 if (port->board->chip_flag == MOXA_MUST_MU150_HWID) 2078 gdl &= MOXA_MUST_GDL_MASK; 2079 if (gdl >= recv_room) { 2080 if (!port->ldisc_stop_rx) 2081 mxser_stoprx(tty); 2082 } 2083 while (gdl--) { 2084 ch = inb(port->ioaddr + UART_RX); 2085 tty_insert_flip_char(tty, ch, 0); 2086 cnt++; 2087 } 2088 goto end_intr; 2089 } 2090intr_old: 2091 2092 do { 2093 if (max-- < 0) 2094 break; 2095 2096 ch = inb(port->ioaddr + UART_RX); 2097 if (port->board->chip_flag && (*status & UART_LSR_OE)) 2098 outb(0x23, port->ioaddr + UART_FCR); 2099 *status &= port->read_status_mask; 2100 if (*status & port->ignore_status_mask) { 2101 if (++ignored > 100) 2102 break; 2103 } else { 2104 char flag = 0; 2105 if (*status & UART_LSR_SPECIAL) { 2106 if (*status & UART_LSR_BI) { 2107 flag = TTY_BREAK; 2108 port->icount.brk++; 2109 2110 if (port->port.flags & ASYNC_SAK) 2111 do_SAK(tty); 2112 } else if (*status & UART_LSR_PE) { 2113 flag = TTY_PARITY; 2114 port->icount.parity++; 2115 } else if (*status & UART_LSR_FE) { 2116 flag = TTY_FRAME; 2117 port->icount.frame++; 2118 } else if (*status & UART_LSR_OE) { 2119 flag = TTY_OVERRUN; 2120 port->icount.overrun++; 2121 } else 2122 flag = TTY_BREAK; 2123 } 2124 tty_insert_flip_char(tty, ch, flag); 2125 cnt++; 2126 if (cnt >= recv_room) { 2127 if (!port->ldisc_stop_rx) 2128 mxser_stoprx(tty); 2129 break; 2130 } 2131 2132 } 2133 2134 if (port->board->chip_flag) 2135 break; 2136 2137 *status = inb(port->ioaddr + UART_LSR); 2138 } while (*status & UART_LSR_DR); 2139 2140end_intr: 2141 mxvar_log.rxcnt[tty->index] += cnt; 2142 port->mon_data.rxcnt += cnt; 2143 port->mon_data.up_rxcnt += cnt; 2144 2145 /* 2146 * We are called from an interrupt context with &port->slock 2147 * being held. Drop it temporarily in order to prevent 2148 * recursive locking. 2149 */ 2150 spin_unlock(&port->slock); 2151 tty_flip_buffer_push(tty); 2152 spin_lock(&port->slock); 2153} 2154 2155static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port) 2156{ 2157 int count, cnt; 2158 2159 if (port->x_char) { 2160 outb(port->x_char, port->ioaddr + UART_TX); 2161 port->x_char = 0; 2162 mxvar_log.txcnt[tty->index]++; 2163 port->mon_data.txcnt++; 2164 port->mon_data.up_txcnt++; 2165 port->icount.tx++; 2166 return; 2167 } 2168 2169 if (port->port.xmit_buf == NULL) 2170 return; 2171 2172 if (port->xmit_cnt <= 0 || tty->stopped || 2173 (tty->hw_stopped && 2174 (port->type != PORT_16550A) && 2175 (!port->board->chip_flag))) { 2176 port->IER &= ~UART_IER_THRI; 2177 outb(port->IER, port->ioaddr + UART_IER); 2178 return; 2179 } 2180 2181 cnt = port->xmit_cnt; 2182 count = port->xmit_fifo_size; 2183 do { 2184 outb(port->port.xmit_buf[port->xmit_tail++], 2185 port->ioaddr + UART_TX); 2186 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); 2187 if (--port->xmit_cnt <= 0) 2188 break; 2189 } while (--count > 0); 2190 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt); 2191 2192 port->mon_data.txcnt += (cnt - port->xmit_cnt); 2193 port->mon_data.up_txcnt += (cnt - port->xmit_cnt); 2194 port->icount.tx += (cnt - port->xmit_cnt); 2195 2196 if (port->xmit_cnt < WAKEUP_CHARS) 2197 tty_wakeup(tty); 2198 2199 if (port->xmit_cnt <= 0) { 2200 port->IER &= ~UART_IER_THRI; 2201 outb(port->IER, port->ioaddr + UART_IER); 2202 } 2203} 2204 2205/* 2206 * This is the serial driver's generic interrupt routine 2207 */ 2208static irqreturn_t mxser_interrupt(int irq, void *dev_id) 2209{ 2210 int status, iir, i; 2211 struct mxser_board *brd = NULL; 2212 struct mxser_port *port; 2213 int max, irqbits, bits, msr; 2214 unsigned int int_cnt, pass_counter = 0; 2215 int handled = IRQ_NONE; 2216 struct tty_struct *tty; 2217 2218 for (i = 0; i < MXSER_BOARDS; i++) 2219 if (dev_id == &mxser_boards[i]) { 2220 brd = dev_id; 2221 break; 2222 } 2223 2224 if (i == MXSER_BOARDS) 2225 goto irq_stop; 2226 if (brd == NULL) 2227 goto irq_stop; 2228 max = brd->info->nports; 2229 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { 2230 irqbits = inb(brd->vector) & brd->vector_mask; 2231 if (irqbits == brd->vector_mask) 2232 break; 2233 2234 handled = IRQ_HANDLED; 2235 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { 2236 if (irqbits == brd->vector_mask) 2237 break; 2238 if (bits & irqbits) 2239 continue; 2240 port = &brd->ports[i]; 2241 2242 int_cnt = 0; 2243 spin_lock(&port->slock); 2244 do { 2245 iir = inb(port->ioaddr + UART_IIR); 2246 if (iir & UART_IIR_NO_INT) 2247 break; 2248 iir &= MOXA_MUST_IIR_MASK; 2249 tty = tty_port_tty_get(&port->port); 2250 if (!tty || 2251 (port->port.flags & ASYNC_CLOSING) || 2252 !(port->port.flags & 2253 ASYNC_INITIALIZED)) { 2254 status = inb(port->ioaddr + UART_LSR); 2255 outb(0x27, port->ioaddr + UART_FCR); 2256 inb(port->ioaddr + UART_MSR); 2257 tty_kref_put(tty); 2258 break; 2259 } 2260 2261 status = inb(port->ioaddr + UART_LSR); 2262 2263 if (status & UART_LSR_PE) 2264 port->err_shadow |= NPPI_NOTIFY_PARITY; 2265 if (status & UART_LSR_FE) 2266 port->err_shadow |= NPPI_NOTIFY_FRAMING; 2267 if (status & UART_LSR_OE) 2268 port->err_shadow |= 2269 NPPI_NOTIFY_HW_OVERRUN; 2270 if (status & UART_LSR_BI) 2271 port->err_shadow |= NPPI_NOTIFY_BREAK; 2272 2273 if (port->board->chip_flag) { 2274 if (iir == MOXA_MUST_IIR_GDA || 2275 iir == MOXA_MUST_IIR_RDA || 2276 iir == MOXA_MUST_IIR_RTO || 2277 iir == MOXA_MUST_IIR_LSR) 2278 mxser_receive_chars(tty, port, 2279 &status); 2280 2281 } else { 2282 status &= port->read_status_mask; 2283 if (status & UART_LSR_DR) 2284 mxser_receive_chars(tty, port, 2285 &status); 2286 } 2287 msr = inb(port->ioaddr + UART_MSR); 2288 if (msr & UART_MSR_ANY_DELTA) 2289 mxser_check_modem_status(tty, port, msr); 2290 2291 if (port->board->chip_flag) { 2292 if (iir == 0x02 && (status & 2293 UART_LSR_THRE)) 2294 mxser_transmit_chars(tty, port); 2295 } else { 2296 if (status & UART_LSR_THRE) 2297 mxser_transmit_chars(tty, port); 2298 } 2299 tty_kref_put(tty); 2300 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); 2301 spin_unlock(&port->slock); 2302 } 2303 } 2304 2305irq_stop: 2306 return handled; 2307} 2308 2309static const struct tty_operations mxser_ops = { 2310 .open = mxser_open, 2311 .close = mxser_close, 2312 .write = mxser_write, 2313 .put_char = mxser_put_char, 2314 .flush_chars = mxser_flush_chars, 2315 .write_room = mxser_write_room, 2316 .chars_in_buffer = mxser_chars_in_buffer, 2317 .flush_buffer = mxser_flush_buffer, 2318 .ioctl = mxser_ioctl, 2319 .throttle = mxser_throttle, 2320 .unthrottle = mxser_unthrottle, 2321 .set_termios = mxser_set_termios, 2322 .stop = mxser_stop, 2323 .start = mxser_start, 2324 .hangup = mxser_hangup, 2325 .break_ctl = mxser_rs_break, 2326 .wait_until_sent = mxser_wait_until_sent, 2327 .tiocmget = mxser_tiocmget, 2328 .tiocmset = mxser_tiocmset, 2329}; 2330 2331struct tty_port_operations mxser_port_ops = { 2332 .carrier_raised = mxser_carrier_raised, 2333 .dtr_rts = mxser_dtr_rts, 2334 .activate = mxser_activate, 2335 .shutdown = mxser_shutdown_port, 2336}; 2337 2338/* 2339 * The MOXA Smartio/Industio serial driver boot-time initialization code! 2340 */ 2341 2342static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, 2343 unsigned int irq) 2344{ 2345 if (irq) 2346 free_irq(brd->irq, brd); 2347 if (pdev != NULL) { /* PCI */ 2348#ifdef CONFIG_PCI 2349 pci_release_region(pdev, 2); 2350 pci_release_region(pdev, 3); 2351#endif 2352 } else { 2353 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2354 release_region(brd->vector, 1); 2355 } 2356} 2357 2358static int __devinit mxser_initbrd(struct mxser_board *brd, 2359 struct pci_dev *pdev) 2360{ 2361 struct mxser_port *info; 2362 unsigned int i; 2363 int retval; 2364 2365 printk(KERN_INFO "mxser: max. baud rate = %d bps\n", 2366 brd->ports[0].max_baud); 2367 2368 for (i = 0; i < brd->info->nports; i++) { 2369 info = &brd->ports[i]; 2370 tty_port_init(&info->port); 2371 info->port.ops = &mxser_port_ops; 2372 info->board = brd; 2373 info->stop_rx = 0; 2374 info->ldisc_stop_rx = 0; 2375 2376 /* Enhance mode enabled here */ 2377 if (brd->chip_flag != MOXA_OTHER_UART) 2378 mxser_enable_must_enchance_mode(info->ioaddr); 2379 2380 info->port.flags = ASYNC_SHARE_IRQ; 2381 info->type = brd->uart_type; 2382 2383 process_txrx_fifo(info); 2384 2385 info->custom_divisor = info->baud_base * 16; 2386 info->port.close_delay = 5 * HZ / 10; 2387 info->port.closing_wait = 30 * HZ; 2388 info->normal_termios = mxvar_sdriver->init_termios; 2389 memset(&info->mon_data, 0, sizeof(struct mxser_mon)); 2390 info->err_shadow = 0; 2391 spin_lock_init(&info->slock); 2392 2393 /* before set INT ISR, disable all int */ 2394 outb(inb(info->ioaddr + UART_IER) & 0xf0, 2395 info->ioaddr + UART_IER); 2396 } 2397 2398 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", 2399 brd); 2400 if (retval) { 2401 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " 2402 "conflict with another device.\n", 2403 brd->info->name, brd->irq); 2404 /* We hold resources, we need to release them. */ 2405 mxser_release_res(brd, pdev, 0); 2406 } 2407 return retval; 2408} 2409 2410static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) 2411{ 2412 int id, i, bits; 2413 unsigned short regs[16], irq; 2414 unsigned char scratch, scratch2; 2415 2416 brd->chip_flag = MOXA_OTHER_UART; 2417 2418 id = mxser_read_register(cap, regs); 2419 switch (id) { 2420 case C168_ASIC_ID: 2421 brd->info = &mxser_cards[0]; 2422 break; 2423 case C104_ASIC_ID: 2424 brd->info = &mxser_cards[1]; 2425 break; 2426 case CI104J_ASIC_ID: 2427 brd->info = &mxser_cards[2]; 2428 break; 2429 case C102_ASIC_ID: 2430 brd->info = &mxser_cards[5]; 2431 break; 2432 case CI132_ASIC_ID: 2433 brd->info = &mxser_cards[6]; 2434 break; 2435 case CI134_ASIC_ID: 2436 brd->info = &mxser_cards[7]; 2437 break; 2438 default: 2439 return 0; 2440 } 2441 2442 irq = 0; 2443 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) 2444 Flag-hack checks if configuration should be read as 2-port here. */ 2445 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { 2446 irq = regs[9] & 0xF000; 2447 irq = irq | (irq >> 4); 2448 if (irq != (regs[9] & 0xFF00)) 2449 goto err_irqconflict; 2450 } else if (brd->info->nports == 4) { 2451 irq = regs[9] & 0xF000; 2452 irq = irq | (irq >> 4); 2453 irq = irq | (irq >> 8); 2454 if (irq != regs[9]) 2455 goto err_irqconflict; 2456 } else if (brd->info->nports == 8) { 2457 irq = regs[9] & 0xF000; 2458 irq = irq | (irq >> 4); 2459 irq = irq | (irq >> 8); 2460 if ((irq != regs[9]) || (irq != regs[10])) 2461 goto err_irqconflict; 2462 } 2463 2464 if (!irq) { 2465 printk(KERN_ERR "mxser: interrupt number unset\n"); 2466 return -EIO; 2467 } 2468 brd->irq = ((int)(irq & 0xF000) >> 12); 2469 for (i = 0; i < 8; i++) 2470 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; 2471 if ((regs[12] & 0x80) == 0) { 2472 printk(KERN_ERR "mxser: invalid interrupt vector\n"); 2473 return -EIO; 2474 } 2475 brd->vector = (int)regs[11]; /* interrupt vector */ 2476 if (id == 1) 2477 brd->vector_mask = 0x00FF; 2478 else 2479 brd->vector_mask = 0x000F; 2480 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { 2481 if (regs[12] & bits) { 2482 brd->ports[i].baud_base = 921600; 2483 brd->ports[i].max_baud = 921600; 2484 } else { 2485 brd->ports[i].baud_base = 115200; 2486 brd->ports[i].max_baud = 115200; 2487 } 2488 } 2489 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); 2490 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); 2491 outb(0, cap + UART_EFR); /* EFR is the same as FCR */ 2492 outb(scratch2, cap + UART_LCR); 2493 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); 2494 scratch = inb(cap + UART_IIR); 2495 2496 if (scratch & 0xC0) 2497 brd->uart_type = PORT_16550A; 2498 else 2499 brd->uart_type = PORT_16450; 2500 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, 2501 "mxser(IO)")) { 2502 printk(KERN_ERR "mxser: can't request ports I/O region: " 2503 "0x%.8lx-0x%.8lx\n", 2504 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2505 8 * brd->info->nports - 1); 2506 return -EIO; 2507 } 2508 if (!request_region(brd->vector, 1, "mxser(vector)")) { 2509 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); 2510 printk(KERN_ERR "mxser: can't request interrupt vector region: " 2511 "0x%.8lx-0x%.8lx\n", 2512 brd->ports[0].ioaddr, brd->ports[0].ioaddr + 2513 8 * brd->info->nports - 1); 2514 return -EIO; 2515 } 2516 return brd->info->nports; 2517 2518err_irqconflict: 2519 printk(KERN_ERR "mxser: invalid interrupt number\n"); 2520 return -EIO; 2521} 2522 2523static int __devinit mxser_probe(struct pci_dev *pdev, 2524 const struct pci_device_id *ent) 2525{ 2526#ifdef CONFIG_PCI 2527 struct mxser_board *brd; 2528 unsigned int i, j; 2529 unsigned long ioaddress; 2530 int retval = -EINVAL; 2531 2532 for (i = 0; i < MXSER_BOARDS; i++) 2533 if (mxser_boards[i].info == NULL) 2534 break; 2535 2536 if (i >= MXSER_BOARDS) { 2537 dev_err(&pdev->dev, "too many boards found (maximum %d), board " 2538 "not configured\n", MXSER_BOARDS); 2539 goto err; 2540 } 2541 2542 brd = &mxser_boards[i]; 2543 brd->idx = i * MXSER_PORTS_PER_BOARD; 2544 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n", 2545 mxser_cards[ent->driver_data].name, 2546 pdev->bus->number, PCI_SLOT(pdev->devfn)); 2547 2548 retval = pci_enable_device(pdev); 2549 if (retval) { 2550 dev_err(&pdev->dev, "PCI enable failed\n"); 2551 goto err; 2552 } 2553 2554 /* io address */ 2555 ioaddress = pci_resource_start(pdev, 2); 2556 retval = pci_request_region(pdev, 2, "mxser(IO)"); 2557 if (retval) 2558 goto err; 2559 2560 brd->info = &mxser_cards[ent->driver_data]; 2561 for (i = 0; i < brd->info->nports; i++) 2562 brd->ports[i].ioaddr = ioaddress + 8 * i; 2563 2564 /* vector */ 2565 ioaddress = pci_resource_start(pdev, 3); 2566 retval = pci_request_region(pdev, 3, "mxser(vector)"); 2567 if (retval) 2568 goto err_relio; 2569 brd->vector = ioaddress; 2570 2571 /* irq */ 2572 brd->irq = pdev->irq; 2573 2574 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); 2575 brd->uart_type = PORT_16550A; 2576 brd->vector_mask = 0; 2577 2578 for (i = 0; i < brd->info->nports; i++) { 2579 for (j = 0; j < UART_INFO_NUM; j++) { 2580 if (Gpci_uart_info[j].type == brd->chip_flag) { 2581 brd->ports[i].max_baud = 2582 Gpci_uart_info[j].max_baud; 2583 2584 /* exception....CP-102 */ 2585 if (brd->info->flags & MXSER_HIGHBAUD) 2586 brd->ports[i].max_baud = 921600; 2587 break; 2588 } 2589 } 2590 } 2591 2592 if (brd->chip_flag == MOXA_MUST_MU860_HWID) { 2593 for (i = 0; i < brd->info->nports; i++) { 2594 if (i < 4) 2595 brd->ports[i].opmode_ioaddr = ioaddress + 4; 2596 else 2597 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; 2598 } 2599 outb(0, ioaddress + 4); /* default set to RS232 mode */ 2600 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ 2601 } 2602 2603 for (i = 0; i < brd->info->nports; i++) { 2604 brd->vector_mask |= (1 << i); 2605 brd->ports[i].baud_base = 921600; 2606 } 2607 2608 /* mxser_initbrd will hook ISR. */ 2609 retval = mxser_initbrd(brd, pdev); 2610 if (retval) 2611 goto err_null; 2612 2613 for (i = 0; i < brd->info->nports; i++) 2614 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); 2615 2616 pci_set_drvdata(pdev, brd); 2617 2618 return 0; 2619err_relio: 2620 pci_release_region(pdev, 2); 2621err_null: 2622 brd->info = NULL; 2623err: 2624 return retval; 2625#else 2626 return -ENODEV; 2627#endif 2628} 2629 2630static void __devexit mxser_remove(struct pci_dev *pdev) 2631{ 2632 struct mxser_board *brd = pci_get_drvdata(pdev); 2633 unsigned int i; 2634 2635 for (i = 0; i < brd->info->nports; i++) 2636 tty_unregister_device(mxvar_sdriver, brd->idx + i); 2637 2638 mxser_release_res(brd, pdev, 1); 2639 brd->info = NULL; 2640} 2641 2642static struct pci_driver mxser_driver = { 2643 .name = "mxser", 2644 .id_table = mxser_pcibrds, 2645 .probe = mxser_probe, 2646 .remove = __devexit_p(mxser_remove) 2647}; 2648 2649static int __init mxser_module_init(void) 2650{ 2651 struct mxser_board *brd; 2652 unsigned int b, i, m; 2653 int retval; 2654 2655 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); 2656 if (!mxvar_sdriver) 2657 return -ENOMEM; 2658 2659 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", 2660 MXSER_VERSION); 2661 2662 /* Initialize the tty_driver structure */ 2663 mxvar_sdriver->owner = THIS_MODULE; 2664 mxvar_sdriver->magic = TTY_DRIVER_MAGIC; 2665 mxvar_sdriver->name = "ttyMI"; 2666 mxvar_sdriver->major = ttymajor; 2667 mxvar_sdriver->minor_start = 0; 2668 mxvar_sdriver->num = MXSER_PORTS + 1; 2669 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; 2670 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; 2671 mxvar_sdriver->init_termios = tty_std_termios; 2672 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; 2673 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; 2674 tty_set_operations(mxvar_sdriver, &mxser_ops); 2675 2676 retval = tty_register_driver(mxvar_sdriver); 2677 if (retval) { 2678 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " 2679 "tty driver !\n"); 2680 goto err_put; 2681 } 2682 2683 /* Start finding ISA boards here */ 2684 for (m = 0, b = 0; b < MXSER_BOARDS; b++) { 2685 if (!ioaddr[b]) 2686 continue; 2687 2688 brd = &mxser_boards[m]; 2689 retval = mxser_get_ISA_conf(ioaddr[b], brd); 2690 if (retval <= 0) { 2691 brd->info = NULL; 2692 continue; 2693 } 2694 2695 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n", 2696 brd->info->name, ioaddr[b]); 2697 2698 /* mxser_initbrd will hook ISR. */ 2699 if (mxser_initbrd(brd, NULL) < 0) { 2700 brd->info = NULL; 2701 continue; 2702 } 2703 2704 brd->idx = m * MXSER_PORTS_PER_BOARD; 2705 for (i = 0; i < brd->info->nports; i++) 2706 tty_register_device(mxvar_sdriver, brd->idx + i, NULL); 2707 2708 m++; 2709 } 2710 2711 retval = pci_register_driver(&mxser_driver); 2712 if (retval) { 2713 printk(KERN_ERR "mxser: can't register pci driver\n"); 2714 if (!m) { 2715 retval = -ENODEV; 2716 goto err_unr; 2717 } /* else: we have some ISA cards under control */ 2718 } 2719 2720 return 0; 2721err_unr: 2722 tty_unregister_driver(mxvar_sdriver); 2723err_put: 2724 put_tty_driver(mxvar_sdriver); 2725 return retval; 2726} 2727 2728static void __exit mxser_module_exit(void) 2729{ 2730 unsigned int i, j; 2731 2732 pci_unregister_driver(&mxser_driver); 2733 2734 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ 2735 if (mxser_boards[i].info != NULL) 2736 for (j = 0; j < mxser_boards[i].info->nports; j++) 2737 tty_unregister_device(mxvar_sdriver, 2738 mxser_boards[i].idx + j); 2739 tty_unregister_driver(mxvar_sdriver); 2740 put_tty_driver(mxvar_sdriver); 2741 2742 for (i = 0; i < MXSER_BOARDS; i++) 2743 if (mxser_boards[i].info != NULL) 2744 mxser_release_res(&mxser_boards[i], NULL, 1); 2745} 2746 2747module_init(mxser_module_init); 2748module_exit(mxser_module_exit); 2749