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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/tile/include/asm/
1/*
2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
3 *
4 *   This program is free software; you can redistribute it and/or
5 *   modify it under the terms of the GNU General Public License
6 *   as published by the Free Software Foundation, version 2.
7 *
8 *   This program is distributed in the hope that it will be useful, but
9 *   WITHOUT ANY WARRANTY; without even the implied warranty of
10 *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 *   NON INFRINGEMENT.  See the GNU General Public License for
12 *   more details.
13 */
14
15#ifndef _ASM_TILE_IO_H
16#define _ASM_TILE_IO_H
17
18#include <linux/kernel.h>
19#include <linux/bug.h>
20#include <asm/page.h>
21
22#define IO_SPACE_LIMIT 0xfffffffful
23
24/*
25 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
26 * access.
27 */
28#define xlate_dev_mem_ptr(p)	__va(p)
29
30/*
31 * Convert a virtual cached pointer to an uncached pointer.
32 */
33#define xlate_dev_kmem_ptr(p)	p
34
35/*
36 * Change "struct page" to physical address.
37 */
38#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
39
40/*
41 * Some places try to pass in an loff_t for PHYSADDR (?!), so we cast it to
42 * long before casting it to a pointer to avoid compiler warnings.
43 */
44#if CHIP_HAS_MMIO()
45extern void __iomem *ioremap(resource_size_t offset, unsigned long size);
46extern void __iomem *ioremap_prot(resource_size_t offset, unsigned long size,
47	pgprot_t pgprot);
48extern void iounmap(volatile void __iomem *addr);
49#else
50#define ioremap(physaddr, size)	((void __iomem *)(unsigned long)(physaddr))
51#define iounmap(addr)		((void)0)
52#endif
53
54#define ioremap_nocache(physaddr, size)		ioremap(physaddr, size)
55#define ioremap_writethrough(physaddr, size)	ioremap(physaddr, size)
56#define ioremap_fullcache(physaddr, size)	ioremap(physaddr, size)
57
58void __iomem *ioport_map(unsigned long port, unsigned int len);
59extern inline void ioport_unmap(void __iomem *addr) {}
60
61#define mmiowb()
62
63/* Conversion between virtual and physical mappings.  */
64#define mm_ptov(addr)		((void *)phys_to_virt(addr))
65#define mm_vtop(addr)		((unsigned long)virt_to_phys(addr))
66
67#ifdef CONFIG_PCI
68
69extern u8 _tile_readb(unsigned long addr);
70extern u16 _tile_readw(unsigned long addr);
71extern u32 _tile_readl(unsigned long addr);
72extern u64 _tile_readq(unsigned long addr);
73extern void _tile_writeb(u8  val, unsigned long addr);
74extern void _tile_writew(u16 val, unsigned long addr);
75extern void _tile_writel(u32 val, unsigned long addr);
76extern void _tile_writeq(u64 val, unsigned long addr);
77
78#else
79
80/*
81 * The Tile architecture does not support IOMEM unless PCI is enabled.
82 * Unfortunately we can't yet simply not declare these methods,
83 * since some generic code that compiles into the kernel, but
84 * we never run, uses them unconditionally.
85 */
86
87static inline int iomem_panic(void)
88{
89	panic("readb/writeb and friends do not exist on tile without PCI");
90	return 0;
91}
92
93static inline u8 _tile_readb(unsigned long addr)
94{
95	return iomem_panic();
96}
97
98static inline u16 _tile_readw(unsigned long addr)
99{
100	return iomem_panic();
101}
102
103static inline u32 _tile_readl(unsigned long addr)
104{
105	return iomem_panic();
106}
107
108static inline u64 _tile_readq(unsigned long addr)
109{
110	return iomem_panic();
111}
112
113static inline void _tile_writeb(u8  val, unsigned long addr)
114{
115	iomem_panic();
116}
117
118static inline void _tile_writew(u16 val, unsigned long addr)
119{
120	iomem_panic();
121}
122
123static inline void _tile_writel(u32 val, unsigned long addr)
124{
125	iomem_panic();
126}
127
128static inline void _tile_writeq(u64 val, unsigned long addr)
129{
130	iomem_panic();
131}
132
133#endif
134
135#define readb(addr) _tile_readb((unsigned long)addr)
136#define readw(addr) _tile_readw((unsigned long)addr)
137#define readl(addr) _tile_readl((unsigned long)addr)
138#define readq(addr) _tile_readq((unsigned long)addr)
139#define writeb(val, addr) _tile_writeb(val, (unsigned long)addr)
140#define writew(val, addr) _tile_writew(val, (unsigned long)addr)
141#define writel(val, addr) _tile_writel(val, (unsigned long)addr)
142#define writeq(val, addr) _tile_writeq(val, (unsigned long)addr)
143
144#define __raw_readb readb
145#define __raw_readw readw
146#define __raw_readl readl
147#define __raw_readq readq
148#define __raw_writeb writeb
149#define __raw_writew writew
150#define __raw_writel writel
151#define __raw_writeq writeq
152
153#define readb_relaxed readb
154#define readw_relaxed readw
155#define readl_relaxed readl
156#define readq_relaxed readq
157
158#define ioread8 readb
159#define ioread16 readw
160#define ioread32 readl
161#define ioread64 readq
162#define iowrite8 writeb
163#define iowrite16 writew
164#define iowrite32 writel
165#define iowrite64 writeq
166
167static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
168				 size_t len)
169{
170	int x;
171	BUG_ON((unsigned long)src & 0x3);
172	for (x = 0; x < len; x += 4)
173		*(u32 *)(dst + x) = readl(src + x);
174}
175
176static inline void memcpy_toio(volatile void __iomem *dst, const void *src,
177				size_t len)
178{
179	int x;
180	BUG_ON((unsigned long)dst & 0x3);
181	for (x = 0; x < len; x += 4)
182		writel(*(u32 *)(src + x), dst + x);
183}
184
185/*
186 * The Tile architecture does not support IOPORT, even with PCI.
187 * Unfortunately we can't yet simply not declare these methods,
188 * since some generic code that compiles into the kernel, but
189 * we never run, uses them unconditionally.
190 */
191
192static inline int ioport_panic(void)
193{
194	panic("inb/outb and friends do not exist on tile");
195	return 0;
196}
197
198static inline u8 inb(unsigned long addr)
199{
200	return ioport_panic();
201}
202
203static inline u16 inw(unsigned long addr)
204{
205	return ioport_panic();
206}
207
208static inline u32 inl(unsigned long addr)
209{
210	return ioport_panic();
211}
212
213static inline void outb(u8 b, unsigned long addr)
214{
215	ioport_panic();
216}
217
218static inline void outw(u16 b, unsigned long addr)
219{
220	ioport_panic();
221}
222
223static inline void outl(u32 b, unsigned long addr)
224{
225	ioport_panic();
226}
227
228#define inb_p(addr)	inb(addr)
229#define inw_p(addr)	inw(addr)
230#define inl_p(addr)	inl(addr)
231#define outb_p(x, addr)	outb((x), (addr))
232#define outw_p(x, addr)	outw((x), (addr))
233#define outl_p(x, addr)	outl((x), (addr))
234
235static inline void insb(unsigned long addr, void *buffer, int count)
236{
237	ioport_panic();
238}
239
240static inline void insw(unsigned long addr, void *buffer, int count)
241{
242	ioport_panic();
243}
244
245static inline void insl(unsigned long addr, void *buffer, int count)
246{
247	ioport_panic();
248}
249
250static inline void outsb(unsigned long addr, const void *buffer, int count)
251{
252	ioport_panic();
253}
254
255static inline void outsw(unsigned long addr, const void *buffer, int count)
256{
257	ioport_panic();
258}
259
260static inline void outsl(unsigned long addr, const void *buffer, int count)
261{
262	ioport_panic();
263}
264
265#define ioread8_rep(p, dst, count) \
266	insb((unsigned long) (p), (dst), (count))
267#define ioread16_rep(p, dst, count) \
268	insw((unsigned long) (p), (dst), (count))
269#define ioread32_rep(p, dst, count) \
270	insl((unsigned long) (p), (dst), (count))
271
272#define iowrite8_rep(p, src, count) \
273	outsb((unsigned long) (p), (src), (count))
274#define iowrite16_rep(p, src, count) \
275	outsw((unsigned long) (p), (src), (count))
276#define iowrite32_rep(p, src, count) \
277	outsl((unsigned long) (p), (src), (count))
278
279#endif /* _ASM_TILE_IO_H */
280