1#include <linux/clk.h> 2#include <linux/compiler.h> 3#include <linux/slab.h> 4#include <linux/io.h> 5#include <asm/clkdev.h> 6#include <asm/clock.h> 7 8static struct clk master_clk = { 9 .flags = CLK_ENABLE_ON_INIT, 10 .rate = CONFIG_SH_PCLK_FREQ, 11}; 12 13static struct clk peripheral_clk = { 14 .parent = &master_clk, 15 .flags = CLK_ENABLE_ON_INIT, 16}; 17 18static struct clk bus_clk = { 19 .parent = &master_clk, 20 .flags = CLK_ENABLE_ON_INIT, 21}; 22 23static struct clk cpu_clk = { 24 .parent = &master_clk, 25 .flags = CLK_ENABLE_ON_INIT, 26}; 27 28/* 29 * The ordering of these clocks matters, do not change it. 30 */ 31static struct clk *onchip_clocks[] = { 32 &master_clk, 33 &peripheral_clk, 34 &bus_clk, 35 &cpu_clk, 36}; 37 38#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk } 39 40static struct clk_lookup lookups[] = { 41 /* main clocks */ 42 CLKDEV_CON_ID("master_clk", &master_clk), 43 CLKDEV_CON_ID("peripheral_clk", &peripheral_clk), 44 CLKDEV_CON_ID("bus_clk", &bus_clk), 45 CLKDEV_CON_ID("cpu_clk", &cpu_clk), 46}; 47 48int __init __deprecated cpg_clk_init(void) 49{ 50 int i, ret = 0; 51 52 for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) { 53 struct clk *clk = onchip_clocks[i]; 54 arch_init_clk_ops(&clk->ops, i); 55 if (clk->ops) 56 ret |= clk_register(clk); 57 } 58 59 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 60 61 clk_add_alias("tmu_fck", NULL, "peripheral_clk", NULL); 62 clk_add_alias("mtu2_fck", NULL, "peripheral_clk", NULL); 63 clk_add_alias("cmt_fck", NULL, "peripheral_clk", NULL); 64 clk_add_alias("sci_ick", NULL, "peripheral_clk", NULL); 65 66 return ret; 67} 68 69/* 70 * Placeholder for compatability, until the lazy CPUs do this 71 * on their own. 72 */ 73int __init __weak arch_clk_init(void) 74{ 75 return cpg_clk_init(); 76} 77