1/* ASB2305 timer specifcations 2 * 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public Licence 8 * as published by the Free Software Foundation; either version 9 * 2 of the Licence, or (at your option) any later version. 10 */ 11#ifndef _ASM_UNIT_TIMEX_H 12#define _ASM_UNIT_TIMEX_H 13 14#ifndef __ASSEMBLY__ 15#include <linux/irq.h> 16#endif /* __ASSEMBLY__ */ 17 18#include <asm/timer-regs.h> 19#include <unit/clock.h> 20 21/* 22 * jiffies counter specifications 23 */ 24 25#define TMJCBR_MAX 0xffff 26#define TMJCBC TM01BC 27 28#define TMJCMD TM01MD 29#define TMJCBR TM01BR 30#define TMJCIRQ TM1IRQ 31#define TMJCICR TM1ICR 32#define TMJCICR_LEVEL GxICR_LEVEL_5 33 34#ifndef __ASSEMBLY__ 35 36static inline void startup_jiffies_counter(void) 37{ 38 unsigned rate; 39 u16 md, t16; 40 41 /* use as little prescaling as possible to avoid losing accuracy */ 42 md = TM0MD_SRC_IOCLK; 43 rate = MN10300_JCCLK / HZ; 44 45 if (rate > TMJCBR_MAX) { 46 md = TM0MD_SRC_IOCLK_8; 47 rate = MN10300_JCCLK / 8 / HZ; 48 49 if (rate > TMJCBR_MAX) { 50 md = TM0MD_SRC_IOCLK_32; 51 rate = MN10300_JCCLK / 32 / HZ; 52 53 if (rate > TMJCBR_MAX) 54 BUG(); 55 } 56 } 57 58 TMJCBR = rate - 1; 59 t16 = TMJCBR; 60 61 TMJCMD = 62 md | 63 TM1MD_SRC_TM0CASCADE << 8 | 64 TM0MD_INIT_COUNTER | 65 TM1MD_INIT_COUNTER << 8; 66 67 TMJCMD = 68 md | 69 TM1MD_SRC_TM0CASCADE << 8 | 70 TM0MD_COUNT_ENABLE | 71 TM1MD_COUNT_ENABLE << 8; 72 73 t16 = TMJCMD; 74 75 TMJCICR |= GxICR_ENABLE | GxICR_DETECT | GxICR_REQUEST; 76 t16 = TMJCICR; 77} 78 79static inline void shutdown_jiffies_counter(void) 80{ 81} 82 83#endif /* !__ASSEMBLY__ */ 84 85 86/* 87 * timestamp counter specifications 88 */ 89 90#define TMTSCBR_MAX 0xffffffff 91#define TMTSCBC TM45BC 92 93#ifndef __ASSEMBLY__ 94 95static inline void startup_timestamp_counter(void) 96{ 97 /* set up timer 4 & 5 cascaded as a 32-bit counter to count real time 98 * - count down from 4Gig-1 to 0 and wrap at IOCLK rate 99 */ 100 TM45BR = TMTSCBR_MAX; 101 102 TM4MD = TM4MD_SRC_IOCLK; 103 TM4MD |= TM4MD_INIT_COUNTER; 104 TM4MD &= ~TM4MD_INIT_COUNTER; 105 TM4ICR = 0; 106 107 TM5MD = TM5MD_SRC_TM4CASCADE; 108 TM5MD |= TM5MD_INIT_COUNTER; 109 TM5MD &= ~TM5MD_INIT_COUNTER; 110 TM5ICR = 0; 111 112 TM5MD |= TM5MD_COUNT_ENABLE; 113 TM4MD |= TM4MD_COUNT_ENABLE; 114} 115 116static inline void shutdown_timestamp_counter(void) 117{ 118 TM4MD = 0; 119 TM5MD = 0; 120} 121 122/* 123 * we use a cascaded pair of 16-bit down-counting timers to count I/O 124 * clock cycles for the purposes of time keeping 125 */ 126typedef unsigned long cycles_t; 127 128static inline cycles_t read_timestamp_counter(void) 129{ 130 return (cycles_t) TMTSCBC; 131} 132 133#endif /* !__ASSEMBLY__ */ 134 135#endif /* _ASM_UNIT_TIMEX_H */ 136