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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/m68k/include/asm/
1/*
2 *  linux/include/asm/traps.h
3 *
4 *  Copyright (C) 1993        Hamish Macdonald
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License.  See the file COPYING in the main directory of this archive
8 * for more details.
9 */
10
11#ifndef _M68KNOMMU_TRAPS_H
12#define _M68KNOMMU_TRAPS_H
13
14#ifndef __ASSEMBLY__
15
16typedef void (*e_vector)(void);
17
18extern e_vector vectors[];
19extern void init_vectors(void);
20extern void enable_vector(unsigned int irq);
21extern void disable_vector(unsigned int irq);
22extern void ack_vector(unsigned int irq);
23
24#endif
25
26#define VEC_BUSERR  (2)
27#define VEC_ADDRERR (3)
28#define VEC_ILLEGAL (4)
29#define VEC_ZERODIV (5)
30#define VEC_CHK     (6)
31#define VEC_TRAP    (7)
32#define VEC_PRIV    (8)
33#define VEC_TRACE   (9)
34#define VEC_LINE10  (10)
35#define VEC_LINE11  (11)
36#define VEC_RESV1   (12)
37#define VEC_COPROC  (13)
38#define VEC_FORMAT  (14)
39#define VEC_UNINT   (15)
40#define VEC_SPUR    (24)
41#define VEC_INT1    (25)
42#define VEC_INT2    (26)
43#define VEC_INT3    (27)
44#define VEC_INT4    (28)
45#define VEC_INT5    (29)
46#define VEC_INT6    (30)
47#define VEC_INT7    (31)
48#define VEC_SYS     (32)
49#define VEC_TRAP1   (33)
50#define VEC_TRAP2   (34)
51#define VEC_TRAP3   (35)
52#define VEC_TRAP4   (36)
53#define VEC_TRAP5   (37)
54#define VEC_TRAP6   (38)
55#define VEC_TRAP7   (39)
56#define VEC_TRAP8   (40)
57#define VEC_TRAP9   (41)
58#define VEC_TRAP10  (42)
59#define VEC_TRAP11  (43)
60#define VEC_TRAP12  (44)
61#define VEC_TRAP13  (45)
62#define VEC_TRAP14  (46)
63#define VEC_TRAP15  (47)
64#define VEC_FPBRUC  (48)
65#define VEC_FPIR    (49)
66#define VEC_FPDIVZ  (50)
67#define VEC_FPUNDER (51)
68#define VEC_FPOE    (52)
69#define VEC_FPOVER  (53)
70#define VEC_FPNAN   (54)
71#define VEC_FPUNSUP (55)
72#define	VEC_UNIMPEA (60)
73#define	VEC_UNIMPII (61)
74#define VEC_USER    (64)
75
76#define VECOFF(vec) ((vec)<<2)
77
78#ifndef __ASSEMBLY__
79
80/* Status register bits */
81#define PS_T  (0x8000)
82#define PS_S  (0x2000)
83#define PS_M  (0x1000)
84#define PS_C  (0x0001)
85
86/* structure for stack frames */
87
88struct frame {
89    struct pt_regs ptregs;
90    union {
91	    struct {
92		    unsigned long  iaddr;    /* instruction address */
93	    } fmt2;
94	    struct {
95		    unsigned long  effaddr;  /* effective address */
96	    } fmt3;
97	    struct {
98		    unsigned long  effaddr;  /* effective address */
99		    unsigned long  pc;	     /* pc of faulted instr */
100	    } fmt4;
101	    struct {
102		    unsigned long  effaddr;  /* effective address */
103		    unsigned short ssw;      /* special status word */
104		    unsigned short wb3s;     /* write back 3 status */
105		    unsigned short wb2s;     /* write back 2 status */
106		    unsigned short wb1s;     /* write back 1 status */
107		    unsigned long  faddr;    /* fault address */
108		    unsigned long  wb3a;     /* write back 3 address */
109		    unsigned long  wb3d;     /* write back 3 data */
110		    unsigned long  wb2a;     /* write back 2 address */
111		    unsigned long  wb2d;     /* write back 2 data */
112		    unsigned long  wb1a;     /* write back 1 address */
113		    unsigned long  wb1dpd0;  /* write back 1 data/push data 0*/
114		    unsigned long  pd1;      /* push data 1*/
115		    unsigned long  pd2;      /* push data 2*/
116		    unsigned long  pd3;      /* push data 3*/
117	    } fmt7;
118	    struct {
119		    unsigned long  iaddr;    /* instruction address */
120		    unsigned short int1[4];  /* internal registers */
121	    } fmt9;
122	    struct {
123		    unsigned short int1;
124		    unsigned short ssw;      /* special status word */
125		    unsigned short isc;      /* instruction stage c */
126		    unsigned short isb;      /* instruction stage b */
127		    unsigned long  daddr;    /* data cycle fault address */
128		    unsigned short int2[2];
129		    unsigned long  dobuf;    /* data cycle output buffer */
130		    unsigned short int3[2];
131	    } fmta;
132	    struct {
133		    unsigned short int1;
134		    unsigned short ssw;     /* special status word */
135		    unsigned short isc;     /* instruction stage c */
136		    unsigned short isb;     /* instruction stage b */
137		    unsigned long  daddr;   /* data cycle fault address */
138		    unsigned short int2[2];
139		    unsigned long  dobuf;   /* data cycle output buffer */
140		    unsigned short int3[4];
141		    unsigned long  baddr;   /* stage B address */
142		    unsigned short int4[2];
143		    unsigned long  dibuf;   /* data cycle input buffer */
144		    unsigned short int5[3];
145		    unsigned	   ver : 4; /* stack frame version # */
146		    unsigned	   int6:12;
147		    unsigned short int7[18];
148	    } fmtb;
149    } un;
150};
151
152#endif /* __ASSEMBLY__ */
153
154#endif /* _M68KNOMMU_TRAPS_H */
155