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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/cris/include/arch-v32/arch/hwregs/
1#ifndef __extmem_defs_h
2#define __extmem_defs_h
3
4/*
5 * This file is autogenerated from
6 *   file:           ../../inst/ext_mem/mod/extmem_regs.r
7 *     id:           extmem_regs.r,v 1.1 2004/02/16 13:29:30 np Exp
8 *     last modfied: Tue Mar 30 22:26:21 2004
9 *
10 *   by /n/asic/design/tools/rdesc/src/rdes2c --outfile extmem_defs.h ../../inst/ext_mem/mod/extmem_regs.r
11 *      id: $Id: extmem_defs.h,v 1.5 2004/06/04 07:15:33 Exp $
12 * Any changes here will be lost.
13 *
14 * -*- buffer-read-only: t -*-
15 */
16/* Main access macros */
17#ifndef REG_RD
18#define REG_RD( scope, inst, reg ) \
19  REG_READ( reg_##scope##_##reg, \
20            (inst) + REG_RD_ADDR_##scope##_##reg )
21#endif
22
23#ifndef REG_WR
24#define REG_WR( scope, inst, reg, val ) \
25  REG_WRITE( reg_##scope##_##reg, \
26             (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
27#endif
28
29#ifndef REG_RD_VECT
30#define REG_RD_VECT( scope, inst, reg, index ) \
31  REG_READ( reg_##scope##_##reg, \
32            (inst) + REG_RD_ADDR_##scope##_##reg + \
33	    (index) * STRIDE_##scope##_##reg )
34#endif
35
36#ifndef REG_WR_VECT
37#define REG_WR_VECT( scope, inst, reg, index, val ) \
38  REG_WRITE( reg_##scope##_##reg, \
39             (inst) + REG_WR_ADDR_##scope##_##reg + \
40	     (index) * STRIDE_##scope##_##reg, (val) )
41#endif
42
43#ifndef REG_RD_INT
44#define REG_RD_INT( scope, inst, reg ) \
45  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg )
46#endif
47
48#ifndef REG_WR_INT
49#define REG_WR_INT( scope, inst, reg, val ) \
50  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg, (val) )
51#endif
52
53#ifndef REG_RD_INT_VECT
54#define REG_RD_INT_VECT( scope, inst, reg, index ) \
55  REG_READ( int, (inst) + REG_RD_ADDR_##scope##_##reg + \
56	    (index) * STRIDE_##scope##_##reg )
57#endif
58
59#ifndef REG_WR_INT_VECT
60#define REG_WR_INT_VECT( scope, inst, reg, index, val ) \
61  REG_WRITE( int, (inst) + REG_WR_ADDR_##scope##_##reg + \
62	     (index) * STRIDE_##scope##_##reg, (val) )
63#endif
64
65#ifndef REG_TYPE_CONV
66#define REG_TYPE_CONV( type, orgtype, val ) \
67  ( { union { orgtype o; type n; } r; r.o = val; r.n; } )
68#endif
69
70#ifndef reg_page_size
71#define reg_page_size 8192
72#endif
73
74#ifndef REG_ADDR
75#define REG_ADDR( scope, inst, reg ) \
76  ( (inst) + REG_RD_ADDR_##scope##_##reg )
77#endif
78
79#ifndef REG_ADDR_VECT
80#define REG_ADDR_VECT( scope, inst, reg, index ) \
81  ( (inst) + REG_RD_ADDR_##scope##_##reg + \
82    (index) * STRIDE_##scope##_##reg )
83#endif
84
85/* C-code for register scope extmem */
86
87/* Register rw_cse0_cfg, scope extmem, type rw */
88typedef struct {
89  unsigned int lw     : 6;
90  unsigned int ew     : 3;
91  unsigned int zw     : 3;
92  unsigned int aw     : 2;
93  unsigned int dw     : 2;
94  unsigned int ewb    : 2;
95  unsigned int bw     : 1;
96  unsigned int mode   : 1;
97  unsigned int erc_en : 1;
98  unsigned int dummy1 : 6;
99  unsigned int size   : 3;
100  unsigned int log    : 1;
101  unsigned int en     : 1;
102} reg_extmem_rw_cse0_cfg;
103#define REG_RD_ADDR_extmem_rw_cse0_cfg 0
104#define REG_WR_ADDR_extmem_rw_cse0_cfg 0
105
106/* Register rw_cse1_cfg, scope extmem, type rw */
107typedef struct {
108  unsigned int lw     : 6;
109  unsigned int ew     : 3;
110  unsigned int zw     : 3;
111  unsigned int aw     : 2;
112  unsigned int dw     : 2;
113  unsigned int ewb    : 2;
114  unsigned int bw     : 1;
115  unsigned int mode   : 1;
116  unsigned int erc_en : 1;
117  unsigned int dummy1 : 6;
118  unsigned int size   : 3;
119  unsigned int log    : 1;
120  unsigned int en     : 1;
121} reg_extmem_rw_cse1_cfg;
122#define REG_RD_ADDR_extmem_rw_cse1_cfg 4
123#define REG_WR_ADDR_extmem_rw_cse1_cfg 4
124
125/* Register rw_csr0_cfg, scope extmem, type rw */
126typedef struct {
127  unsigned int lw     : 6;
128  unsigned int ew     : 3;
129  unsigned int zw     : 3;
130  unsigned int aw     : 2;
131  unsigned int dw     : 2;
132  unsigned int ewb    : 2;
133  unsigned int bw     : 1;
134  unsigned int mode   : 1;
135  unsigned int erc_en : 1;
136  unsigned int dummy1 : 6;
137  unsigned int size   : 3;
138  unsigned int log    : 1;
139  unsigned int en     : 1;
140} reg_extmem_rw_csr0_cfg;
141#define REG_RD_ADDR_extmem_rw_csr0_cfg 8
142#define REG_WR_ADDR_extmem_rw_csr0_cfg 8
143
144/* Register rw_csr1_cfg, scope extmem, type rw */
145typedef struct {
146  unsigned int lw     : 6;
147  unsigned int ew     : 3;
148  unsigned int zw     : 3;
149  unsigned int aw     : 2;
150  unsigned int dw     : 2;
151  unsigned int ewb    : 2;
152  unsigned int bw     : 1;
153  unsigned int mode   : 1;
154  unsigned int erc_en : 1;
155  unsigned int dummy1 : 6;
156  unsigned int size   : 3;
157  unsigned int log    : 1;
158  unsigned int en     : 1;
159} reg_extmem_rw_csr1_cfg;
160#define REG_RD_ADDR_extmem_rw_csr1_cfg 12
161#define REG_WR_ADDR_extmem_rw_csr1_cfg 12
162
163/* Register rw_csp0_cfg, scope extmem, type rw */
164typedef struct {
165  unsigned int lw     : 6;
166  unsigned int ew     : 3;
167  unsigned int zw     : 3;
168  unsigned int aw     : 2;
169  unsigned int dw     : 2;
170  unsigned int ewb    : 2;
171  unsigned int bw     : 1;
172  unsigned int mode   : 1;
173  unsigned int erc_en : 1;
174  unsigned int dummy1 : 6;
175  unsigned int size   : 3;
176  unsigned int log    : 1;
177  unsigned int en     : 1;
178} reg_extmem_rw_csp0_cfg;
179#define REG_RD_ADDR_extmem_rw_csp0_cfg 16
180#define REG_WR_ADDR_extmem_rw_csp0_cfg 16
181
182/* Register rw_csp1_cfg, scope extmem, type rw */
183typedef struct {
184  unsigned int lw     : 6;
185  unsigned int ew     : 3;
186  unsigned int zw     : 3;
187  unsigned int aw     : 2;
188  unsigned int dw     : 2;
189  unsigned int ewb    : 2;
190  unsigned int bw     : 1;
191  unsigned int mode   : 1;
192  unsigned int erc_en : 1;
193  unsigned int dummy1 : 6;
194  unsigned int size   : 3;
195  unsigned int log    : 1;
196  unsigned int en     : 1;
197} reg_extmem_rw_csp1_cfg;
198#define REG_RD_ADDR_extmem_rw_csp1_cfg 20
199#define REG_WR_ADDR_extmem_rw_csp1_cfg 20
200
201/* Register rw_csp2_cfg, scope extmem, type rw */
202typedef struct {
203  unsigned int lw     : 6;
204  unsigned int ew     : 3;
205  unsigned int zw     : 3;
206  unsigned int aw     : 2;
207  unsigned int dw     : 2;
208  unsigned int ewb    : 2;
209  unsigned int bw     : 1;
210  unsigned int mode   : 1;
211  unsigned int erc_en : 1;
212  unsigned int dummy1 : 6;
213  unsigned int size   : 3;
214  unsigned int log    : 1;
215  unsigned int en     : 1;
216} reg_extmem_rw_csp2_cfg;
217#define REG_RD_ADDR_extmem_rw_csp2_cfg 24
218#define REG_WR_ADDR_extmem_rw_csp2_cfg 24
219
220/* Register rw_csp3_cfg, scope extmem, type rw */
221typedef struct {
222  unsigned int lw     : 6;
223  unsigned int ew     : 3;
224  unsigned int zw     : 3;
225  unsigned int aw     : 2;
226  unsigned int dw     : 2;
227  unsigned int ewb    : 2;
228  unsigned int bw     : 1;
229  unsigned int mode   : 1;
230  unsigned int erc_en : 1;
231  unsigned int dummy1 : 6;
232  unsigned int size   : 3;
233  unsigned int log    : 1;
234  unsigned int en     : 1;
235} reg_extmem_rw_csp3_cfg;
236#define REG_RD_ADDR_extmem_rw_csp3_cfg 28
237#define REG_WR_ADDR_extmem_rw_csp3_cfg 28
238
239/* Register rw_csp4_cfg, scope extmem, type rw */
240typedef struct {
241  unsigned int lw     : 6;
242  unsigned int ew     : 3;
243  unsigned int zw     : 3;
244  unsigned int aw     : 2;
245  unsigned int dw     : 2;
246  unsigned int ewb    : 2;
247  unsigned int bw     : 1;
248  unsigned int mode   : 1;
249  unsigned int erc_en : 1;
250  unsigned int dummy1 : 6;
251  unsigned int size   : 3;
252  unsigned int log    : 1;
253  unsigned int en     : 1;
254} reg_extmem_rw_csp4_cfg;
255#define REG_RD_ADDR_extmem_rw_csp4_cfg 32
256#define REG_WR_ADDR_extmem_rw_csp4_cfg 32
257
258/* Register rw_csp5_cfg, scope extmem, type rw */
259typedef struct {
260  unsigned int lw     : 6;
261  unsigned int ew     : 3;
262  unsigned int zw     : 3;
263  unsigned int aw     : 2;
264  unsigned int dw     : 2;
265  unsigned int ewb    : 2;
266  unsigned int bw     : 1;
267  unsigned int mode   : 1;
268  unsigned int erc_en : 1;
269  unsigned int dummy1 : 6;
270  unsigned int size   : 3;
271  unsigned int log    : 1;
272  unsigned int en     : 1;
273} reg_extmem_rw_csp5_cfg;
274#define REG_RD_ADDR_extmem_rw_csp5_cfg 36
275#define REG_WR_ADDR_extmem_rw_csp5_cfg 36
276
277/* Register rw_csp6_cfg, scope extmem, type rw */
278typedef struct {
279  unsigned int lw     : 6;
280  unsigned int ew     : 3;
281  unsigned int zw     : 3;
282  unsigned int aw     : 2;
283  unsigned int dw     : 2;
284  unsigned int ewb    : 2;
285  unsigned int bw     : 1;
286  unsigned int mode   : 1;
287  unsigned int erc_en : 1;
288  unsigned int dummy1 : 6;
289  unsigned int size   : 3;
290  unsigned int log    : 1;
291  unsigned int en     : 1;
292} reg_extmem_rw_csp6_cfg;
293#define REG_RD_ADDR_extmem_rw_csp6_cfg 40
294#define REG_WR_ADDR_extmem_rw_csp6_cfg 40
295
296/* Register rw_css_cfg, scope extmem, type rw */
297typedef struct {
298  unsigned int lw     : 6;
299  unsigned int ew     : 3;
300  unsigned int zw     : 3;
301  unsigned int aw     : 2;
302  unsigned int dw     : 2;
303  unsigned int ewb    : 2;
304  unsigned int bw     : 1;
305  unsigned int mode   : 1;
306  unsigned int erc_en : 1;
307  unsigned int dummy1 : 6;
308  unsigned int size   : 3;
309  unsigned int log    : 1;
310  unsigned int en     : 1;
311} reg_extmem_rw_css_cfg;
312#define REG_RD_ADDR_extmem_rw_css_cfg 44
313#define REG_WR_ADDR_extmem_rw_css_cfg 44
314
315/* Register rw_status_handle, scope extmem, type rw */
316typedef struct {
317  unsigned int h : 32;
318} reg_extmem_rw_status_handle;
319#define REG_RD_ADDR_extmem_rw_status_handle 48
320#define REG_WR_ADDR_extmem_rw_status_handle 48
321
322/* Register rw_wait_pin, scope extmem, type rw */
323typedef struct {
324  unsigned int val   : 16;
325  unsigned int dummy1 : 15;
326  unsigned int start : 1;
327} reg_extmem_rw_wait_pin;
328#define REG_RD_ADDR_extmem_rw_wait_pin 52
329#define REG_WR_ADDR_extmem_rw_wait_pin 52
330
331/* Register rw_gated_csp, scope extmem, type rw */
332typedef struct {
333  unsigned int dummy1 : 31;
334  unsigned int en : 1;
335} reg_extmem_rw_gated_csp;
336#define REG_RD_ADDR_extmem_rw_gated_csp 56
337#define REG_WR_ADDR_extmem_rw_gated_csp 56
338
339
340/* Constants */
341enum {
342  regk_extmem_b16                          = 0x00000001,
343  regk_extmem_b32                          = 0x00000000,
344  regk_extmem_bwe                          = 0x00000000,
345  regk_extmem_cwe                          = 0x00000001,
346  regk_extmem_no                           = 0x00000000,
347  regk_extmem_rw_cse0_cfg_default          = 0x000006cf,
348  regk_extmem_rw_cse1_cfg_default          = 0x000006cf,
349  regk_extmem_rw_csp0_cfg_default          = 0x000006cf,
350  regk_extmem_rw_csp1_cfg_default          = 0x000006cf,
351  regk_extmem_rw_csp2_cfg_default          = 0x000006cf,
352  regk_extmem_rw_csp3_cfg_default          = 0x000006cf,
353  regk_extmem_rw_csp4_cfg_default          = 0x000006cf,
354  regk_extmem_rw_csp5_cfg_default          = 0x000006cf,
355  regk_extmem_rw_csp6_cfg_default          = 0x000006cf,
356  regk_extmem_rw_csr0_cfg_default          = 0x000006cf,
357  regk_extmem_rw_csr1_cfg_default          = 0x000006cf,
358  regk_extmem_rw_css_cfg_default           = 0x000006cf,
359  regk_extmem_s128KB                       = 0x00000000,
360  regk_extmem_s16MB                        = 0x00000005,
361  regk_extmem_s1MB                         = 0x00000001,
362  regk_extmem_s2MB                         = 0x00000002,
363  regk_extmem_s32MB                        = 0x00000006,
364  regk_extmem_s4MB                         = 0x00000003,
365  regk_extmem_s64MB                        = 0x00000007,
366  regk_extmem_s8MB                         = 0x00000004,
367  regk_extmem_yes                          = 0x00000001
368};
369#endif /* __extmem_defs_h */
370