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1/*!***************************************************************************
2*!
3*! FILE NAME  : i2c.c
4*!
5*! DESCRIPTION: implements an interface for IIC/I2C, both directly from other
6*!              kernel modules (i2c_writereg/readreg) and from userspace using
7*!              ioctl()'s
8*!
9*! Nov 30 1998  Torbjorn Eliasson  Initial version.
10*!              Bjorn Wesen        Elinux kernel version.
11*! Jan 14 2000  Johan Adolfsson    Fixed PB shadow register stuff -
12*!                                 don't use PB_I2C if DS1302 uses same bits,
13*!                                 use PB.
14*| June 23 2003 Pieter Grimmerink  Added 'i2c_sendnack'. i2c_readreg now
15*|                                 generates nack on last received byte,
16*|                                 instead of ack.
17*|                                 i2c_getack changed data level while clock
18*|                                 was high, causing DS75 to see  a stop condition
19*!
20*! ---------------------------------------------------------------------------
21*!
22*! (C) Copyright 1999-2007 Axis Communications AB, LUND, SWEDEN
23*!
24*!***************************************************************************/
25
26/****************** INCLUDE FILES SECTION ***********************************/
27
28#include <linux/module.h>
29#include <linux/sched.h>
30#include <linux/errno.h>
31#include <linux/kernel.h>
32#include <linux/fs.h>
33#include <linux/string.h>
34#include <linux/init.h>
35#include <linux/mutex.h>
36
37#include <asm/etraxi2c.h>
38
39#include <asm/system.h>
40#include <asm/io.h>
41#include <asm/delay.h>
42
43#include "i2c.h"
44
45/****************** I2C DEFINITION SECTION *************************/
46
47#define D(x)
48
49#define I2C_MAJOR 123  /* LOCAL/EXPERIMENTAL */
50static DEFINE_MUTEX(i2c_mutex);
51static const char i2c_name[] = "i2c";
52
53#define CLOCK_LOW_TIME            8
54#define CLOCK_HIGH_TIME           8
55#define START_CONDITION_HOLD_TIME 8
56#define STOP_CONDITION_HOLD_TIME  8
57#define ENABLE_OUTPUT 0x01
58#define ENABLE_INPUT 0x00
59#define I2C_CLOCK_HIGH 1
60#define I2C_CLOCK_LOW 0
61#define I2C_DATA_HIGH 1
62#define I2C_DATA_LOW 0
63
64#define i2c_enable()
65#define i2c_disable()
66
67/* enable or disable output-enable, to select output or input on the i2c bus */
68
69#define i2c_dir_out() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_out)
70#define i2c_dir_in() crisv32_io_set_dir(&cris_i2c_data, crisv32_io_dir_in)
71
72/* control the i2c clock and data signals */
73
74#define i2c_clk(x) crisv32_io_set(&cris_i2c_clk, x)
75#define i2c_data(x) crisv32_io_set(&cris_i2c_data, x)
76
77/* read a bit from the i2c interface */
78
79#define i2c_getbit() crisv32_io_rd(&cris_i2c_data)
80
81#define i2c_delay(usecs) udelay(usecs)
82
83static DEFINE_SPINLOCK(i2c_lock); /* Protect directions etc */
84
85/****************** VARIABLE SECTION ************************************/
86
87static struct crisv32_iopin cris_i2c_clk;
88static struct crisv32_iopin cris_i2c_data;
89
90/****************** FUNCTION DEFINITION SECTION *************************/
91
92
93/* generate i2c start condition */
94
95void
96i2c_start(void)
97{
98	/*
99	 * SCL=1 SDA=1
100	 */
101	i2c_dir_out();
102	i2c_delay(CLOCK_HIGH_TIME/6);
103	i2c_data(I2C_DATA_HIGH);
104	i2c_clk(I2C_CLOCK_HIGH);
105	i2c_delay(CLOCK_HIGH_TIME);
106	/*
107	 * SCL=1 SDA=0
108	 */
109	i2c_data(I2C_DATA_LOW);
110	i2c_delay(START_CONDITION_HOLD_TIME);
111	/*
112	 * SCL=0 SDA=0
113	 */
114	i2c_clk(I2C_CLOCK_LOW);
115	i2c_delay(CLOCK_LOW_TIME);
116}
117
118/* generate i2c stop condition */
119
120void
121i2c_stop(void)
122{
123	i2c_dir_out();
124
125	/*
126	 * SCL=0 SDA=0
127	 */
128	i2c_clk(I2C_CLOCK_LOW);
129	i2c_data(I2C_DATA_LOW);
130	i2c_delay(CLOCK_LOW_TIME*2);
131	/*
132	 * SCL=1 SDA=0
133	 */
134	i2c_clk(I2C_CLOCK_HIGH);
135	i2c_delay(CLOCK_HIGH_TIME*2);
136	/*
137	 * SCL=1 SDA=1
138	 */
139	i2c_data(I2C_DATA_HIGH);
140	i2c_delay(STOP_CONDITION_HOLD_TIME);
141
142	i2c_dir_in();
143}
144
145/* write a byte to the i2c interface */
146
147void
148i2c_outbyte(unsigned char x)
149{
150	int i;
151
152	i2c_dir_out();
153
154	for (i = 0; i < 8; i++) {
155		if (x & 0x80) {
156			i2c_data(I2C_DATA_HIGH);
157		} else {
158			i2c_data(I2C_DATA_LOW);
159		}
160
161		i2c_delay(CLOCK_LOW_TIME/2);
162		i2c_clk(I2C_CLOCK_HIGH);
163		i2c_delay(CLOCK_HIGH_TIME);
164		i2c_clk(I2C_CLOCK_LOW);
165		i2c_delay(CLOCK_LOW_TIME/2);
166		x <<= 1;
167	}
168	i2c_data(I2C_DATA_LOW);
169	i2c_delay(CLOCK_LOW_TIME/2);
170
171	/*
172	 * enable input
173	 */
174	i2c_dir_in();
175}
176
177/* read a byte from the i2c interface */
178
179unsigned char
180i2c_inbyte(void)
181{
182	unsigned char aBitByte = 0;
183	int i;
184
185	/* Switch off I2C to get bit */
186	i2c_disable();
187	i2c_dir_in();
188	i2c_delay(CLOCK_HIGH_TIME/2);
189
190	/* Get bit */
191	aBitByte |= i2c_getbit();
192
193	/* Enable I2C */
194	i2c_enable();
195	i2c_delay(CLOCK_LOW_TIME/2);
196
197	for (i = 1; i < 8; i++) {
198		aBitByte <<= 1;
199		/* Clock pulse */
200		i2c_clk(I2C_CLOCK_HIGH);
201		i2c_delay(CLOCK_HIGH_TIME);
202		i2c_clk(I2C_CLOCK_LOW);
203		i2c_delay(CLOCK_LOW_TIME);
204
205		/* Switch off I2C to get bit */
206		i2c_disable();
207		i2c_dir_in();
208		i2c_delay(CLOCK_HIGH_TIME/2);
209
210		/* Get bit */
211		aBitByte |= i2c_getbit();
212
213		/* Enable I2C */
214		i2c_enable();
215		i2c_delay(CLOCK_LOW_TIME/2);
216	}
217	i2c_clk(I2C_CLOCK_HIGH);
218	i2c_delay(CLOCK_HIGH_TIME);
219
220	/*
221	 * we leave the clock low, getbyte is usually followed
222	 * by sendack/nack, they assume the clock to be low
223	 */
224	i2c_clk(I2C_CLOCK_LOW);
225	return aBitByte;
226}
227
228/*#---------------------------------------------------------------------------
229*#
230*# FUNCTION NAME: i2c_getack
231*#
232*# DESCRIPTION  : checks if ack was received from ic2
233*#
234*#--------------------------------------------------------------------------*/
235
236int
237i2c_getack(void)
238{
239	int ack = 1;
240	/*
241	 * enable output
242	 */
243	i2c_dir_out();
244	/*
245	 * Release data bus by setting
246	 * data high
247	 */
248	i2c_data(I2C_DATA_HIGH);
249	/*
250	 * enable input
251	 */
252	i2c_dir_in();
253	i2c_delay(CLOCK_HIGH_TIME/4);
254	/*
255	 * generate ACK clock pulse
256	 */
257	i2c_clk(I2C_CLOCK_HIGH);
258
259	/*
260	 * now wait for ack
261	 */
262	i2c_delay(CLOCK_HIGH_TIME/2);
263	/*
264	 * check for ack
265	 */
266	if (i2c_getbit())
267		ack = 0;
268	i2c_delay(CLOCK_HIGH_TIME/2);
269	if (!ack) {
270		if (!i2c_getbit()) /* receiver pulld SDA low */
271			ack = 1;
272		i2c_delay(CLOCK_HIGH_TIME/2);
273	}
274
275   /*
276    * our clock is high now, make sure data is low
277    * before we enable our output. If we keep data high
278    * and enable output, we would generate a stop condition.
279    */
280	i2c_clk(I2C_CLOCK_LOW);
281	i2c_delay(CLOCK_HIGH_TIME/4);
282	/*
283	 * enable output
284	 */
285	i2c_dir_out();
286	/*
287	 * remove ACK clock pulse
288	 */
289	i2c_data(I2C_DATA_HIGH);
290	i2c_delay(CLOCK_LOW_TIME/2);
291	return ack;
292}
293
294/*#---------------------------------------------------------------------------
295*#
296*# FUNCTION NAME: I2C::sendAck
297*#
298*# DESCRIPTION  : Send ACK on received data
299*#
300*#--------------------------------------------------------------------------*/
301void
302i2c_sendack(void)
303{
304	/*
305	 * enable output
306	 */
307	i2c_delay(CLOCK_LOW_TIME);
308	i2c_dir_out();
309	/*
310	 * set ack pulse high
311	 */
312	i2c_data(I2C_DATA_LOW);
313	/*
314	 * generate clock pulse
315	 */
316	i2c_delay(CLOCK_HIGH_TIME/6);
317	i2c_clk(I2C_CLOCK_HIGH);
318	i2c_delay(CLOCK_HIGH_TIME);
319	i2c_clk(I2C_CLOCK_LOW);
320	i2c_delay(CLOCK_LOW_TIME/6);
321	/*
322	 * reset data out
323	 */
324	i2c_data(I2C_DATA_HIGH);
325	i2c_delay(CLOCK_LOW_TIME);
326
327	i2c_dir_in();
328}
329
330/*#---------------------------------------------------------------------------
331*#
332*# FUNCTION NAME: i2c_sendnack
333*#
334*# DESCRIPTION  : Sends NACK on received data
335*#
336*#--------------------------------------------------------------------------*/
337void
338i2c_sendnack(void)
339{
340	/*
341	 * enable output
342	 */
343	i2c_delay(CLOCK_LOW_TIME);
344	i2c_dir_out();
345	/*
346	 * set data high
347	 */
348	i2c_data(I2C_DATA_HIGH);
349	/*
350	 * generate clock pulse
351	 */
352	i2c_delay(CLOCK_HIGH_TIME/6);
353	i2c_clk(I2C_CLOCK_HIGH);
354	i2c_delay(CLOCK_HIGH_TIME);
355	i2c_clk(I2C_CLOCK_LOW);
356	i2c_delay(CLOCK_LOW_TIME);
357
358	i2c_dir_in();
359}
360
361/*#---------------------------------------------------------------------------
362*#
363*# FUNCTION NAME: i2c_write
364*#
365*# DESCRIPTION  : Writes a value to an I2C device
366*#
367*#--------------------------------------------------------------------------*/
368int
369i2c_write(unsigned char theSlave, void *data, size_t nbytes)
370{
371	int error, cntr = 3;
372	unsigned char bytes_wrote = 0;
373	unsigned char value;
374	unsigned long flags;
375
376	spin_lock_irqsave(&i2c_lock, flags);
377
378	do {
379		error = 0;
380
381		i2c_start();
382		/*
383		 * send slave address
384		 */
385		i2c_outbyte((theSlave & 0xfe));
386		/*
387		 * wait for ack
388		 */
389		if (!i2c_getack())
390			error = 1;
391		/*
392		 * send data
393		 */
394		for (bytes_wrote = 0; bytes_wrote < nbytes; bytes_wrote++) {
395			memcpy(&value, data + bytes_wrote, sizeof value);
396			i2c_outbyte(value);
397			/*
398			 * now it's time to wait for ack
399			 */
400			if (!i2c_getack())
401				error |= 4;
402		}
403		/*
404		 * end byte stream
405		 */
406		i2c_stop();
407
408	} while (error && cntr--);
409
410	i2c_delay(CLOCK_LOW_TIME);
411
412	spin_unlock_irqrestore(&i2c_lock, flags);
413
414	return -error;
415}
416
417/*#---------------------------------------------------------------------------
418*#
419*# FUNCTION NAME: i2c_read
420*#
421*# DESCRIPTION  : Reads a value from an I2C device
422*#
423*#--------------------------------------------------------------------------*/
424int
425i2c_read(unsigned char theSlave, void *data, size_t nbytes)
426{
427	unsigned char b = 0;
428	unsigned char bytes_read = 0;
429	int error, cntr = 3;
430	unsigned long flags;
431
432	spin_lock_irqsave(&i2c_lock, flags);
433
434	do {
435		error = 0;
436		memset(data, 0, nbytes);
437		/*
438		 * generate start condition
439		 */
440		i2c_start();
441		/*
442		 * send slave address
443		 */
444		i2c_outbyte((theSlave | 0x01));
445		/*
446		 * wait for ack
447		 */
448		if (!i2c_getack())
449			error = 1;
450		/*
451		 * fetch data
452		 */
453		for (bytes_read = 0; bytes_read < nbytes; bytes_read++) {
454			b = i2c_inbyte();
455			memcpy(data + bytes_read, &b, sizeof b);
456
457			if (bytes_read < (nbytes - 1))
458				i2c_sendack();
459		}
460		/*
461		 * last received byte needs to be nacked
462		 * instead of acked
463		 */
464		i2c_sendnack();
465		/*
466		 * end sequence
467		 */
468		i2c_stop();
469	} while (error && cntr--);
470
471	spin_unlock_irqrestore(&i2c_lock, flags);
472
473	return -error;
474}
475
476/*#---------------------------------------------------------------------------
477*#
478*# FUNCTION NAME: i2c_writereg
479*#
480*# DESCRIPTION  : Writes a value to an I2C device
481*#
482*#--------------------------------------------------------------------------*/
483int
484i2c_writereg(unsigned char theSlave, unsigned char theReg,
485	     unsigned char theValue)
486{
487	int error, cntr = 3;
488	unsigned long flags;
489
490	spin_lock_irqsave(&i2c_lock, flags);
491
492	do {
493		error = 0;
494
495		i2c_start();
496		/*
497		 * send slave address
498		 */
499		i2c_outbyte((theSlave & 0xfe));
500		/*
501		 * wait for ack
502		 */
503		if(!i2c_getack())
504			error = 1;
505		/*
506		 * now select register
507		 */
508		i2c_dir_out();
509		i2c_outbyte(theReg);
510		/*
511		 * now it's time to wait for ack
512		 */
513		if(!i2c_getack())
514			error |= 2;
515		/*
516		 * send register register data
517		 */
518		i2c_outbyte(theValue);
519		/*
520		 * now it's time to wait for ack
521		 */
522		if(!i2c_getack())
523			error |= 4;
524		/*
525		 * end byte stream
526		 */
527		i2c_stop();
528	} while(error && cntr--);
529
530	i2c_delay(CLOCK_LOW_TIME);
531
532	spin_unlock_irqrestore(&i2c_lock, flags);
533
534	return -error;
535}
536
537/*#---------------------------------------------------------------------------
538*#
539*# FUNCTION NAME: i2c_readreg
540*#
541*# DESCRIPTION  : Reads a value from the decoder registers.
542*#
543*#--------------------------------------------------------------------------*/
544unsigned char
545i2c_readreg(unsigned char theSlave, unsigned char theReg)
546{
547	unsigned char b = 0;
548	int error, cntr = 3;
549	unsigned long flags;
550
551	spin_lock_irqsave(&i2c_lock, flags);
552
553	do {
554		error = 0;
555		/*
556		 * generate start condition
557		 */
558		i2c_start();
559
560		/*
561		 * send slave address
562		 */
563		i2c_outbyte((theSlave & 0xfe));
564		/*
565		 * wait for ack
566		 */
567		if(!i2c_getack())
568			error = 1;
569		/*
570		 * now select register
571		 */
572		i2c_dir_out();
573		i2c_outbyte(theReg);
574		/*
575		 * now it's time to wait for ack
576		 */
577		if(!i2c_getack())
578			error |= 2;
579		/*
580		 * repeat start condition
581		 */
582		i2c_delay(CLOCK_LOW_TIME);
583		i2c_start();
584		/*
585		 * send slave address
586		 */
587		i2c_outbyte(theSlave | 0x01);
588		/*
589		 * wait for ack
590		 */
591		if(!i2c_getack())
592			error |= 4;
593		/*
594		 * fetch register
595		 */
596		b = i2c_inbyte();
597		/*
598		 * last received byte needs to be nacked
599		 * instead of acked
600		 */
601		i2c_sendnack();
602		/*
603		 * end sequence
604		 */
605		i2c_stop();
606
607	} while(error && cntr--);
608
609	spin_unlock_irqrestore(&i2c_lock, flags);
610
611	return b;
612}
613
614static int
615i2c_open(struct inode *inode, struct file *filp)
616{
617	return 0;
618}
619
620static int
621i2c_release(struct inode *inode, struct file *filp)
622{
623	return 0;
624}
625
626/* Main device API. ioctl's to write or read to/from i2c registers.
627 */
628
629static long
630i2c_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
631{
632	int ret;
633	if(_IOC_TYPE(cmd) != ETRAXI2C_IOCTYPE) {
634		return -ENOTTY;
635	}
636
637	switch (_IOC_NR(cmd)) {
638		case I2C_WRITEREG:
639			/* write to an i2c slave */
640			D(printk("i2cw %d %d %d\n",
641				 I2C_ARGSLAVE(arg),
642				 I2C_ARGREG(arg),
643				 I2C_ARGVALUE(arg)));
644
645			mutex_lock(&i2c_mutex);
646			ret = i2c_writereg(I2C_ARGSLAVE(arg),
647					    I2C_ARGREG(arg),
648					    I2C_ARGVALUE(arg));
649			mutex_unlock(&i2c_mutex);
650			return ret;
651
652		case I2C_READREG:
653		{
654			unsigned char val;
655			/* read from an i2c slave */
656			D(printk("i2cr %d %d ",
657				I2C_ARGSLAVE(arg),
658				I2C_ARGREG(arg)));
659			mutex_lock(&i2c_mutex);
660			val = i2c_readreg(I2C_ARGSLAVE(arg), I2C_ARGREG(arg));
661			mutex_unlock(&i2c_mutex);
662			D(printk("= %d\n", val));
663			return val;
664		}
665		default:
666			return -EINVAL;
667
668	}
669
670	return 0;
671}
672
673static const struct file_operations i2c_fops = {
674	.owner		= THIS_MODULE,
675	.unlocked_ioctl = i2c_ioctl,
676	.open		= i2c_open,
677	.release	= i2c_release,
678};
679
680static int __init i2c_init(void)
681{
682	static int res;
683	static int first = 1;
684
685	if (!first)
686		return res;
687
688	first = 0;
689
690	/* Setup and enable the DATA and CLK pins */
691
692	res = crisv32_io_get_name(&cris_i2c_data,
693		CONFIG_ETRAX_V32_I2C_DATA_PORT);
694	if (res < 0)
695		return res;
696
697	res = crisv32_io_get_name(&cris_i2c_clk, CONFIG_ETRAX_V32_I2C_CLK_PORT);
698	crisv32_io_set_dir(&cris_i2c_clk, crisv32_io_dir_out);
699
700	return res;
701}
702
703
704static int __init i2c_register(void)
705{
706	int res;
707
708	res = i2c_init();
709	if (res < 0)
710		return res;
711
712	/* register char device */
713
714	res = register_chrdev(I2C_MAJOR, i2c_name, &i2c_fops);
715	if (res < 0) {
716		printk(KERN_ERR "i2c: couldn't get a major number.\n");
717		return res;
718	}
719
720	printk(KERN_INFO
721		"I2C driver v2.2, (c) 1999-2007 Axis Communications AB\n");
722
723	return 0;
724}
725/* this makes sure that i2c_init is called during boot */
726module_init(i2c_register);
727
728/****************** END OF FILE i2c.c ********************************/
729