1/* 2 * Board-specific setup code for the ATNGW100 Network Gateway 3 * 4 * Copyright (C) 2005-2006 Atmel Corporation 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10#include <linux/clk.h> 11#include <linux/etherdevice.h> 12#include <linux/gpio.h> 13#include <linux/irq.h> 14#include <linux/i2c.h> 15#include <linux/i2c-gpio.h> 16#include <linux/init.h> 17#include <linux/linkage.h> 18#include <linux/platform_device.h> 19#include <linux/types.h> 20#include <linux/leds.h> 21#include <linux/spi/spi.h> 22#include <linux/atmel-mci.h> 23#include <linux/usb/atmel_usba_udc.h> 24 25#include <asm/io.h> 26#include <asm/setup.h> 27 28#include <mach/at32ap700x.h> 29#include <mach/board.h> 30#include <mach/init.h> 31#include <mach/portmux.h> 32 33/* Oscillator frequencies. These are board-specific */ 34unsigned long at32_board_osc_rates[3] = { 35 [0] = 32768, /* 32.768 kHz on RTC osc */ 36 [1] = 20000000, /* 20 MHz on osc0 */ 37 [2] = 12000000, /* 12 MHz on osc1 */ 38}; 39 40/* 41 * The ATNGW100 mkII is very similar to the ATNGW100. Both have the AT32AP7000 42 * chip on board; the difference is that the ATNGW100 mkII has 128 MB 32-bit 43 * SDRAM (the ATNGW100 has 32 MB 16-bit SDRAM) and 256 MB 16-bit NAND flash 44 * (the ATNGW100 has none.) 45 * 46 * The RAM difference is handled by the boot loader, so the only difference we 47 * end up handling here is the NAND flash, EBI pin reservation and if LCDC or 48 * MACB1 should be enabled. 49 */ 50#ifdef CONFIG_BOARD_ATNGW100_MKII 51#include <linux/mtd/partitions.h> 52#include <mach/smc.h> 53 54static struct smc_timing nand_timing __initdata = { 55 .ncs_read_setup = 0, 56 .nrd_setup = 10, 57 .ncs_write_setup = 0, 58 .nwe_setup = 10, 59 60 .ncs_read_pulse = 30, 61 .nrd_pulse = 15, 62 .ncs_write_pulse = 30, 63 .nwe_pulse = 15, 64 65 .read_cycle = 30, 66 .write_cycle = 30, 67 68 .ncs_read_recover = 0, 69 .nrd_recover = 15, 70 .ncs_write_recover = 0, 71 /* WE# high -> RE# low min 60 ns */ 72 .nwe_recover = 50, 73}; 74 75static struct smc_config nand_config __initdata = { 76 .bus_width = 2, 77 .nrd_controlled = 1, 78 .nwe_controlled = 1, 79 .nwait_mode = 0, 80 .byte_write = 0, 81 .tdf_cycles = 2, 82 .tdf_mode = 0, 83}; 84 85static struct mtd_partition nand_partitions[] = { 86 { 87 .name = "main", 88 .offset = 0x00000000, 89 .size = MTDPART_SIZ_FULL, 90 }, 91}; 92 93static struct mtd_partition *nand_part_info(int size, int *num_partitions) 94{ 95 *num_partitions = ARRAY_SIZE(nand_partitions); 96 return nand_partitions; 97} 98 99static struct atmel_nand_data atngw100mkii_nand_data __initdata = { 100 .cle = 21, 101 .ale = 22, 102 .rdy_pin = GPIO_PIN_PB(28), 103 .enable_pin = GPIO_PIN_PE(23), 104 .bus_width_16 = true, 105 .partition_info = nand_part_info, 106}; 107#endif 108 109/* Initialized by bootloader-specific startup code. */ 110struct tag *bootloader_tags __initdata; 111 112struct eth_addr { 113 u8 addr[6]; 114}; 115static struct eth_addr __initdata hw_addr[2]; 116static struct eth_platform_data __initdata eth_data[2]; 117 118static struct spi_board_info spi0_board_info[] __initdata = { 119 { 120 .modalias = "mtd_dataflash", 121 .max_speed_hz = 8000000, 122 .chip_select = 0, 123 }, 124}; 125 126static struct mci_platform_data __initdata mci0_data = { 127 .slot[0] = { 128 .bus_width = 4, 129#if defined(CONFIG_BOARD_ATNGW100_MKII) 130 .detect_pin = GPIO_PIN_PC(25), 131 .wp_pin = GPIO_PIN_PE(22), 132#else 133 .detect_pin = GPIO_PIN_PC(25), 134 .wp_pin = GPIO_PIN_PE(0), 135#endif 136 }, 137}; 138 139static struct usba_platform_data atngw100_usba_data __initdata = { 140#if defined(CONFIG_BOARD_ATNGW100_MKII) 141 .vbus_pin = GPIO_PIN_PE(26), 142#else 143 .vbus_pin = -ENODEV, 144#endif 145}; 146 147/* 148 * The next two functions should go away as the boot loader is 149 * supposed to initialize the macb address registers with a valid 150 * ethernet address. But we need to keep it around for a while until 151 * we can be reasonably sure the boot loader does this. 152 * 153 * The phy_id is ignored as the driver will probe for it. 154 */ 155static int __init parse_tag_ethernet(struct tag *tag) 156{ 157 int i; 158 159 i = tag->u.ethernet.mac_index; 160 if (i < ARRAY_SIZE(hw_addr)) 161 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address, 162 sizeof(hw_addr[i].addr)); 163 164 return 0; 165} 166__tagtable(ATAG_ETHERNET, parse_tag_ethernet); 167 168static void __init set_hw_addr(struct platform_device *pdev) 169{ 170 struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 171 const u8 *addr; 172 void __iomem *regs; 173 struct clk *pclk; 174 175 if (!res) 176 return; 177 if (pdev->id >= ARRAY_SIZE(hw_addr)) 178 return; 179 180 addr = hw_addr[pdev->id].addr; 181 if (!is_valid_ether_addr(addr)) 182 return; 183 184 /* 185 * Since this is board-specific code, we'll cheat and use the 186 * physical address directly as we happen to know that it's 187 * the same as the virtual address. 188 */ 189 regs = (void __iomem __force *)res->start; 190 pclk = clk_get(&pdev->dev, "pclk"); 191 if (!pclk) 192 return; 193 194 clk_enable(pclk); 195 __raw_writel((addr[3] << 24) | (addr[2] << 16) 196 | (addr[1] << 8) | addr[0], regs + 0x98); 197 __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c); 198 clk_disable(pclk); 199 clk_put(pclk); 200} 201 202void __init setup_board(void) 203{ 204 at32_map_usart(1, 0, 0); /* USART 1: /dev/ttyS0, DB9 */ 205 at32_setup_serial_console(0); 206} 207 208static const struct gpio_led ngw_leds[] = { 209 { .name = "sys", .gpio = GPIO_PIN_PA(16), .active_low = 1, 210 .default_trigger = "heartbeat", 211 }, 212 { .name = "a", .gpio = GPIO_PIN_PA(19), .active_low = 1, }, 213 { .name = "b", .gpio = GPIO_PIN_PE(19), .active_low = 1, }, 214}; 215 216static const struct gpio_led_platform_data ngw_led_data = { 217 .num_leds = ARRAY_SIZE(ngw_leds), 218 .leds = (void *) ngw_leds, 219}; 220 221static struct platform_device ngw_gpio_leds = { 222 .name = "leds-gpio", 223 .id = -1, 224 .dev = { 225 .platform_data = (void *) &ngw_led_data, 226 } 227}; 228 229static struct i2c_gpio_platform_data i2c_gpio_data = { 230 .sda_pin = GPIO_PIN_PA(6), 231 .scl_pin = GPIO_PIN_PA(7), 232 .sda_is_open_drain = 1, 233 .scl_is_open_drain = 1, 234 .udelay = 2, /* close to 100 kHz */ 235}; 236 237static struct platform_device i2c_gpio_device = { 238 .name = "i2c-gpio", 239 .id = 0, 240 .dev = { 241 .platform_data = &i2c_gpio_data, 242 }, 243}; 244 245static struct i2c_board_info __initdata i2c_info[] = { 246 /* NOTE: original ATtiny24 firmware is at address 0x0b */ 247}; 248 249static int __init atngw100_init(void) 250{ 251 unsigned i; 252 253 /* 254 * ATNGW100 mkII uses 32-bit SDRAM interface. Reserve the 255 * SDRAM-specific pins so that nobody messes with them. 256 */ 257#ifdef CONFIG_BOARD_ATNGW100_MKII 258 at32_reserve_pin(GPIO_PIOE_BASE, ATMEL_EBI_PE_DATA_ALL); 259 260 smc_set_timing(&nand_config, &nand_timing); 261 smc_set_configuration(3, &nand_config); 262 at32_add_device_nand(0, &atngw100mkii_nand_data); 263#endif 264 265 at32_add_device_usart(0); 266 267 set_hw_addr(at32_add_device_eth(0, ð_data[0])); 268#ifndef CONFIG_BOARD_ATNGW100_MKII_LCD 269 set_hw_addr(at32_add_device_eth(1, ð_data[1])); 270#endif 271 272 at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); 273 at32_add_device_mci(0, &mci0_data); 274 at32_add_device_usba(0, &atngw100_usba_data); 275 276 for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { 277 at32_select_gpio(ngw_leds[i].gpio, 278 AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); 279 } 280 platform_device_register(&ngw_gpio_leds); 281 282 /* all these i2c/smbus pins should have external pullups for 283 * open-drain sharing among all I2C devices. SDA and SCL do; 284 * PB28/EXTINT3 (ATNGW100) and PE21 (ATNGW100 mkII) doesn't; it should 285 * be SMBALERT# (for PMBus), but it's not available off-board. 286 */ 287#ifdef CONFIG_BOARD_ATNGW100_MKII 288 at32_select_periph(GPIO_PIOE_BASE, 1 << 21, 0, AT32_GPIOF_PULLUP); 289#else 290 at32_select_periph(GPIO_PIOB_BASE, 1 << 28, 0, AT32_GPIOF_PULLUP); 291#endif 292 at32_select_gpio(i2c_gpio_data.sda_pin, 293 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); 294 at32_select_gpio(i2c_gpio_data.scl_pin, 295 AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); 296 platform_device_register(&i2c_gpio_device); 297 i2c_register_board_info(0, i2c_info, ARRAY_SIZE(i2c_info)); 298 299 return 0; 300} 301postcore_initcall(atngw100_init); 302 303static int __init atngw100_arch_init(void) 304{ 305 /* PB30 (ATNGW100) and PE30 (ATNGW100 mkII) is the otherwise unused 306 * jumper on the mainboard, with an external pullup; the jumper grounds 307 * it. Use it however you like, including letting U-Boot or Linux tweak 308 * boot sequences. 309 */ 310#ifdef CONFIG_BOARD_ATNGW100_MKII 311 at32_select_gpio(GPIO_PIN_PE(30), 0); 312 gpio_request(GPIO_PIN_PE(30), "j15"); 313 gpio_direction_input(GPIO_PIN_PE(30)); 314 gpio_export(GPIO_PIN_PE(30), false); 315#else 316 at32_select_gpio(GPIO_PIN_PB(30), 0); 317 gpio_request(GPIO_PIN_PB(30), "j15"); 318 gpio_direction_input(GPIO_PIN_PB(30)); 319 gpio_export(GPIO_PIN_PB(30), false); 320#endif 321 322 /* set_irq_type() after the arch_initcall for EIC has run, and 323 * before the I2C subsystem could try using this IRQ. 324 */ 325 return set_irq_type(AT32_EXTINT(3), IRQ_TYPE_EDGE_FALLING); 326} 327arch_initcall(atngw100_arch_init); 328