1/* 2 * Common io.c file 3 * This file is created by Russell King <rmk+kernel@arm.linux.org.uk> 4 * 5 * Copyright (C) 2009 Texas Instruments 6 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12#include <linux/module.h> 13#include <linux/io.h> 14#include <linux/mm.h> 15 16#include <plat/omap7xx.h> 17#include <plat/omap1510.h> 18#include <plat/omap16xx.h> 19#include <plat/omap24xx.h> 20#include <plat/omap34xx.h> 21#include <plat/omap44xx.h> 22 23#define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz))) 24#define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst))) 25 26/* 27 * Intercept ioremap() requests for addresses in our fixed mapping regions. 28 */ 29void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type) 30{ 31#ifdef CONFIG_ARCH_OMAP1 32 if (cpu_class_is_omap1()) { 33 if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE)) 34 return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT); 35 } 36 if (cpu_is_omap7xx()) { 37 if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE)) 38 return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START); 39 40 if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE)) 41 return XLATE(p, OMAP7XX_DSPREG_BASE, 42 OMAP7XX_DSPREG_START); 43 } 44 if (cpu_is_omap15xx()) { 45 if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE)) 46 return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START); 47 48 if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE)) 49 return XLATE(p, OMAP1510_DSPREG_BASE, 50 OMAP1510_DSPREG_START); 51 } 52 if (cpu_is_omap16xx()) { 53 if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE)) 54 return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START); 55 56 if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE)) 57 return XLATE(p, OMAP16XX_DSPREG_BASE, 58 OMAP16XX_DSPREG_START); 59 } 60#endif 61#ifdef CONFIG_ARCH_OMAP2 62 if (cpu_is_omap24xx()) { 63 if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE)) 64 return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT); 65 if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE)) 66 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT); 67 } 68 if (cpu_is_omap2420()) { 69 if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE)) 70 return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT); 71 if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE)) 72 return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE); 73 if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE)) 74 return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT); 75 } 76 if (cpu_is_omap2430()) { 77 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE)) 78 return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT); 79 if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE)) 80 return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT); 81 if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE)) 82 return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT); 83 if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE)) 84 return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT); 85 } 86#endif 87#ifdef CONFIG_ARCH_OMAP3 88 if (cpu_is_omap34xx()) { 89 if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE)) 90 return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT); 91 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE)) 92 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT); 93 if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE)) 94 return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT); 95 if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE)) 96 return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT); 97 if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE)) 98 return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT); 99 if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE)) 100 return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT); 101 if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE)) 102 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT); 103 } 104#endif 105#ifdef CONFIG_ARCH_OMAP4 106 if (cpu_is_omap44xx()) { 107 if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE)) 108 return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT); 109 if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE)) 110 return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT); 111 if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE)) 112 return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT); 113 if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE)) 114 return XLATE(p, OMAP44XX_EMIF1_PHYS, \ 115 OMAP44XX_EMIF1_VIRT); 116 if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE)) 117 return XLATE(p, OMAP44XX_EMIF2_PHYS, \ 118 OMAP44XX_EMIF2_VIRT); 119 if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE)) 120 return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT); 121 if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE)) 122 return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT); 123 if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE)) 124 return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT); 125 } 126#endif 127 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0)); 128} 129EXPORT_SYMBOL(omap_ioremap); 130 131void omap_iounmap(volatile void __iomem *addr) 132{ 133 unsigned long virt = (unsigned long)addr; 134 135 if (virt >= VMALLOC_START && virt < VMALLOC_END) 136 __iounmap(addr); 137} 138EXPORT_SYMBOL(omap_iounmap); 139 140/* 141 * NOTE: Please use ioremap + __raw_read/write where possible instead of these 142 */ 143 144u8 omap_readb(u32 pa) 145{ 146 if (cpu_class_is_omap1()) 147 return __raw_readb(OMAP1_IO_ADDRESS(pa)); 148 else 149 return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); 150} 151EXPORT_SYMBOL(omap_readb); 152 153u16 omap_readw(u32 pa) 154{ 155 if (cpu_class_is_omap1()) 156 return __raw_readw(OMAP1_IO_ADDRESS(pa)); 157 else 158 return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); 159} 160EXPORT_SYMBOL(omap_readw); 161 162u32 omap_readl(u32 pa) 163{ 164 if (cpu_class_is_omap1()) 165 return __raw_readl(OMAP1_IO_ADDRESS(pa)); 166 else 167 return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); 168} 169EXPORT_SYMBOL(omap_readl); 170 171void omap_writeb(u8 v, u32 pa) 172{ 173 if (cpu_class_is_omap1()) 174 __raw_writeb(v, OMAP1_IO_ADDRESS(pa)); 175 else 176 __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); 177} 178EXPORT_SYMBOL(omap_writeb); 179 180void omap_writew(u16 v, u32 pa) 181{ 182 if (cpu_class_is_omap1()) 183 __raw_writew(v, OMAP1_IO_ADDRESS(pa)); 184 else 185 __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); 186} 187EXPORT_SYMBOL(omap_writew); 188 189void omap_writel(u32 v, u32 pa) 190{ 191 if (cpu_class_is_omap1()) 192 __raw_writel(v, OMAP1_IO_ADDRESS(pa)); 193 else 194 __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); 195} 196EXPORT_SYMBOL(omap_writel); 197