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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-mxc/include/mach/
1/* arch/arm/mach-imx/include/mach/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 *  Copyright (C) 1994-1999 Russell King
6 *  Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13#define IMX_NEEDS_DEPRECATED_SYMBOLS
14
15#ifdef CONFIG_ARCH_MX1
16#include <mach/mx1.h>
17#define UART_PADDR	UART1_BASE_ADDR
18#define UART_VADDR	IO_ADDRESS(UART1_BASE_ADDR)
19#endif
20
21#ifdef CONFIG_ARCH_MX25
22#ifdef UART_PADDR
23#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
24#endif
25#include <mach/mx25.h>
26#define UART_PADDR	MX25_UART1_BASE_ADDR
27#define UART_VADDR	MX25_AIPS1_IO_ADDRESS(MX25_UART1_BASE_ADDR)
28#endif
29
30#ifdef CONFIG_ARCH_MX2
31#ifdef UART_PADDR
32#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
33#endif
34#include <mach/mx2x.h>
35#define UART_PADDR	UART1_BASE_ADDR
36#define UART_VADDR	AIPI_IO_ADDRESS(UART1_BASE_ADDR)
37#endif
38
39#ifdef CONFIG_ARCH_MX3
40#ifdef UART_PADDR
41#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
42#endif
43#include <mach/mx3x.h>
44#define UART_PADDR	UART1_BASE_ADDR
45#define UART_VADDR	AIPS1_IO_ADDRESS(UART1_BASE_ADDR)
46#endif
47
48#ifdef CONFIG_ARCH_MX5
49#ifdef UART_PADDR
50#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
51#endif
52#include <mach/mx51.h>
53#define UART_PADDR	MX51_UART1_BASE_ADDR
54#define UART_VADDR	MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR)
55#endif
56
57#ifdef CONFIG_ARCH_MXC91231
58#ifdef UART_PADDR
59#error "CONFIG_DEBUG_LL is incompatible with multiple archs"
60#endif
61#include <mach/mxc91231.h>
62#define UART_PADDR	MXC91231_UART2_BASE_ADDR
63#define UART_VADDR	MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR)
64#endif
65		.macro	addruart, rx, tmp
66		mrc	p15, 0, \rx, c1, c0
67		tst	\rx, #1			@ MMU enabled?
68		ldreq	\rx, =UART_PADDR	@ physical
69		ldrne	\rx, =UART_VADDR	@ virtual
70		.endm
71
72		.macro	senduart,rd,rx
73		str	\rd, [\rx, #0x40]	@ TXDATA
74		.endm
75
76		.macro	waituart,rd,rx
77		.endm
78
79		.macro	busyuart,rd,rx
801002:		ldr	\rd, [\rx, #0x98]	@ SR2
81		tst	\rd, #1 << 3		@ TXDC
82		beq	1002b			@ wait until transmit done
83		.endm
84