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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-brcm/include/mach/
1#ifndef __MACH_IO_MAP_H
2#define __MACH_IO_MAP_H	__FILE__
3
4#include <asm/memory.h>
5#include <asm/page.h>
6#include <mach/vmalloc.h>
7#include <plat/plat-bcm5301x.h>
8
9/*
10 * This is the address of the UART used for low-level debug,
11 * a.k.a. EARLY_PRINTK, and it must be known at compile time,
12 * so it can be used in early uncompression and assembly code.
13 * It is now defined in platform Kconfig, and verified in
14 * SoC-level platform "C" file.
15 */
16#ifdef	CONFIG_DEBUG_LL
17#ifdef	CONFIG_DEBUG_UART_ADDR
18#define	PLAT_LLDEBUG_UART_PA	CONFIG_DEBUG_UART_ADDR
19#else
20#error	Define CONFIG_DEBUG_UART_ADDR in Kconfig to use EARLY_PRINTK
21#endif
22#endif
23
24/*
25 * There are only a few fixed virtual I/O mappings we need.
26 * We shall place them after VMALLOC_END, and hope they do
27 * not conflict with CONSISTENT_BASE, the start of mapping for
28 * DMA memory.
29 */
30#define	PLAT_FIXMAP_BASE	(VMALLOC_END + (1<<20))
31#define	IO_BASE_VA	0xf1000000	/* Temp - K.I.S.S. */
32#define	IO_BASE_PA	(0xff000000 & PLAT_UART0_PA)
33
34#define	SOC_CHIPCOMON_A_BASE_VA	(SOC_CHIPCOMON_A_BASE_PA-IO_BASE_PA+IO_BASE_VA)
35#define	SOC_DMU_BASE_VA		(SOC_DMU_BASE_PA -IO_BASE_PA+IO_BASE_VA)
36
37#define	PLAT_UART0_OFF		(PLAT_UART0_PA-IO_BASE_PA)
38#define	PLAT_UART1_OFF		(PLAT_UART1_PA-IO_BASE_PA)
39#define	PLAT_UART2_OFF		(PLAT_UART2_PA-IO_BASE_PA)
40
41#define	PLAT_UART0_VA		(IO_BASE_VA + PLAT_UART0_OFF)
42#define	PLAT_UART1_VA		(IO_BASE_VA + PLAT_UART1_OFF)
43#define	PLAT_UART2_VA		(IO_BASE_VA + PLAT_UART2_OFF)
44
45#ifdef	CONFIG_DEBUG_LL
46#if	PLAT_LLDEBUG_UART_PA==PLAT_UART0_PA
47#define	PLAT_LLDEBUG_UART_VA		PLAT_UART0_VA
48#define	PLAT_LLDEBUG_UART_SH		2
49#elif	PLAT_LLDEBUG_UART_PA==PLAT_UART1_PA
50#define	PLAT_LLDEBUG_UART_VA		PLAT_UART1_VA
51#define	PLAT_LLDEBUG_UART_SH		0
52#elif	PLAT_LLDEBUG_UART_PA==PLAT_UART2_PA
53#define	PLAT_LLDEBUG_UART_VA		PLAT_UART2_VA
54#define	PLAT_LLDEBUG_UART_SH		0
55#else
56#error	Configured debug UART address does not match known devices
57#endif
58#endif	/* CONFIG_DEBUG_LL */
59
60
61
62/* Fixed virtual address for MPCORE registers
63 * (SCU, Gtimer, Ptimer, GIC) : 2 pages
64 */
65#define	MPCORE_BASE_VA		(PLAT_FIXMAP_BASE + (0<<20))
66
67/*
68 * This is only used in entry-macros.S
69 * Since we will map the MPCORE base at the same virtual address
70 * on all supported SoCs, then it should be acceptable to use
71 * the compile-time defined base address for the interrupt dispatcher
72 * assembly code using the above macros.
73 */
74#define	MPCORE_GIC_CPUIF_VA	(MPCORE_BASE_VA+MPCORE_GIC_CPUIF_OFF)
75
76#endif /*__MACH_IO_MAP_H */
77