1/* 2 * linux/arch/arm/mach-versatile/versatile_pb.c 3 * 4 * Copyright (C) 2004 ARM Limited 5 * Copyright (C) 2000 Deep Blue Solutions Ltd 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 */ 21 22#include <linux/init.h> 23#include <linux/device.h> 24#include <linux/sysdev.h> 25#include <linux/amba/bus.h> 26#include <linux/amba/pl061.h> 27#include <linux/amba/mmci.h> 28#include <linux/io.h> 29 30#include <mach/hardware.h> 31#include <asm/irq.h> 32#include <asm/mach-types.h> 33 34#include <asm/mach/arch.h> 35 36#include "core.h" 37 38#define IRQ_MMCI1A IRQ_VICSOURCE23 39 40static struct mmci_platform_data mmc1_plat_data = { 41 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 42 .status = mmc_status, 43 .gpio_wp = -1, 44 .gpio_cd = -1, 45}; 46 47static struct pl061_platform_data gpio2_plat_data = { 48 .gpio_base = 16, 49 .irq_base = IRQ_GPIO2_START, 50}; 51 52static struct pl061_platform_data gpio3_plat_data = { 53 .gpio_base = 24, 54 .irq_base = IRQ_GPIO3_START, 55}; 56 57#define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } 58#define UART3_DMA { 0x86, 0x87 } 59#define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } 60#define SCI1_DMA { 0x88, 0x89 } 61#define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } 62#define MMCI1_DMA { 0x85, 0 } 63 64/* 65 * These devices are connected via the core APB bridge 66 */ 67#define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } 68#define GPIO2_DMA { 0, 0 } 69#define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } 70#define GPIO3_DMA { 0, 0 } 71 72/* 73 * These devices are connected via the DMA APB bridge 74 */ 75 76/* FPGA Primecells */ 77AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); 78AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); 79AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); 80 81/* DevChip Primecells */ 82AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); 83AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); 84 85static struct amba_device *amba_devs[] __initdata = { 86 &uart3_device, 87 &gpio2_device, 88 &gpio3_device, 89 &sci1_device, 90 &mmc1_device, 91}; 92 93static void __init versatile_pb_init(void) 94{ 95 int i; 96 97 versatile_init(); 98 99 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { 100 struct amba_device *d = amba_devs[i]; 101 amba_device_register(d, &iomem_resource); 102 } 103} 104 105MACHINE_START(VERSATILE_PB, "ARM-Versatile PB") 106 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ 107 .phys_io = 0x101f1000, 108 .io_pg_offst = ((0xf11f1000) >> 18) & 0xfffc, 109 .boot_params = 0x00000100, 110 .map_io = versatile_map_io, 111 .init_irq = versatile_init_irq, 112 .timer = &versatile_timer, 113 .init_machine = versatile_pb_init, 114MACHINE_END 115