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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-tegra/
1/*
2 * arch/arm/mach-tegra/board-harmony.c
3 *
4 * Copyright (C) 2010 Google, Inc.
5 *
6 * Author:
7 *	Colin Cross <ccross@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16 * GNU General Public License for more details.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/io.h>
22
23#include <asm/hardware/cache-l2x0.h>
24
25#include <mach/iomap.h>
26
27#include "board.h"
28#include "clock.h"
29
30static __initdata struct tegra_clk_init_table common_clk_init_table[] = {
31	/* name		parent		rate		enabled */
32	{ "clk_m",	NULL,		0,		true },
33	{ "pll_p",	"clk_m",	216000000,	true },
34	{ "pll_p_out1",	"pll_p",	28800000,	true },
35	{ "pll_p_out2",	"pll_p",	48000000,	true },
36	{ "pll_p_out3",	"pll_p",	72000000,	true },
37	{ "pll_p_out4",	"pll_p",	108000000,	true },
38	{ "sys",	"pll_p_out4",	108000000,	true },
39	{ "hclk",	"sys",		108000000,	true },
40	{ "pclk",	"hclk",		54000000,	true },
41	{ NULL,		NULL,		0,		0},
42};
43
44void __init tegra_init_cache(void)
45{
46#ifdef CONFIG_CACHE_L2X0
47	void __iomem *p = IO_ADDRESS(TEGRA_ARM_PERIF_BASE) + 0x3000;
48
49	writel(0x331, p + L2X0_TAG_LATENCY_CTRL);
50	writel(0x441, p + L2X0_DATA_LATENCY_CTRL);
51
52	l2x0_init(p, 0x6C080001, 0x8200c3fe);
53#endif
54}
55
56void __init tegra_common_init(void)
57{
58	tegra_init_clock();
59	tegra_clk_init_from_table(common_clk_init_table);
60	tegra_init_cache();
61}
62