1/* 2 * arch/arm/mach-spear3xx/include/mach/spear.h 3 * 4 * SPEAr3xx Machine family specific definition 5 * 6 * Copyright (C) 2009 ST Microelectronics 7 * Viresh Kumar<viresh.kumar@st.com> 8 * 9 * This file is licensed under the terms of the GNU General Public 10 * License version 2. This program is licensed "as is" without any 11 * warranty of any kind, whether express or implied. 12 */ 13 14#ifndef __MACH_SPEAR3XX_H 15#define __MACH_SPEAR3XX_H 16 17#include <mach/hardware.h> 18#include <mach/spear300.h> 19#include <mach/spear310.h> 20#include <mach/spear320.h> 21 22#define SPEAR3XX_ML_SDRAM_BASE 0x00000000 23#define SPEAR3XX_ML_SDRAM_SIZE 0x40000000 24 25#define SPEAR3XX_ICM9_BASE 0xC0000000 26#define SPEAR3XX_ICM9_SIZE 0x10000000 27 28/* ICM1 - Low speed connection */ 29#define SPEAR3XX_ICM1_2_BASE 0xD0000000 30#define SPEAR3XX_ICM1_2_SIZE 0x10000000 31 32#define SPEAR3XX_ICM1_UART_BASE 0xD0000000 33#define VA_SPEAR3XX_ICM1_UART_BASE IO_ADDRESS(SPEAR3XX_ICM1_UART_BASE) 34#define SPEAR3XX_ICM1_UART_SIZE 0x00080000 35 36#define SPEAR3XX_ICM1_ADC_BASE 0xD0080000 37#define SPEAR3XX_ICM1_ADC_SIZE 0x00080000 38 39#define SPEAR3XX_ICM1_SSP_BASE 0xD0100000 40#define SPEAR3XX_ICM1_SSP_SIZE 0x00080000 41 42#define SPEAR3XX_ICM1_I2C_BASE 0xD0180000 43#define SPEAR3XX_ICM1_I2C_SIZE 0x00080000 44 45#define SPEAR3XX_ICM1_JPEG_BASE 0xD0800000 46#define SPEAR3XX_ICM1_JPEG_SIZE 0x00800000 47 48#define SPEAR3XX_ICM1_IRDA_BASE 0xD1000000 49#define SPEAR3XX_ICM1_IRDA_SIZE 0x00080000 50 51#define SPEAR3XX_ICM1_SRAM_BASE 0xD2800000 52#define SPEAR3XX_ICM1_SRAM_SIZE 0x05800000 53 54/* ICM2 - Application Subsystem */ 55#define SPEAR3XX_ICM2_HWACCEL0_BASE 0xD8800000 56#define SPEAR3XX_ICM2_HWACCEL0_SIZE 0x00800000 57 58#define SPEAR3XX_ICM2_HWACCEL1_BASE 0xD9000000 59#define SPEAR3XX_ICM2_HWACCEL1_SIZE 0x00800000 60 61/* ICM4 - High Speed Connection */ 62#define SPEAR3XX_ICM4_BASE 0xE0000000 63#define SPEAR3XX_ICM4_SIZE 0x08000000 64 65#define SPEAR3XX_ICM4_MII_BASE 0xE0800000 66#define SPEAR3XX_ICM4_MII_SIZE 0x00800000 67 68#define SPEAR3XX_ICM4_USBD_FIFO_BASE 0xE1000000 69#define SPEAR3XX_ICM4_USBD_FIFO_SIZE 0x00100000 70 71#define SPEAR3XX_ICM4_USBD_CSR_BASE 0xE1100000 72#define SPEAR3XX_ICM4_USBD_CSR_SIZE 0x00100000 73 74#define SPEAR3XX_ICM4_USBD_PLDT_BASE 0xE1200000 75#define SPEAR3XX_ICM4_USBD_PLDT_SIZE 0x00100000 76 77#define SPEAR3XX_ICM4_USB_EHCI0_1_BASE 0xE1800000 78#define SPEAR3XX_ICM4_USB_EHCI0_1_SIZE 0x00100000 79 80#define SPEAR3XX_ICM4_USB_OHCI0_BASE 0xE1900000 81#define SPEAR3XX_ICM4_USB_OHCI0_SIZE 0x00100000 82 83#define SPEAR3XX_ICM4_USB_OHCI1_BASE 0xE2100000 84#define SPEAR3XX_ICM4_USB_OHCI1_SIZE 0x00100000 85 86#define SPEAR3XX_ICM4_USB_ARB_BASE 0xE2800000 87#define SPEAR3XX_ICM4_USB_ARB_SIZE 0x00010000 88 89/* ML1 - Multi Layer CPU Subsystem */ 90#define SPEAR3XX_ICM3_ML1_2_BASE 0xF0000000 91#define SPEAR3XX_ICM3_ML1_2_SIZE 0x0F000000 92 93#define SPEAR3XX_ML1_TMR_BASE 0xF0000000 94#define SPEAR3XX_ML1_TMR_SIZE 0x00100000 95 96#define SPEAR3XX_ML1_VIC_BASE 0xF1100000 97#define VA_SPEAR3XX_ML1_VIC_BASE IO_ADDRESS(SPEAR3XX_ML1_VIC_BASE) 98#define SPEAR3XX_ML1_VIC_SIZE 0x00100000 99 100/* ICM3 - Basic Subsystem */ 101#define SPEAR3XX_ICM3_SMEM_BASE 0xF8000000 102#define SPEAR3XX_ICM3_SMEM_SIZE 0x04000000 103 104#define SPEAR3XX_ICM3_SMI_CTRL_BASE 0xFC000000 105#define SPEAR3XX_ICM3_SMI_CTRL_SIZE 0x00200000 106 107#define SPEAR3XX_ICM3_DMA_BASE 0xFC400000 108#define SPEAR3XX_ICM3_DMA_SIZE 0x00200000 109 110#define SPEAR3XX_ICM3_SDRAM_CTRL_BASE 0xFC600000 111#define SPEAR3XX_ICM3_SDRAM_CTRL_SIZE 0x00200000 112 113#define SPEAR3XX_ICM3_TMR0_BASE 0xFC800000 114#define SPEAR3XX_ICM3_TMR0_SIZE 0x00080000 115 116#define SPEAR3XX_ICM3_WDT_BASE 0xFC880000 117#define SPEAR3XX_ICM3_WDT_SIZE 0x00080000 118 119#define SPEAR3XX_ICM3_RTC_BASE 0xFC900000 120#define SPEAR3XX_ICM3_RTC_SIZE 0x00080000 121 122#define SPEAR3XX_ICM3_GPIO_BASE 0xFC980000 123#define SPEAR3XX_ICM3_GPIO_SIZE 0x00080000 124 125#define SPEAR3XX_ICM3_SYS_CTRL_BASE 0xFCA00000 126#define VA_SPEAR3XX_ICM3_SYS_CTRL_BASE IO_ADDRESS(SPEAR3XX_ICM3_SYS_CTRL_BASE) 127#define SPEAR3XX_ICM3_SYS_CTRL_SIZE 0x00080000 128 129#define SPEAR3XX_ICM3_MISC_REG_BASE 0xFCA80000 130#define VA_SPEAR3XX_ICM3_MISC_REG_BASE IO_ADDRESS(SPEAR3XX_ICM3_MISC_REG_BASE) 131#define SPEAR3XX_ICM3_MISC_REG_SIZE 0x00080000 132 133#define SPEAR3XX_ICM3_TMR1_BASE 0xFCB00000 134#define SPEAR3XX_ICM3_TMR1_SIZE 0x00080000 135 136/* Debug uart for linux, will be used for debug and uncompress messages */ 137#define SPEAR_DBG_UART_BASE SPEAR3XX_ICM1_UART_BASE 138#define VA_SPEAR_DBG_UART_BASE VA_SPEAR3XX_ICM1_UART_BASE 139 140/* Sysctl base for spear platform */ 141#define SPEAR_SYS_CTRL_BASE SPEAR3XX_ICM3_SYS_CTRL_BASE 142#define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR3XX_ICM3_SYS_CTRL_BASE 143 144#endif /* __MACH_SPEAR3XX_H */ 145