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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-orion5x/
1/*
2 * arch/arm/mach-orion5x/wrt350n-v2-setup.c
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2.  This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/platform_device.h>
12#include <linux/pci.h>
13#include <linux/irq.h>
14#include <linux/delay.h>
15#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/ethtool.h>
18#include <linux/leds.h>
19#include <linux/gpio_keys.h>
20#include <linux/input.h>
21#include <net/dsa.h>
22#include <asm/mach-types.h>
23#include <asm/gpio.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/pci.h>
26#include <mach/orion5x.h>
27#include "common.h"
28#include "mpp.h"
29
30/*
31 * LEDs attached to GPIO
32 */
33static struct gpio_led wrt350n_v2_led_pins[] = {
34	{
35		.name		= "wrt350nv2:green:power",
36		.gpio		= 0,
37		.active_low	= 1,
38	}, {
39		.name		= "wrt350nv2:green:security",
40		.gpio		= 1,
41		.active_low	= 1,
42	}, {
43		.name		= "wrt350nv2:orange:power",
44		.gpio		= 5,
45		.active_low	= 1,
46	}, {
47		.name		= "wrt350nv2:green:usb",
48		.gpio		= 6,
49		.active_low	= 1,
50	}, {
51		.name		= "wrt350nv2:green:wireless",
52		.gpio		= 7,
53		.active_low	= 1,
54	},
55};
56
57static struct gpio_led_platform_data wrt350n_v2_led_data = {
58	.leds		= wrt350n_v2_led_pins,
59	.num_leds	= ARRAY_SIZE(wrt350n_v2_led_pins),
60};
61
62static struct platform_device wrt350n_v2_leds = {
63	.name	= "leds-gpio",
64	.id	= -1,
65	.dev	= {
66		.platform_data	= &wrt350n_v2_led_data,
67	},
68};
69
70/*
71 * Buttons attached to GPIO
72 */
73static struct gpio_keys_button wrt350n_v2_buttons[] = {
74	{
75		.code		= KEY_RESTART,
76		.gpio		= 3,
77		.desc		= "Reset Button",
78		.active_low	= 1,
79	}, {
80		.code		= KEY_WPS_BUTTON,
81		.gpio		= 2,
82		.desc		= "WPS Button",
83		.active_low	= 1,
84	},
85};
86
87static struct gpio_keys_platform_data wrt350n_v2_button_data = {
88	.buttons	= wrt350n_v2_buttons,
89	.nbuttons	= ARRAY_SIZE(wrt350n_v2_buttons),
90};
91
92static struct platform_device wrt350n_v2_button_device = {
93	.name		= "gpio-keys",
94	.id		= -1,
95	.num_resources	= 0,
96	.dev		= {
97		.platform_data	= &wrt350n_v2_button_data,
98	},
99};
100
101/*
102 * General setup
103 */
104static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = {
105	{  0, MPP_GPIO },		/* Power LED green (0=on) */
106	{  1, MPP_GPIO },		/* Security LED (0=on) */
107	{  2, MPP_GPIO },		/* Internal Button (0=on) */
108	{  3, MPP_GPIO },		/* Reset Button (0=on) */
109	{  4, MPP_GPIO },		/* PCI int */
110	{  5, MPP_GPIO },		/* Power LED orange (0=on) */
111	{  6, MPP_GPIO },		/* USB LED (0=on) */
112	{  7, MPP_GPIO },		/* Wireless LED (0=on) */
113	{  8, MPP_UNUSED },		/* ??? */
114	{  9, MPP_GIGE },		/* GE_RXERR */
115	{ 10, MPP_UNUSED },		/* ??? */
116	{ 11, MPP_UNUSED },		/* ??? */
117	{ 12, MPP_GIGE },		/* GE_TXD[4] */
118	{ 13, MPP_GIGE },		/* GE_TXD[5] */
119	{ 14, MPP_GIGE },		/* GE_TXD[6] */
120	{ 15, MPP_GIGE },		/* GE_TXD[7] */
121	{ 16, MPP_GIGE },		/* GE_RXD[4] */
122	{ 17, MPP_GIGE },		/* GE_RXD[5] */
123	{ 18, MPP_GIGE },		/* GE_RXD[6] */
124	{ 19, MPP_GIGE },		/* GE_RXD[7] */
125	{ -1 },
126};
127
128/*
129 * 8M NOR flash Device bus boot chip select
130 */
131#define WRT350N_V2_NOR_BOOT_BASE	0xf4000000
132#define WRT350N_V2_NOR_BOOT_SIZE	SZ_8M
133
134static struct mtd_partition wrt350n_v2_nor_flash_partitions[] = {
135	{
136		.name		= "kernel",
137		.offset		= 0x00000000,
138		.size		= 0x00760000,
139	}, {
140		.name		= "rootfs",
141		.offset		= 0x001a0000,
142		.size		= 0x005c0000,
143	}, {
144		.name		= "lang",
145		.offset		= 0x00760000,
146		.size		= 0x00040000,
147	}, {
148		.name		= "nvram",
149		.offset		= 0x007a0000,
150		.size		= 0x00020000,
151	}, {
152		.name		= "u-boot",
153		.offset		= 0x007c0000,
154		.size		= 0x00040000,
155	},
156};
157
158static struct physmap_flash_data wrt350n_v2_nor_flash_data = {
159	.width		= 1,
160	.parts		= wrt350n_v2_nor_flash_partitions,
161	.nr_parts	= ARRAY_SIZE(wrt350n_v2_nor_flash_partitions),
162};
163
164static struct resource wrt350n_v2_nor_flash_resource = {
165	.flags		= IORESOURCE_MEM,
166	.start		= WRT350N_V2_NOR_BOOT_BASE,
167	.end		= WRT350N_V2_NOR_BOOT_BASE + WRT350N_V2_NOR_BOOT_SIZE - 1,
168};
169
170static struct platform_device wrt350n_v2_nor_flash = {
171	.name			= "physmap-flash",
172	.id			= 0,
173	.dev		= {
174		.platform_data	= &wrt350n_v2_nor_flash_data,
175	},
176	.num_resources		= 1,
177	.resource		= &wrt350n_v2_nor_flash_resource,
178};
179
180static struct mv643xx_eth_platform_data wrt350n_v2_eth_data = {
181	.phy_addr	= MV643XX_ETH_PHY_NONE,
182	.speed		= SPEED_1000,
183	.duplex		= DUPLEX_FULL,
184};
185
186static struct dsa_chip_data wrt350n_v2_switch_chip_data = {
187	.port_names[0]	= "lan2",
188	.port_names[1]	= "lan1",
189	.port_names[2]	= "wan",
190	.port_names[3]	= "cpu",
191	.port_names[5]	= "lan3",
192	.port_names[7]	= "lan4",
193};
194
195static struct dsa_platform_data wrt350n_v2_switch_plat_data = {
196	.nr_chips	= 1,
197	.chip		= &wrt350n_v2_switch_chip_data,
198};
199
200static void __init wrt350n_v2_init(void)
201{
202	/*
203	 * Setup basic Orion functions. Need to be called early.
204	 */
205	orion5x_init();
206
207	orion5x_mpp_conf(wrt350n_v2_mpp_modes);
208
209	/*
210	 * Configure peripherals.
211	 */
212	orion5x_ehci0_init();
213	orion5x_eth_init(&wrt350n_v2_eth_data);
214	orion5x_eth_switch_init(&wrt350n_v2_switch_plat_data, NO_IRQ);
215	orion5x_uart0_init();
216
217	orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
218				   WRT350N_V2_NOR_BOOT_SIZE);
219	platform_device_register(&wrt350n_v2_nor_flash);
220	platform_device_register(&wrt350n_v2_leds);
221	platform_device_register(&wrt350n_v2_button_device);
222}
223
224static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
225{
226	int irq;
227
228	/*
229	 * Check for devices with hard-wired IRQs.
230	 */
231	irq = orion5x_pci_map_irq(dev, slot, pin);
232	if (irq != -1)
233		return irq;
234
235	/*
236	 * Mini-PCI slot.
237	 */
238	if (slot == 7)
239		return gpio_to_irq(4);
240
241	return -1;
242}
243
244static struct hw_pci wrt350n_v2_pci __initdata = {
245	.nr_controllers	= 2,
246	.swizzle	= pci_std_swizzle,
247	.setup		= orion5x_pci_sys_setup,
248	.scan		= orion5x_pci_sys_scan_bus,
249	.map_irq	= wrt350n_v2_pci_map_irq,
250};
251
252static int __init wrt350n_v2_pci_init(void)
253{
254	if (machine_is_wrt350n_v2())
255		pci_common_init(&wrt350n_v2_pci);
256
257	return 0;
258}
259subsys_initcall(wrt350n_v2_pci_init);
260
261MACHINE_START(WRT350N_V2, "Linksys WRT350N v2")
262	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
263	.phys_io	= ORION5X_REGS_PHYS_BASE,
264	.io_pg_offst	= ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
265	.boot_params	= 0x00000100,
266	.init_machine	= wrt350n_v2_init,
267	.map_io		= orion5x_map_io,
268	.init_irq	= orion5x_init_irq,
269	.timer		= &orion5x_timer,
270	.fixup		= tag_fixup_mem32,
271MACHINE_END
272