1/* 2 * arch/arm/mach-orion5x/rd88f5182-setup.c 3 * 4 * Marvell Orion-NAS Reference Design Setup 5 * 6 * Maintainer: Ronen Shitrit <rshitrit@marvell.com> 7 * 8 * This file is licensed under the terms of the GNU General Public 9 * License version 2. This program is licensed "as is" without any 10 * warranty of any kind, whether express or implied. 11 */ 12 13#include <linux/kernel.h> 14#include <linux/init.h> 15#include <linux/platform_device.h> 16#include <linux/pci.h> 17#include <linux/irq.h> 18#include <linux/mtd/physmap.h> 19#include <linux/mv643xx_eth.h> 20#include <linux/ata_platform.h> 21#include <linux/i2c.h> 22#include <asm/mach-types.h> 23#include <asm/gpio.h> 24#include <asm/leds.h> 25#include <asm/mach/arch.h> 26#include <asm/mach/pci.h> 27#include <mach/orion5x.h> 28#include "common.h" 29#include "mpp.h" 30 31/***************************************************************************** 32 * RD-88F5182 Info 33 ****************************************************************************/ 34 35/* 36 * 512K NOR flash Device bus boot chip select 37 */ 38 39#define RD88F5182_NOR_BOOT_BASE 0xf4000000 40#define RD88F5182_NOR_BOOT_SIZE SZ_512K 41 42/* 43 * 16M NOR flash on Device bus chip select 1 44 */ 45 46#define RD88F5182_NOR_BASE 0xfc000000 47#define RD88F5182_NOR_SIZE SZ_16M 48 49/* 50 * PCI 51 */ 52 53#define RD88F5182_PCI_SLOT0_OFFS 7 54#define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7 55#define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6 56 57/* 58 * GPIO Debug LED 59 */ 60 61#define RD88F5182_GPIO_DBG_LED 0 62 63/***************************************************************************** 64 * 16M NOR Flash on Device bus CS1 65 ****************************************************************************/ 66 67static struct physmap_flash_data rd88f5182_nor_flash_data = { 68 .width = 1, 69}; 70 71static struct resource rd88f5182_nor_flash_resource = { 72 .flags = IORESOURCE_MEM, 73 .start = RD88F5182_NOR_BASE, 74 .end = RD88F5182_NOR_BASE + RD88F5182_NOR_SIZE - 1, 75}; 76 77static struct platform_device rd88f5182_nor_flash = { 78 .name = "physmap-flash", 79 .id = 0, 80 .dev = { 81 .platform_data = &rd88f5182_nor_flash_data, 82 }, 83 .num_resources = 1, 84 .resource = &rd88f5182_nor_flash_resource, 85}; 86 87#ifdef CONFIG_LEDS 88 89/***************************************************************************** 90 * Use GPIO debug led as CPU active indication 91 ****************************************************************************/ 92 93static void rd88f5182_dbgled_event(led_event_t evt) 94{ 95 int val; 96 97 if (evt == led_idle_end) 98 val = 1; 99 else if (evt == led_idle_start) 100 val = 0; 101 else 102 return; 103 104 gpio_set_value(RD88F5182_GPIO_DBG_LED, val); 105} 106 107static int __init rd88f5182_dbgled_init(void) 108{ 109 int pin; 110 111 if (machine_is_rd88f5182()) { 112 pin = RD88F5182_GPIO_DBG_LED; 113 114 if (gpio_request(pin, "DBGLED") == 0) { 115 if (gpio_direction_output(pin, 0) != 0) { 116 printk(KERN_ERR "rd88f5182_dbgled_init failed " 117 "to set output pin %d\n", pin); 118 gpio_free(pin); 119 return 0; 120 } 121 } else { 122 printk(KERN_ERR "rd88f5182_dbgled_init failed " 123 "to request gpio %d\n", pin); 124 return 0; 125 } 126 127 leds_event = rd88f5182_dbgled_event; 128 } 129 130 return 0; 131} 132 133__initcall(rd88f5182_dbgled_init); 134 135#endif 136 137/***************************************************************************** 138 * PCI 139 ****************************************************************************/ 140 141void __init rd88f5182_pci_preinit(void) 142{ 143 int pin; 144 145 /* 146 * Configure PCI GPIO IRQ pins 147 */ 148 pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; 149 if (gpio_request(pin, "PCI IntA") == 0) { 150 if (gpio_direction_input(pin) == 0) { 151 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 152 } else { 153 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 154 "set_irq_type pin %d\n", pin); 155 gpio_free(pin); 156 } 157 } else { 158 printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); 159 } 160 161 pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; 162 if (gpio_request(pin, "PCI IntB") == 0) { 163 if (gpio_direction_input(pin) == 0) { 164 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 165 } else { 166 printk(KERN_ERR "rd88f5182_pci_preinit faield to " 167 "set_irq_type pin %d\n", pin); 168 gpio_free(pin); 169 } 170 } else { 171 printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin); 172 } 173} 174 175static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) 176{ 177 int irq; 178 179 /* 180 * Check for devices with hard-wired IRQs. 181 */ 182 irq = orion5x_pci_map_irq(dev, slot, pin); 183 if (irq != -1) 184 return irq; 185 186 /* 187 * PCI IRQs are connected via GPIOs 188 */ 189 switch (slot - RD88F5182_PCI_SLOT0_OFFS) { 190 case 0: 191 if (pin == 1) 192 return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN); 193 else 194 return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN); 195 default: 196 return -1; 197 } 198} 199 200static struct hw_pci rd88f5182_pci __initdata = { 201 .nr_controllers = 2, 202 .preinit = rd88f5182_pci_preinit, 203 .swizzle = pci_std_swizzle, 204 .setup = orion5x_pci_sys_setup, 205 .scan = orion5x_pci_sys_scan_bus, 206 .map_irq = rd88f5182_pci_map_irq, 207}; 208 209static int __init rd88f5182_pci_init(void) 210{ 211 if (machine_is_rd88f5182()) 212 pci_common_init(&rd88f5182_pci); 213 214 return 0; 215} 216 217subsys_initcall(rd88f5182_pci_init); 218 219/***************************************************************************** 220 * Ethernet 221 ****************************************************************************/ 222 223static struct mv643xx_eth_platform_data rd88f5182_eth_data = { 224 .phy_addr = MV643XX_ETH_PHY_ADDR(8), 225}; 226 227/***************************************************************************** 228 * RTC DS1338 on I2C bus 229 ****************************************************************************/ 230static struct i2c_board_info __initdata rd88f5182_i2c_rtc = { 231 I2C_BOARD_INFO("ds1338", 0x68), 232}; 233 234/***************************************************************************** 235 * Sata 236 ****************************************************************************/ 237static struct mv_sata_platform_data rd88f5182_sata_data = { 238 .n_ports = 2, 239}; 240 241/***************************************************************************** 242 * General Setup 243 ****************************************************************************/ 244static struct orion5x_mpp_mode rd88f5182_mpp_modes[] __initdata = { 245 { 0, MPP_GPIO }, /* Debug Led */ 246 { 1, MPP_GPIO }, /* Reset Switch */ 247 { 2, MPP_UNUSED }, 248 { 3, MPP_GPIO }, /* RTC Int */ 249 { 4, MPP_GPIO }, 250 { 5, MPP_GPIO }, 251 { 6, MPP_GPIO }, /* PCI_intA */ 252 { 7, MPP_GPIO }, /* PCI_intB */ 253 { 8, MPP_UNUSED }, 254 { 9, MPP_UNUSED }, 255 { 10, MPP_UNUSED }, 256 { 11, MPP_UNUSED }, 257 { 12, MPP_SATA_LED }, /* SATA 0 presence */ 258 { 13, MPP_SATA_LED }, /* SATA 1 presence */ 259 { 14, MPP_SATA_LED }, /* SATA 0 active */ 260 { 15, MPP_SATA_LED }, /* SATA 1 active */ 261 { 16, MPP_UNUSED }, 262 { 17, MPP_UNUSED }, 263 { 18, MPP_UNUSED }, 264 { 19, MPP_UNUSED }, 265 { -1 }, 266}; 267 268static void __init rd88f5182_init(void) 269{ 270 /* 271 * Setup basic Orion functions. Need to be called early. 272 */ 273 orion5x_init(); 274 275 orion5x_mpp_conf(rd88f5182_mpp_modes); 276 277 /* 278 * MPP[20] PCI Clock to MV88F5182 279 * MPP[21] PCI Clock to mini PCI CON11 280 * MPP[22] USB 0 over current indication 281 * MPP[23] USB 1 over current indication 282 * MPP[24] USB 1 over current enable 283 * MPP[25] USB 0 over current enable 284 */ 285 286 /* 287 * Configure peripherals. 288 */ 289 orion5x_ehci0_init(); 290 orion5x_ehci1_init(); 291 orion5x_eth_init(&rd88f5182_eth_data); 292 orion5x_i2c_init(); 293 orion5x_sata_init(&rd88f5182_sata_data); 294 orion5x_uart0_init(); 295 orion5x_xor_init(); 296 297 orion5x_setup_dev_boot_win(RD88F5182_NOR_BOOT_BASE, 298 RD88F5182_NOR_BOOT_SIZE); 299 300 orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE); 301 platform_device_register(&rd88f5182_nor_flash); 302 303 i2c_register_board_info(0, &rd88f5182_i2c_rtc, 1); 304} 305 306MACHINE_START(RD88F5182, "Marvell Orion-NAS Reference Design") 307 /* Maintainer: Ronen Shitrit <rshitrit@marvell.com> */ 308 .phys_io = ORION5X_REGS_PHYS_BASE, 309 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC, 310 .boot_params = 0x00000100, 311 .init_machine = rd88f5182_init, 312 .map_io = orion5x_map_io, 313 .init_irq = orion5x_init_irq, 314 .timer = &orion5x_timer, 315MACHINE_END 316