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  • only in /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-imx/
1/*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20#include <linux/platform_device.h>
21#include <linux/io.h>
22#include <linux/i2c.h>
23#include <linux/i2c/at24.h>
24#include <linux/dma-mapping.h>
25#include <linux/spi/spi.h>
26#include <linux/spi/eeprom.h>
27#include <linux/irq.h>
28#include <linux/delay.h>
29#include <linux/gpio.h>
30#include <linux/usb/otg.h>
31#include <linux/usb/ulpi.h>
32#include <linux/fsl_devices.h>
33
34#include <asm/mach/arch.h>
35#include <asm/mach-types.h>
36#include <mach/common.h>
37#include <mach/hardware.h>
38#include <mach/iomux-mx27.h>
39#include <asm/mach/time.h>
40#include <mach/audmux.h>
41#include <mach/ssi.h>
42#include <mach/mxc_nand.h>
43#include <mach/irqs.h>
44#include <mach/mmc.h>
45#include <mach/mxc_ehci.h>
46#include <mach/ulpi.h>
47#include <mach/imxfb.h>
48
49#include "devices-imx27.h"
50#include "devices.h"
51
52#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
53#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
54#define SPI1_SS0 (GPIO_PORTD + 28)
55#define SPI1_SS1 (GPIO_PORTD + 27)
56#define SD2_CD (GPIO_PORTC + 29)
57
58static int pca100_pins[] = {
59	/* UART1 */
60	PE12_PF_UART1_TXD,
61	PE13_PF_UART1_RXD,
62	PE14_PF_UART1_CTS,
63	PE15_PF_UART1_RTS,
64	/* SDHC */
65	PB4_PF_SD2_D0,
66	PB5_PF_SD2_D1,
67	PB6_PF_SD2_D2,
68	PB7_PF_SD2_D3,
69	PB8_PF_SD2_CMD,
70	PB9_PF_SD2_CLK,
71	SD2_CD | GPIO_GPIO | GPIO_IN,
72	/* FEC */
73	PD0_AIN_FEC_TXD0,
74	PD1_AIN_FEC_TXD1,
75	PD2_AIN_FEC_TXD2,
76	PD3_AIN_FEC_TXD3,
77	PD4_AOUT_FEC_RX_ER,
78	PD5_AOUT_FEC_RXD1,
79	PD6_AOUT_FEC_RXD2,
80	PD7_AOUT_FEC_RXD3,
81	PD8_AF_FEC_MDIO,
82	PD9_AIN_FEC_MDC,
83	PD10_AOUT_FEC_CRS,
84	PD11_AOUT_FEC_TX_CLK,
85	PD12_AOUT_FEC_RXD0,
86	PD13_AOUT_FEC_RX_DV,
87	PD14_AOUT_FEC_RX_CLK,
88	PD15_AOUT_FEC_COL,
89	PD16_AIN_FEC_TX_ER,
90	PF23_AIN_FEC_TX_EN,
91	/* SSI1 */
92	PC20_PF_SSI1_FS,
93	PC21_PF_SSI1_RXD,
94	PC22_PF_SSI1_TXD,
95	PC23_PF_SSI1_CLK,
96	/* onboard I2C */
97	PC5_PF_I2C2_SDA,
98	PC6_PF_I2C2_SCL,
99	/* external I2C */
100	PD17_PF_I2C_DATA,
101	PD18_PF_I2C_CLK,
102	/* SPI1 */
103	PD25_PF_CSPI1_RDY,
104	PD29_PF_CSPI1_SCLK,
105	PD30_PF_CSPI1_MISO,
106	PD31_PF_CSPI1_MOSI,
107	/* OTG */
108	OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
109	PC7_PF_USBOTG_DATA5,
110	PC8_PF_USBOTG_DATA6,
111	PC9_PF_USBOTG_DATA0,
112	PC10_PF_USBOTG_DATA2,
113	PC11_PF_USBOTG_DATA1,
114	PC12_PF_USBOTG_DATA4,
115	PC13_PF_USBOTG_DATA3,
116	PE0_PF_USBOTG_NXT,
117	PE1_PF_USBOTG_STP,
118	PE2_PF_USBOTG_DIR,
119	PE24_PF_USBOTG_CLK,
120	PE25_PF_USBOTG_DATA7,
121	/* USBH2 */
122	USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
123	PA0_PF_USBH2_CLK,
124	PA1_PF_USBH2_DIR,
125	PA2_PF_USBH2_DATA7,
126	PA3_PF_USBH2_NXT,
127	PA4_PF_USBH2_STP,
128	PD19_AF_USBH2_DATA4,
129	PD20_AF_USBH2_DATA3,
130	PD21_AF_USBH2_DATA6,
131	PD22_AF_USBH2_DATA0,
132	PD23_AF_USBH2_DATA2,
133	PD24_AF_USBH2_DATA1,
134	PD26_AF_USBH2_DATA5,
135	/* display */
136	PA5_PF_LSCLK,
137	PA6_PF_LD0,
138	PA7_PF_LD1,
139	PA8_PF_LD2,
140	PA9_PF_LD3,
141	PA10_PF_LD4,
142	PA11_PF_LD5,
143	PA12_PF_LD6,
144	PA13_PF_LD7,
145	PA14_PF_LD8,
146	PA15_PF_LD9,
147	PA16_PF_LD10,
148	PA17_PF_LD11,
149	PA18_PF_LD12,
150	PA19_PF_LD13,
151	PA20_PF_LD14,
152	PA21_PF_LD15,
153	PA22_PF_LD16,
154	PA23_PF_LD17,
155	PA26_PF_PS,
156	PA28_PF_HSYNC,
157	PA29_PF_VSYNC,
158	PA31_PF_OE_ACD,
159	/* free GPIO */
160	GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
161	GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
162	GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
163};
164
165static const struct imxuart_platform_data uart_pdata __initconst = {
166	.flags = IMXUART_HAVE_RTSCTS,
167};
168
169static const struct mxc_nand_platform_data
170pca100_nand_board_info __initconst = {
171	.width = 1,
172	.hw_ecc = 1,
173};
174
175static struct platform_device *platform_devices[] __initdata = {
176	&mxc_w1_master_device,
177	&mxc_fec_device,
178	&mxc_wdt,
179};
180
181static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
182	.bitrate = 100000,
183};
184
185static struct at24_platform_data board_eeprom = {
186	.byte_len = 4096,
187	.page_size = 32,
188	.flags = AT24_FLAG_ADDR16,
189};
190
191static struct i2c_board_info pca100_i2c_devices[] = {
192	{
193		I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
194		.platform_data = &board_eeprom,
195	}, {
196		I2C_BOARD_INFO("rtc-pcf8563", 0x51),
197		.type = "pcf8563"
198	}, {
199		I2C_BOARD_INFO("lm75", 0x4a),
200		.type = "lm75"
201	}
202};
203
204#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
205static struct spi_eeprom at25320 = {
206	.name		= "at25320an",
207	.byte_len	= 4096,
208	.page_size	= 32,
209	.flags		= EE_ADDR2,
210};
211
212static struct spi_board_info pca100_spi_board_info[] __initdata = {
213	{
214		.modalias = "at25",
215		.max_speed_hz = 30000,
216		.bus_num = 0,
217		.chip_select = 1,
218		.platform_data = &at25320,
219	},
220};
221
222static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
223
224static const struct spi_imx_master pca100_spi0_data __initconst = {
225	.chipselect	= pca100_spi_cs,
226	.num_chipselect = ARRAY_SIZE(pca100_spi_cs),
227};
228#endif
229
230static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
231{
232	mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
233	gpio_set_value(GPIO_PORTC + 20, 1);
234	udelay(2);
235	gpio_set_value(GPIO_PORTC + 20, 0);
236	mxc_gpio_mode(PC20_PF_SSI1_FS);
237	msleep(2);
238}
239
240static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
241{
242	mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);  /* FS */
243	gpio_set_value(GPIO_PORTC + 20, 0);
244	mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT);  /* TX */
245	gpio_set_value(GPIO_PORTC + 22, 0);
246	mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT);  /* reset */
247	gpio_set_value(GPIO_PORTC + 28, 0);
248	udelay(10);
249	gpio_set_value(GPIO_PORTC + 28, 1);
250	mxc_gpio_mode(PC20_PF_SSI1_FS);
251	mxc_gpio_mode(PC22_PF_SSI1_TXD);
252	msleep(2);
253}
254
255static struct imx_ssi_platform_data pca100_ssi_pdata = {
256	.ac97_reset		= pca100_ac97_cold_reset,
257	.ac97_warm_reset	= pca100_ac97_warm_reset,
258	.flags			= IMX_SSI_USE_AC97,
259};
260
261static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
262		void *data)
263{
264	int ret;
265
266	ret = request_irq(IRQ_GPIOC(29), detect_irq,
267			  IRQF_DISABLED | IRQF_TRIGGER_FALLING,
268			  "imx-mmc-detect", data);
269	if (ret)
270		printk(KERN_ERR
271			"pca100: Failed to reuest irq for sd/mmc detection\n");
272
273	return ret;
274}
275
276static void pca100_sdhc2_exit(struct device *dev, void *data)
277{
278	free_irq(IRQ_GPIOC(29), data);
279}
280
281static struct imxmmc_platform_data sdhc_pdata = {
282	.init = pca100_sdhc2_init,
283	.exit = pca100_sdhc2_exit,
284};
285
286#if defined(CONFIG_USB_ULPI)
287static int otg_phy_init(struct platform_device *pdev)
288{
289	gpio_set_value(OTG_PHY_CS_GPIO, 0);
290	return 0;
291}
292
293static struct mxc_usbh_platform_data otg_pdata = {
294	.init	= otg_phy_init,
295	.portsc	= MXC_EHCI_MODE_ULPI,
296	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
297};
298
299static int usbh2_phy_init(struct platform_device *pdev)
300{
301	gpio_set_value(USBH2_PHY_CS_GPIO, 0);
302	return 0;
303}
304
305static struct mxc_usbh_platform_data usbh2_pdata = {
306	.init	= usbh2_phy_init,
307	.portsc	= MXC_EHCI_MODE_ULPI,
308	.flags	= MXC_EHCI_INTERFACE_DIFF_UNI,
309};
310#endif
311
312static struct fsl_usb2_platform_data otg_device_pdata = {
313	.operating_mode = FSL_USB2_DR_DEVICE,
314	.phy_mode       = FSL_USB2_PHY_ULPI,
315};
316
317static int otg_mode_host;
318
319static int __init pca100_otg_mode(char *options)
320{
321	if (!strcmp(options, "host"))
322		otg_mode_host = 1;
323	else if (!strcmp(options, "device"))
324		otg_mode_host = 0;
325	else
326		pr_info("otg_mode neither \"host\" nor \"device\". "
327			"Defaulting to device\n");
328	return 0;
329}
330__setup("otg_mode=", pca100_otg_mode);
331
332/* framebuffer info */
333static struct imx_fb_videomode pca100_fb_modes[] = {
334	{
335		.mode = {
336			.name		= "EMERGING-ETV570G0DHU",
337			.refresh	= 60,
338			.xres		= 640,
339			.yres		= 480,
340			.pixclock	= 39722, /* in ps (25.175 MHz) */
341			.hsync_len	= 30,
342			.left_margin	= 114,
343			.right_margin	= 16,
344			.vsync_len	= 3,
345			.upper_margin	= 32,
346			.lower_margin	= 0,
347		},
348		/*
349		 * TFT
350		 * Pixel pol active high
351		 * HSYNC active low
352		 * VSYNC active low
353		 * use HSYNC for ACD count
354		 * line clock disable while idle
355		 * always enable line clock even if no data
356		 */
357		.pcr = 0xf0c08080,
358		.bpp = 16,
359	},
360};
361
362static struct imx_fb_platform_data pca100_fb_data = {
363	.mode = pca100_fb_modes,
364	.num_modes = ARRAY_SIZE(pca100_fb_modes),
365
366	.pwmr		= 0x00A903FF,
367	.lscr1		= 0x00120300,
368	.dmacr		= 0x00020010,
369};
370
371static void __init pca100_init(void)
372{
373	int ret;
374
375	/* SSI unit */
376	mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
377				  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
378				  MXC_AUDMUX_V1_PCR_TFCSEL(3) |
379				  MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
380				  MXC_AUDMUX_V1_PCR_RXDSEL(3));
381	mxc_audmux_v1_configure_port(3,
382				  MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
383				  MXC_AUDMUX_V1_PCR_TFCSEL(0) |
384				  MXC_AUDMUX_V1_PCR_TFSDIR |
385				  MXC_AUDMUX_V1_PCR_RXDSEL(0));
386
387	ret = mxc_gpio_setup_multiple_pins(pca100_pins,
388			ARRAY_SIZE(pca100_pins), "PCA100");
389	if (ret)
390		printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
391
392	mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
393
394	imx27_add_imx_uart0(&uart_pdata);
395
396	mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
397
398	imx27_add_mxc_nand(&pca100_nand_board_info);
399
400	/* only the i2c master 1 is used on this CPU card */
401	i2c_register_board_info(1, pca100_i2c_devices,
402				ARRAY_SIZE(pca100_i2c_devices));
403
404	imx27_add_i2c_imx1(&pca100_i2c1_data);
405
406#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
407	mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
408	mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
409	spi_register_board_info(pca100_spi_board_info,
410				ARRAY_SIZE(pca100_spi_board_info));
411	imx27_add_spi_imx0(&pca100_spi0_data);
412#endif
413
414	gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
415	gpio_direction_output(OTG_PHY_CS_GPIO, 1);
416	gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
417	gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
418
419#if defined(CONFIG_USB_ULPI)
420	if (otg_mode_host) {
421		otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
422				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
423
424		mxc_register_device(&mxc_otg_host, &otg_pdata);
425	}
426
427	usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
428				ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
429
430	mxc_register_device(&mxc_usbh2, &usbh2_pdata);
431#endif
432	if (!otg_mode_host) {
433		gpio_set_value(OTG_PHY_CS_GPIO, 0);
434		mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
435	}
436
437	mxc_register_device(&mxc_fb_device, &pca100_fb_data);
438
439	platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
440}
441
442static void __init pca100_timer_init(void)
443{
444	mx27_clocks_init(26000000);
445}
446
447static struct sys_timer pca100_timer = {
448	.init = pca100_timer_init,
449};
450
451MACHINE_START(PCA100, "phyCARD-i.MX27")
452	.phys_io        = MX27_AIPI_BASE_ADDR,
453	.io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
454	.boot_params    = MX27_PHYS_OFFSET + 0x100,
455	.map_io         = mx27_map_io,
456	.init_irq       = mx27_init_irq,
457	.init_machine   = pca100_init,
458	.timer          = &pca100_timer,
459MACHINE_END
460