1/* 2 * arch/alpha/kernel/traps.c 3 * 4 * (C) Copyright 1994 Linus Torvalds 5 */ 6 7/* 8 * This file initializes the trap entry points 9 */ 10 11#include <linux/jiffies.h> 12#include <linux/mm.h> 13#include <linux/sched.h> 14#include <linux/tty.h> 15#include <linux/delay.h> 16#include <linux/module.h> 17#include <linux/init.h> 18#include <linux/kallsyms.h> 19#include <linux/ratelimit.h> 20 21#include <asm/gentrap.h> 22#include <asm/uaccess.h> 23#include <asm/unaligned.h> 24#include <asm/sysinfo.h> 25#include <asm/hwrpb.h> 26#include <asm/mmu_context.h> 27 28#include "proto.h" 29 30 31static int opDEC_fix; 32 33static void __cpuinit 34opDEC_check(void) 35{ 36 __asm__ __volatile__ ( 37 /* Load the address of... */ 38 " br $16, 1f\n" 39 /* A stub instruction fault handler. Just add 4 to the 40 pc and continue. */ 41 " ldq $16, 8($sp)\n" 42 " addq $16, 4, $16\n" 43 " stq $16, 8($sp)\n" 44 " call_pal %[rti]\n" 45 /* Install the instruction fault handler. */ 46 "1: lda $17, 3\n" 47 " call_pal %[wrent]\n" 48 /* With that in place, the fault from the round-to-minf fp 49 insn will arrive either at the "lda 4" insn (bad) or one 50 past that (good). This places the correct fixup in %0. */ 51 " lda %[fix], 0\n" 52 " cvttq/svm $f31,$f31\n" 53 " lda %[fix], 4" 54 : [fix] "=r" (opDEC_fix) 55 : [rti] "n" (PAL_rti), [wrent] "n" (PAL_wrent) 56 : "$0", "$1", "$16", "$17", "$22", "$23", "$24", "$25"); 57 58 if (opDEC_fix) 59 printk("opDEC fixup enabled.\n"); 60} 61 62void 63dik_show_regs(struct pt_regs *regs, unsigned long *r9_15) 64{ 65 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx %s\n", 66 regs->pc, regs->r26, regs->ps, print_tainted()); 67 print_symbol("pc is at %s\n", regs->pc); 68 print_symbol("ra is at %s\n", regs->r26 ); 69 printk("v0 = %016lx t0 = %016lx t1 = %016lx\n", 70 regs->r0, regs->r1, regs->r2); 71 printk("t2 = %016lx t3 = %016lx t4 = %016lx\n", 72 regs->r3, regs->r4, regs->r5); 73 printk("t5 = %016lx t6 = %016lx t7 = %016lx\n", 74 regs->r6, regs->r7, regs->r8); 75 76 if (r9_15) { 77 printk("s0 = %016lx s1 = %016lx s2 = %016lx\n", 78 r9_15[9], r9_15[10], r9_15[11]); 79 printk("s3 = %016lx s4 = %016lx s5 = %016lx\n", 80 r9_15[12], r9_15[13], r9_15[14]); 81 printk("s6 = %016lx\n", r9_15[15]); 82 } 83 84 printk("a0 = %016lx a1 = %016lx a2 = %016lx\n", 85 regs->r16, regs->r17, regs->r18); 86 printk("a3 = %016lx a4 = %016lx a5 = %016lx\n", 87 regs->r19, regs->r20, regs->r21); 88 printk("t8 = %016lx t9 = %016lx t10= %016lx\n", 89 regs->r22, regs->r23, regs->r24); 90 printk("t11= %016lx pv = %016lx at = %016lx\n", 91 regs->r25, regs->r27, regs->r28); 92 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 93} 94 95 96static void 97dik_show_code(unsigned int *pc) 98{ 99 long i; 100 101 printk("Code:"); 102 for (i = -6; i < 2; i++) { 103 unsigned int insn; 104 if (__get_user(insn, (unsigned int __user *)pc + i)) 105 break; 106 printk("%c%08x%c", i ? ' ' : '<', insn, i ? ' ' : '>'); 107 } 108 printk("\n"); 109} 110 111static void 112dik_show_trace(unsigned long *sp) 113{ 114 long i = 0; 115 printk("Trace:\n"); 116 while (0x1ff8 & (unsigned long) sp) { 117 extern char _stext[], _etext[]; 118 unsigned long tmp = *sp; 119 sp++; 120 if (tmp < (unsigned long) &_stext) 121 continue; 122 if (tmp >= (unsigned long) &_etext) 123 continue; 124 printk("[<%lx>]", tmp); 125 print_symbol(" %s", tmp); 126 printk("\n"); 127 if (i > 40) { 128 printk(" ..."); 129 break; 130 } 131 } 132 printk("\n"); 133} 134 135static int kstack_depth_to_print = 24; 136 137void show_stack(struct task_struct *task, unsigned long *sp) 138{ 139 unsigned long *stack; 140 int i; 141 142 /* 143 * debugging aid: "show_stack(NULL);" prints the 144 * back trace for this cpu. 145 */ 146 if(sp==NULL) 147 sp=(unsigned long*)&sp; 148 149 stack = sp; 150 for(i=0; i < kstack_depth_to_print; i++) { 151 if (((long) stack & (THREAD_SIZE-1)) == 0) 152 break; 153 if (i && ((i % 4) == 0)) 154 printk("\n "); 155 printk("%016lx ", *stack++); 156 } 157 printk("\n"); 158 dik_show_trace(sp); 159} 160 161void dump_stack(void) 162{ 163 show_stack(NULL, NULL); 164} 165 166EXPORT_SYMBOL(dump_stack); 167 168void 169die_if_kernel(char * str, struct pt_regs *regs, long err, unsigned long *r9_15) 170{ 171 if (regs->ps & 8) 172 return; 173#ifdef CONFIG_SMP 174 printk("CPU %d ", hard_smp_processor_id()); 175#endif 176 printk("%s(%d): %s %ld\n", current->comm, task_pid_nr(current), str, err); 177 dik_show_regs(regs, r9_15); 178 add_taint(TAINT_DIE); 179 dik_show_trace((unsigned long *)(regs+1)); 180 dik_show_code((unsigned int *)regs->pc); 181 182 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 183 printk("die_if_kernel recursion detected.\n"); 184 local_irq_enable(); 185 while (1); 186 } 187 do_exit(SIGSEGV); 188} 189 190#ifndef CONFIG_MATHEMU 191static long dummy_emul(void) { return 0; } 192long (*alpha_fp_emul_imprecise)(struct pt_regs *regs, unsigned long writemask) 193 = (void *)dummy_emul; 194long (*alpha_fp_emul) (unsigned long pc) 195 = (void *)dummy_emul; 196#else 197long alpha_fp_emul_imprecise(struct pt_regs *regs, unsigned long writemask); 198long alpha_fp_emul (unsigned long pc); 199#endif 200 201asmlinkage void 202do_entArith(unsigned long summary, unsigned long write_mask, 203 struct pt_regs *regs) 204{ 205 long si_code = FPE_FLTINV; 206 siginfo_t info; 207 208 if (summary & 1) { 209 /* Software-completion summary bit is set, so try to 210 emulate the instruction. If the processor supports 211 precise exceptions, we don't have to search. */ 212 if (!amask(AMASK_PRECISE_TRAP)) 213 si_code = alpha_fp_emul(regs->pc - 4); 214 else 215 si_code = alpha_fp_emul_imprecise(regs, write_mask); 216 if (si_code == 0) 217 return; 218 } 219 die_if_kernel("Arithmetic fault", regs, 0, NULL); 220 221 info.si_signo = SIGFPE; 222 info.si_errno = 0; 223 info.si_code = si_code; 224 info.si_addr = (void __user *) regs->pc; 225 send_sig_info(SIGFPE, &info, current); 226} 227 228asmlinkage void 229do_entIF(unsigned long type, struct pt_regs *regs) 230{ 231 siginfo_t info; 232 int signo, code; 233 234 if ((regs->ps & ~IPL_MAX) == 0) { 235 if (type == 1) { 236 const unsigned int *data 237 = (const unsigned int *) regs->pc; 238 printk("Kernel bug at %s:%d\n", 239 (const char *)(data[1] | (long)data[2] << 32), 240 data[0]); 241 } 242 die_if_kernel((type == 1 ? "Kernel Bug" : "Instruction fault"), 243 regs, type, NULL); 244 } 245 246 switch (type) { 247 case 0: /* breakpoint */ 248 info.si_signo = SIGTRAP; 249 info.si_errno = 0; 250 info.si_code = TRAP_BRKPT; 251 info.si_trapno = 0; 252 info.si_addr = (void __user *) regs->pc; 253 254 if (ptrace_cancel_bpt(current)) { 255 regs->pc -= 4; /* make pc point to former bpt */ 256 } 257 258 send_sig_info(SIGTRAP, &info, current); 259 return; 260 261 case 1: /* bugcheck */ 262 info.si_signo = SIGTRAP; 263 info.si_errno = 0; 264 info.si_code = __SI_FAULT; 265 info.si_addr = (void __user *) regs->pc; 266 info.si_trapno = 0; 267 send_sig_info(SIGTRAP, &info, current); 268 return; 269 270 case 2: /* gentrap */ 271 info.si_addr = (void __user *) regs->pc; 272 info.si_trapno = regs->r16; 273 switch ((long) regs->r16) { 274 case GEN_INTOVF: 275 signo = SIGFPE; 276 code = FPE_INTOVF; 277 break; 278 case GEN_INTDIV: 279 signo = SIGFPE; 280 code = FPE_INTDIV; 281 break; 282 case GEN_FLTOVF: 283 signo = SIGFPE; 284 code = FPE_FLTOVF; 285 break; 286 case GEN_FLTDIV: 287 signo = SIGFPE; 288 code = FPE_FLTDIV; 289 break; 290 case GEN_FLTUND: 291 signo = SIGFPE; 292 code = FPE_FLTUND; 293 break; 294 case GEN_FLTINV: 295 signo = SIGFPE; 296 code = FPE_FLTINV; 297 break; 298 case GEN_FLTINE: 299 signo = SIGFPE; 300 code = FPE_FLTRES; 301 break; 302 case GEN_ROPRAND: 303 signo = SIGFPE; 304 code = __SI_FAULT; 305 break; 306 307 case GEN_DECOVF: 308 case GEN_DECDIV: 309 case GEN_DECINV: 310 case GEN_ASSERTERR: 311 case GEN_NULPTRERR: 312 case GEN_STKOVF: 313 case GEN_STRLENERR: 314 case GEN_SUBSTRERR: 315 case GEN_RANGERR: 316 case GEN_SUBRNG: 317 case GEN_SUBRNG1: 318 case GEN_SUBRNG2: 319 case GEN_SUBRNG3: 320 case GEN_SUBRNG4: 321 case GEN_SUBRNG5: 322 case GEN_SUBRNG6: 323 case GEN_SUBRNG7: 324 default: 325 signo = SIGTRAP; 326 code = __SI_FAULT; 327 break; 328 } 329 330 info.si_signo = signo; 331 info.si_errno = 0; 332 info.si_code = code; 333 info.si_addr = (void __user *) regs->pc; 334 send_sig_info(signo, &info, current); 335 return; 336 337 case 4: /* opDEC */ 338 if (implver() == IMPLVER_EV4) { 339 long si_code; 340 341 /* The some versions of SRM do not handle 342 the opDEC properly - they return the PC of the 343 opDEC fault, not the instruction after as the 344 Alpha architecture requires. Here we fix it up. 345 We do this by intentionally causing an opDEC 346 fault during the boot sequence and testing if 347 we get the correct PC. If not, we set a flag 348 to correct it every time through. */ 349 regs->pc += opDEC_fix; 350 351 /* EV4 does not implement anything except normal 352 rounding. Everything else will come here as 353 an illegal instruction. Emulate them. */ 354 si_code = alpha_fp_emul(regs->pc - 4); 355 if (si_code == 0) 356 return; 357 if (si_code > 0) { 358 info.si_signo = SIGFPE; 359 info.si_errno = 0; 360 info.si_code = si_code; 361 info.si_addr = (void __user *) regs->pc; 362 send_sig_info(SIGFPE, &info, current); 363 return; 364 } 365 } 366 break; 367 368 case 3: /* FEN fault */ 369 /* Irritating users can call PAL_clrfen to disable the 370 FPU for the process. The kernel will then trap in 371 do_switch_stack and undo_switch_stack when we try 372 to save and restore the FP registers. 373 374 Given that GCC by default generates code that uses the 375 FP registers, PAL_clrfen is not useful except for DoS 376 attacks. So turn the bleeding FPU back on and be done 377 with it. */ 378 current_thread_info()->pcb.flags |= 1; 379 __reload_thread(¤t_thread_info()->pcb); 380 return; 381 382 case 5: /* illoc */ 383 default: /* unexpected instruction-fault type */ 384 ; 385 } 386 387 info.si_signo = SIGILL; 388 info.si_errno = 0; 389 info.si_code = ILL_ILLOPC; 390 info.si_addr = (void __user *) regs->pc; 391 send_sig_info(SIGILL, &info, current); 392} 393 394/* There is an ifdef in the PALcode in MILO that enables a 395 "kernel debugging entry point" as an unprivileged call_pal. 396 397 We don't want to have anything to do with it, but unfortunately 398 several versions of MILO included in distributions have it enabled, 399 and if we don't put something on the entry point we'll oops. */ 400 401asmlinkage void 402do_entDbg(struct pt_regs *regs) 403{ 404 siginfo_t info; 405 406 die_if_kernel("Instruction fault", regs, 0, NULL); 407 408 info.si_signo = SIGILL; 409 info.si_errno = 0; 410 info.si_code = ILL_ILLOPC; 411 info.si_addr = (void __user *) regs->pc; 412 force_sig_info(SIGILL, &info, current); 413} 414 415 416/* 417 * entUna has a different register layout to be reasonably simple. It 418 * needs access to all the integer registers (the kernel doesn't use 419 * fp-regs), and it needs to have them in order for simpler access. 420 * 421 * Due to the non-standard register layout (and because we don't want 422 * to handle floating-point regs), user-mode unaligned accesses are 423 * handled separately by do_entUnaUser below. 424 * 425 * Oh, btw, we don't handle the "gp" register correctly, but if we fault 426 * on a gp-register unaligned load/store, something is _very_ wrong 427 * in the kernel anyway.. 428 */ 429struct allregs { 430 unsigned long regs[32]; 431 unsigned long ps, pc, gp, a0, a1, a2; 432}; 433 434struct unaligned_stat { 435 unsigned long count, va, pc; 436} unaligned[2]; 437 438 439/* Macro for exception fixup code to access integer registers. */ 440#define una_reg(r) (_regs[(r) >= 16 && (r) <= 18 ? (r)+19 : (r)]) 441 442 443asmlinkage void 444do_entUna(void * va, unsigned long opcode, unsigned long reg, 445 struct allregs *regs) 446{ 447 long error, tmp1, tmp2, tmp3, tmp4; 448 unsigned long pc = regs->pc - 4; 449 unsigned long *_regs = regs->regs; 450 const struct exception_table_entry *fixup; 451 452 unaligned[0].count++; 453 unaligned[0].va = (unsigned long) va; 454 unaligned[0].pc = pc; 455 456 /* We don't want to use the generic get/put unaligned macros as 457 we want to trap exceptions. Only if we actually get an 458 exception will we decide whether we should have caught it. */ 459 460 switch (opcode) { 461 case 0x0c: /* ldwu */ 462 __asm__ __volatile__( 463 "1: ldq_u %1,0(%3)\n" 464 "2: ldq_u %2,1(%3)\n" 465 " extwl %1,%3,%1\n" 466 " extwh %2,%3,%2\n" 467 "3:\n" 468 ".section __ex_table,\"a\"\n" 469 " .long 1b - .\n" 470 " lda %1,3b-1b(%0)\n" 471 " .long 2b - .\n" 472 " lda %2,3b-2b(%0)\n" 473 ".previous" 474 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 475 : "r"(va), "0"(0)); 476 if (error) 477 goto got_exception; 478 una_reg(reg) = tmp1|tmp2; 479 return; 480 481 case 0x28: /* ldl */ 482 __asm__ __volatile__( 483 "1: ldq_u %1,0(%3)\n" 484 "2: ldq_u %2,3(%3)\n" 485 " extll %1,%3,%1\n" 486 " extlh %2,%3,%2\n" 487 "3:\n" 488 ".section __ex_table,\"a\"\n" 489 " .long 1b - .\n" 490 " lda %1,3b-1b(%0)\n" 491 " .long 2b - .\n" 492 " lda %2,3b-2b(%0)\n" 493 ".previous" 494 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 495 : "r"(va), "0"(0)); 496 if (error) 497 goto got_exception; 498 una_reg(reg) = (int)(tmp1|tmp2); 499 return; 500 501 case 0x29: /* ldq */ 502 __asm__ __volatile__( 503 "1: ldq_u %1,0(%3)\n" 504 "2: ldq_u %2,7(%3)\n" 505 " extql %1,%3,%1\n" 506 " extqh %2,%3,%2\n" 507 "3:\n" 508 ".section __ex_table,\"a\"\n" 509 " .long 1b - .\n" 510 " lda %1,3b-1b(%0)\n" 511 " .long 2b - .\n" 512 " lda %2,3b-2b(%0)\n" 513 ".previous" 514 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 515 : "r"(va), "0"(0)); 516 if (error) 517 goto got_exception; 518 una_reg(reg) = tmp1|tmp2; 519 return; 520 521 /* Note that the store sequences do not indicate that they change 522 memory because it _should_ be affecting nothing in this context. 523 (Otherwise we have other, much larger, problems.) */ 524 case 0x0d: /* stw */ 525 __asm__ __volatile__( 526 "1: ldq_u %2,1(%5)\n" 527 "2: ldq_u %1,0(%5)\n" 528 " inswh %6,%5,%4\n" 529 " inswl %6,%5,%3\n" 530 " mskwh %2,%5,%2\n" 531 " mskwl %1,%5,%1\n" 532 " or %2,%4,%2\n" 533 " or %1,%3,%1\n" 534 "3: stq_u %2,1(%5)\n" 535 "4: stq_u %1,0(%5)\n" 536 "5:\n" 537 ".section __ex_table,\"a\"\n" 538 " .long 1b - .\n" 539 " lda %2,5b-1b(%0)\n" 540 " .long 2b - .\n" 541 " lda %1,5b-2b(%0)\n" 542 " .long 3b - .\n" 543 " lda $31,5b-3b(%0)\n" 544 " .long 4b - .\n" 545 " lda $31,5b-4b(%0)\n" 546 ".previous" 547 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 548 "=&r"(tmp3), "=&r"(tmp4) 549 : "r"(va), "r"(una_reg(reg)), "0"(0)); 550 if (error) 551 goto got_exception; 552 return; 553 554 case 0x2c: /* stl */ 555 __asm__ __volatile__( 556 "1: ldq_u %2,3(%5)\n" 557 "2: ldq_u %1,0(%5)\n" 558 " inslh %6,%5,%4\n" 559 " insll %6,%5,%3\n" 560 " msklh %2,%5,%2\n" 561 " mskll %1,%5,%1\n" 562 " or %2,%4,%2\n" 563 " or %1,%3,%1\n" 564 "3: stq_u %2,3(%5)\n" 565 "4: stq_u %1,0(%5)\n" 566 "5:\n" 567 ".section __ex_table,\"a\"\n" 568 " .long 1b - .\n" 569 " lda %2,5b-1b(%0)\n" 570 " .long 2b - .\n" 571 " lda %1,5b-2b(%0)\n" 572 " .long 3b - .\n" 573 " lda $31,5b-3b(%0)\n" 574 " .long 4b - .\n" 575 " lda $31,5b-4b(%0)\n" 576 ".previous" 577 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 578 "=&r"(tmp3), "=&r"(tmp4) 579 : "r"(va), "r"(una_reg(reg)), "0"(0)); 580 if (error) 581 goto got_exception; 582 return; 583 584 case 0x2d: /* stq */ 585 __asm__ __volatile__( 586 "1: ldq_u %2,7(%5)\n" 587 "2: ldq_u %1,0(%5)\n" 588 " insqh %6,%5,%4\n" 589 " insql %6,%5,%3\n" 590 " mskqh %2,%5,%2\n" 591 " mskql %1,%5,%1\n" 592 " or %2,%4,%2\n" 593 " or %1,%3,%1\n" 594 "3: stq_u %2,7(%5)\n" 595 "4: stq_u %1,0(%5)\n" 596 "5:\n" 597 ".section __ex_table,\"a\"\n\t" 598 " .long 1b - .\n" 599 " lda %2,5b-1b(%0)\n" 600 " .long 2b - .\n" 601 " lda %1,5b-2b(%0)\n" 602 " .long 3b - .\n" 603 " lda $31,5b-3b(%0)\n" 604 " .long 4b - .\n" 605 " lda $31,5b-4b(%0)\n" 606 ".previous" 607 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 608 "=&r"(tmp3), "=&r"(tmp4) 609 : "r"(va), "r"(una_reg(reg)), "0"(0)); 610 if (error) 611 goto got_exception; 612 return; 613 } 614 615 printk("Bad unaligned kernel access at %016lx: %p %lx %lu\n", 616 pc, va, opcode, reg); 617 do_exit(SIGSEGV); 618 619got_exception: 620 /* Ok, we caught the exception, but we don't want it. Is there 621 someone to pass it along to? */ 622 if ((fixup = search_exception_tables(pc)) != 0) { 623 unsigned long newpc; 624 newpc = fixup_exception(una_reg, fixup, pc); 625 626 printk("Forwarding unaligned exception at %lx (%lx)\n", 627 pc, newpc); 628 629 regs->pc = newpc; 630 return; 631 } 632 633 /* 634 * Yikes! No one to forward the exception to. 635 * Since the registers are in a weird format, dump them ourselves. 636 */ 637 638 printk("%s(%d): unhandled unaligned exception\n", 639 current->comm, task_pid_nr(current)); 640 641 printk("pc = [<%016lx>] ra = [<%016lx>] ps = %04lx\n", 642 pc, una_reg(26), regs->ps); 643 printk("r0 = %016lx r1 = %016lx r2 = %016lx\n", 644 una_reg(0), una_reg(1), una_reg(2)); 645 printk("r3 = %016lx r4 = %016lx r5 = %016lx\n", 646 una_reg(3), una_reg(4), una_reg(5)); 647 printk("r6 = %016lx r7 = %016lx r8 = %016lx\n", 648 una_reg(6), una_reg(7), una_reg(8)); 649 printk("r9 = %016lx r10= %016lx r11= %016lx\n", 650 una_reg(9), una_reg(10), una_reg(11)); 651 printk("r12= %016lx r13= %016lx r14= %016lx\n", 652 una_reg(12), una_reg(13), una_reg(14)); 653 printk("r15= %016lx\n", una_reg(15)); 654 printk("r16= %016lx r17= %016lx r18= %016lx\n", 655 una_reg(16), una_reg(17), una_reg(18)); 656 printk("r19= %016lx r20= %016lx r21= %016lx\n", 657 una_reg(19), una_reg(20), una_reg(21)); 658 printk("r22= %016lx r23= %016lx r24= %016lx\n", 659 una_reg(22), una_reg(23), una_reg(24)); 660 printk("r25= %016lx r27= %016lx r28= %016lx\n", 661 una_reg(25), una_reg(27), una_reg(28)); 662 printk("gp = %016lx sp = %p\n", regs->gp, regs+1); 663 664 dik_show_code((unsigned int *)pc); 665 dik_show_trace((unsigned long *)(regs+1)); 666 667 if (test_and_set_thread_flag (TIF_DIE_IF_KERNEL)) { 668 printk("die_if_kernel recursion detected.\n"); 669 local_irq_enable(); 670 while (1); 671 } 672 do_exit(SIGSEGV); 673} 674 675/* 676 * Convert an s-floating point value in memory format to the 677 * corresponding value in register format. The exponent 678 * needs to be remapped to preserve non-finite values 679 * (infinities, not-a-numbers, denormals). 680 */ 681static inline unsigned long 682s_mem_to_reg (unsigned long s_mem) 683{ 684 unsigned long frac = (s_mem >> 0) & 0x7fffff; 685 unsigned long sign = (s_mem >> 31) & 0x1; 686 unsigned long exp_msb = (s_mem >> 30) & 0x1; 687 unsigned long exp_low = (s_mem >> 23) & 0x7f; 688 unsigned long exp; 689 690 exp = (exp_msb << 10) | exp_low; /* common case */ 691 if (exp_msb) { 692 if (exp_low == 0x7f) { 693 exp = 0x7ff; 694 } 695 } else { 696 if (exp_low == 0x00) { 697 exp = 0x000; 698 } else { 699 exp |= (0x7 << 7); 700 } 701 } 702 return (sign << 63) | (exp << 52) | (frac << 29); 703} 704 705/* 706 * Convert an s-floating point value in register format to the 707 * corresponding value in memory format. 708 */ 709static inline unsigned long 710s_reg_to_mem (unsigned long s_reg) 711{ 712 return ((s_reg >> 62) << 30) | ((s_reg << 5) >> 34); 713} 714 715/* 716 * Handle user-level unaligned fault. Handling user-level unaligned 717 * faults is *extremely* slow and produces nasty messages. A user 718 * program *should* fix unaligned faults ASAP. 719 * 720 * Notice that we have (almost) the regular kernel stack layout here, 721 * so finding the appropriate registers is a little more difficult 722 * than in the kernel case. 723 * 724 * Finally, we handle regular integer load/stores only. In 725 * particular, load-linked/store-conditionally and floating point 726 * load/stores are not supported. The former make no sense with 727 * unaligned faults (they are guaranteed to fail) and I don't think 728 * the latter will occur in any decent program. 729 * 730 * Sigh. We *do* have to handle some FP operations, because GCC will 731 * uses them as temporary storage for integer memory to memory copies. 732 * However, we need to deal with stt/ldt and sts/lds only. 733 */ 734 735#define OP_INT_MASK ( 1L << 0x28 | 1L << 0x2c /* ldl stl */ \ 736 | 1L << 0x29 | 1L << 0x2d /* ldq stq */ \ 737 | 1L << 0x0c | 1L << 0x0d /* ldwu stw */ \ 738 | 1L << 0x0a | 1L << 0x0e ) /* ldbu stb */ 739 740#define OP_WRITE_MASK ( 1L << 0x26 | 1L << 0x27 /* sts stt */ \ 741 | 1L << 0x2c | 1L << 0x2d /* stl stq */ \ 742 | 1L << 0x0d | 1L << 0x0e ) /* stw stb */ 743 744#define R(x) ((size_t) &((struct pt_regs *)0)->x) 745 746static int unauser_reg_offsets[32] = { 747 R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), R(r8), 748 /* r9 ... r15 are stored in front of regs. */ 749 -56, -48, -40, -32, -24, -16, -8, 750 R(r16), R(r17), R(r18), 751 R(r19), R(r20), R(r21), R(r22), R(r23), R(r24), R(r25), R(r26), 752 R(r27), R(r28), R(gp), 753 0, 0 754}; 755 756#undef R 757 758asmlinkage void 759do_entUnaUser(void __user * va, unsigned long opcode, 760 unsigned long reg, struct pt_regs *regs) 761{ 762 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5); 763 764 unsigned long tmp1, tmp2, tmp3, tmp4; 765 unsigned long fake_reg, *reg_addr = &fake_reg; 766 siginfo_t info; 767 long error; 768 769 /* Check the UAC bits to decide what the user wants us to do 770 with the unaliged access. */ 771 772 if (!test_thread_flag (TIF_UAC_NOPRINT)) { 773 if (__ratelimit(&ratelimit)) { 774 printk("%s(%d): unaligned trap at %016lx: %p %lx %ld\n", 775 current->comm, task_pid_nr(current), 776 regs->pc - 4, va, opcode, reg); 777 } 778 } 779 if (test_thread_flag (TIF_UAC_SIGBUS)) 780 goto give_sigbus; 781 /* Not sure why you'd want to use this, but... */ 782 if (test_thread_flag (TIF_UAC_NOFIX)) 783 return; 784 785 /* Don't bother reading ds in the access check since we already 786 know that this came from the user. Also rely on the fact that 787 the page at TASK_SIZE is unmapped and so can't be touched anyway. */ 788 if (!__access_ok((unsigned long)va, 0, USER_DS)) 789 goto give_sigsegv; 790 791 ++unaligned[1].count; 792 unaligned[1].va = (unsigned long)va; 793 unaligned[1].pc = regs->pc - 4; 794 795 if ((1L << opcode) & OP_INT_MASK) { 796 /* it's an integer load/store */ 797 if (reg < 30) { 798 reg_addr = (unsigned long *) 799 ((char *)regs + unauser_reg_offsets[reg]); 800 } else if (reg == 30) { 801 /* usp in PAL regs */ 802 fake_reg = rdusp(); 803 } else { 804 /* zero "register" */ 805 fake_reg = 0; 806 } 807 } 808 809 /* We don't want to use the generic get/put unaligned macros as 810 we want to trap exceptions. Only if we actually get an 811 exception will we decide whether we should have caught it. */ 812 813 switch (opcode) { 814 case 0x0c: /* ldwu */ 815 __asm__ __volatile__( 816 "1: ldq_u %1,0(%3)\n" 817 "2: ldq_u %2,1(%3)\n" 818 " extwl %1,%3,%1\n" 819 " extwh %2,%3,%2\n" 820 "3:\n" 821 ".section __ex_table,\"a\"\n" 822 " .long 1b - .\n" 823 " lda %1,3b-1b(%0)\n" 824 " .long 2b - .\n" 825 " lda %2,3b-2b(%0)\n" 826 ".previous" 827 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 828 : "r"(va), "0"(0)); 829 if (error) 830 goto give_sigsegv; 831 *reg_addr = tmp1|tmp2; 832 break; 833 834 case 0x22: /* lds */ 835 __asm__ __volatile__( 836 "1: ldq_u %1,0(%3)\n" 837 "2: ldq_u %2,3(%3)\n" 838 " extll %1,%3,%1\n" 839 " extlh %2,%3,%2\n" 840 "3:\n" 841 ".section __ex_table,\"a\"\n" 842 " .long 1b - .\n" 843 " lda %1,3b-1b(%0)\n" 844 " .long 2b - .\n" 845 " lda %2,3b-2b(%0)\n" 846 ".previous" 847 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 848 : "r"(va), "0"(0)); 849 if (error) 850 goto give_sigsegv; 851 alpha_write_fp_reg(reg, s_mem_to_reg((int)(tmp1|tmp2))); 852 return; 853 854 case 0x23: /* ldt */ 855 __asm__ __volatile__( 856 "1: ldq_u %1,0(%3)\n" 857 "2: ldq_u %2,7(%3)\n" 858 " extql %1,%3,%1\n" 859 " extqh %2,%3,%2\n" 860 "3:\n" 861 ".section __ex_table,\"a\"\n" 862 " .long 1b - .\n" 863 " lda %1,3b-1b(%0)\n" 864 " .long 2b - .\n" 865 " lda %2,3b-2b(%0)\n" 866 ".previous" 867 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 868 : "r"(va), "0"(0)); 869 if (error) 870 goto give_sigsegv; 871 alpha_write_fp_reg(reg, tmp1|tmp2); 872 return; 873 874 case 0x28: /* ldl */ 875 __asm__ __volatile__( 876 "1: ldq_u %1,0(%3)\n" 877 "2: ldq_u %2,3(%3)\n" 878 " extll %1,%3,%1\n" 879 " extlh %2,%3,%2\n" 880 "3:\n" 881 ".section __ex_table,\"a\"\n" 882 " .long 1b - .\n" 883 " lda %1,3b-1b(%0)\n" 884 " .long 2b - .\n" 885 " lda %2,3b-2b(%0)\n" 886 ".previous" 887 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 888 : "r"(va), "0"(0)); 889 if (error) 890 goto give_sigsegv; 891 *reg_addr = (int)(tmp1|tmp2); 892 break; 893 894 case 0x29: /* ldq */ 895 __asm__ __volatile__( 896 "1: ldq_u %1,0(%3)\n" 897 "2: ldq_u %2,7(%3)\n" 898 " extql %1,%3,%1\n" 899 " extqh %2,%3,%2\n" 900 "3:\n" 901 ".section __ex_table,\"a\"\n" 902 " .long 1b - .\n" 903 " lda %1,3b-1b(%0)\n" 904 " .long 2b - .\n" 905 " lda %2,3b-2b(%0)\n" 906 ".previous" 907 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2) 908 : "r"(va), "0"(0)); 909 if (error) 910 goto give_sigsegv; 911 *reg_addr = tmp1|tmp2; 912 break; 913 914 /* Note that the store sequences do not indicate that they change 915 memory because it _should_ be affecting nothing in this context. 916 (Otherwise we have other, much larger, problems.) */ 917 case 0x0d: /* stw */ 918 __asm__ __volatile__( 919 "1: ldq_u %2,1(%5)\n" 920 "2: ldq_u %1,0(%5)\n" 921 " inswh %6,%5,%4\n" 922 " inswl %6,%5,%3\n" 923 " mskwh %2,%5,%2\n" 924 " mskwl %1,%5,%1\n" 925 " or %2,%4,%2\n" 926 " or %1,%3,%1\n" 927 "3: stq_u %2,1(%5)\n" 928 "4: stq_u %1,0(%5)\n" 929 "5:\n" 930 ".section __ex_table,\"a\"\n" 931 " .long 1b - .\n" 932 " lda %2,5b-1b(%0)\n" 933 " .long 2b - .\n" 934 " lda %1,5b-2b(%0)\n" 935 " .long 3b - .\n" 936 " lda $31,5b-3b(%0)\n" 937 " .long 4b - .\n" 938 " lda $31,5b-4b(%0)\n" 939 ".previous" 940 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 941 "=&r"(tmp3), "=&r"(tmp4) 942 : "r"(va), "r"(*reg_addr), "0"(0)); 943 if (error) 944 goto give_sigsegv; 945 return; 946 947 case 0x26: /* sts */ 948 fake_reg = s_reg_to_mem(alpha_read_fp_reg(reg)); 949 /* FALLTHRU */ 950 951 case 0x2c: /* stl */ 952 __asm__ __volatile__( 953 "1: ldq_u %2,3(%5)\n" 954 "2: ldq_u %1,0(%5)\n" 955 " inslh %6,%5,%4\n" 956 " insll %6,%5,%3\n" 957 " msklh %2,%5,%2\n" 958 " mskll %1,%5,%1\n" 959 " or %2,%4,%2\n" 960 " or %1,%3,%1\n" 961 "3: stq_u %2,3(%5)\n" 962 "4: stq_u %1,0(%5)\n" 963 "5:\n" 964 ".section __ex_table,\"a\"\n" 965 " .long 1b - .\n" 966 " lda %2,5b-1b(%0)\n" 967 " .long 2b - .\n" 968 " lda %1,5b-2b(%0)\n" 969 " .long 3b - .\n" 970 " lda $31,5b-3b(%0)\n" 971 " .long 4b - .\n" 972 " lda $31,5b-4b(%0)\n" 973 ".previous" 974 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 975 "=&r"(tmp3), "=&r"(tmp4) 976 : "r"(va), "r"(*reg_addr), "0"(0)); 977 if (error) 978 goto give_sigsegv; 979 return; 980 981 case 0x27: /* stt */ 982 fake_reg = alpha_read_fp_reg(reg); 983 /* FALLTHRU */ 984 985 case 0x2d: /* stq */ 986 __asm__ __volatile__( 987 "1: ldq_u %2,7(%5)\n" 988 "2: ldq_u %1,0(%5)\n" 989 " insqh %6,%5,%4\n" 990 " insql %6,%5,%3\n" 991 " mskqh %2,%5,%2\n" 992 " mskql %1,%5,%1\n" 993 " or %2,%4,%2\n" 994 " or %1,%3,%1\n" 995 "3: stq_u %2,7(%5)\n" 996 "4: stq_u %1,0(%5)\n" 997 "5:\n" 998 ".section __ex_table,\"a\"\n\t" 999 " .long 1b - .\n" 1000 " lda %2,5b-1b(%0)\n" 1001 " .long 2b - .\n" 1002 " lda %1,5b-2b(%0)\n" 1003 " .long 3b - .\n" 1004 " lda $31,5b-3b(%0)\n" 1005 " .long 4b - .\n" 1006 " lda $31,5b-4b(%0)\n" 1007 ".previous" 1008 : "=r"(error), "=&r"(tmp1), "=&r"(tmp2), 1009 "=&r"(tmp3), "=&r"(tmp4) 1010 : "r"(va), "r"(*reg_addr), "0"(0)); 1011 if (error) 1012 goto give_sigsegv; 1013 return; 1014 1015 default: 1016 /* What instruction were you trying to use, exactly? */ 1017 goto give_sigbus; 1018 } 1019 1020 /* Only integer loads should get here; everyone else returns early. */ 1021 if (reg == 30) 1022 wrusp(fake_reg); 1023 return; 1024 1025give_sigsegv: 1026 regs->pc -= 4; /* make pc point to faulting insn */ 1027 info.si_signo = SIGSEGV; 1028 info.si_errno = 0; 1029 1030 /* We need to replicate some of the logic in mm/fault.c, 1031 since we don't have access to the fault code in the 1032 exception handling return path. */ 1033 if (!__access_ok((unsigned long)va, 0, USER_DS)) 1034 info.si_code = SEGV_ACCERR; 1035 else { 1036 struct mm_struct *mm = current->mm; 1037 down_read(&mm->mmap_sem); 1038 if (find_vma(mm, (unsigned long)va)) 1039 info.si_code = SEGV_ACCERR; 1040 else 1041 info.si_code = SEGV_MAPERR; 1042 up_read(&mm->mmap_sem); 1043 } 1044 info.si_addr = va; 1045 send_sig_info(SIGSEGV, &info, current); 1046 return; 1047 1048give_sigbus: 1049 regs->pc -= 4; 1050 info.si_signo = SIGBUS; 1051 info.si_errno = 0; 1052 info.si_code = BUS_ADRALN; 1053 info.si_addr = va; 1054 send_sig_info(SIGBUS, &info, current); 1055 return; 1056} 1057 1058void __cpuinit 1059trap_init(void) 1060{ 1061 /* Tell PAL-code what global pointer we want in the kernel. */ 1062 register unsigned long gptr __asm__("$29"); 1063 wrkgp(gptr); 1064 1065 /* Hack for Multia (UDB) and JENSEN: some of their SRMs have 1066 a bug in the handling of the opDEC fault. Fix it up if so. */ 1067 if (implver() == IMPLVER_EV4) 1068 opDEC_check(); 1069 1070 wrent(entArith, 1); 1071 wrent(entMM, 2); 1072 wrent(entIF, 3); 1073 wrent(entUna, 4); 1074 wrent(entSys, 5); 1075 wrent(entDbg, 6); 1076} 1077