1/* 2 * siu.h - ALSA SoC driver for Renesas SH7343, SH7722 SIU peripheral. 3 * 4 * Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de> 5 * Copyright (C) 2006 Carlos Munoz <carlos@kenati.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20 */ 21 22#ifndef SIU_H 23#define SIU_H 24 25/* Common kernel and user-space firmware-building defines and types */ 26 27#define YRAM0_SIZE (0x0040 / 4) /* 16 */ 28#define YRAM1_SIZE (0x0080 / 4) /* 32 */ 29#define YRAM2_SIZE (0x0040 / 4) /* 16 */ 30#define YRAM3_SIZE (0x0080 / 4) /* 32 */ 31#define YRAM4_SIZE (0x0080 / 4) /* 32 */ 32#define YRAM_DEF_SIZE (YRAM0_SIZE + YRAM1_SIZE + YRAM2_SIZE + \ 33 YRAM3_SIZE + YRAM4_SIZE) 34#define YRAM_FIR_SIZE (0x0400 / 4) /* 256 */ 35#define YRAM_IIR_SIZE (0x0200 / 4) /* 128 */ 36 37#define XRAM0_SIZE (0x0400 / 4) /* 256 */ 38#define XRAM1_SIZE (0x0200 / 4) /* 128 */ 39#define XRAM2_SIZE (0x0200 / 4) /* 128 */ 40 41/* PRAM program array size */ 42#define PRAM0_SIZE (0x0100 / 4) /* 64 */ 43#define PRAM1_SIZE ((0x2000 - 0x0100) / 4) /* 1984 */ 44 45#include <linux/types.h> 46 47struct siu_spb_param { 48 __u32 ab1a; /* input FIFO address */ 49 __u32 ab0a; /* output FIFO address */ 50 __u32 dir; /* 0=the ather except CPUOUTPUT, 1=CPUINPUT */ 51 __u32 event; /* SPB program starting conditions */ 52 __u32 stfifo; /* STFIFO register setting value */ 53 __u32 trdat; /* TRDAT register setting value */ 54}; 55 56struct siu_firmware { 57 __u32 yram_fir_coeff[YRAM_FIR_SIZE]; 58 __u32 pram0[PRAM0_SIZE]; 59 __u32 pram1[PRAM1_SIZE]; 60 __u32 yram0[YRAM0_SIZE]; 61 __u32 yram1[YRAM1_SIZE]; 62 __u32 yram2[YRAM2_SIZE]; 63 __u32 yram3[YRAM3_SIZE]; 64 __u32 yram4[YRAM4_SIZE]; 65 __u32 spbpar_num; 66 struct siu_spb_param spbpar[32]; 67}; 68 69#ifdef __KERNEL__ 70 71#include <linux/dmaengine.h> 72#include <linux/interrupt.h> 73#include <linux/io.h> 74#include <linux/sh_dma.h> 75 76#include <sound/core.h> 77#include <sound/pcm.h> 78#include <sound/soc-dai.h> 79 80#define SIU_PERIOD_BYTES_MAX 8192 /* DMA transfer/period size */ 81#define SIU_PERIOD_BYTES_MIN 256 /* DMA transfer/period size */ 82#define SIU_PERIODS_MAX 64 /* Max periods in buffer */ 83#define SIU_PERIODS_MIN 4 /* Min periods in buffer */ 84#define SIU_BUFFER_BYTES_MAX (SIU_PERIOD_BYTES_MAX * SIU_PERIODS_MAX) 85 86/* SIU ports: only one can be used at a time */ 87enum { 88 SIU_PORT_A, 89 SIU_PORT_B, 90 SIU_PORT_NUM, 91}; 92 93/* SIU clock configuration */ 94enum { 95 SIU_CLKA_PLL, 96 SIU_CLKA_EXT, 97 SIU_CLKB_PLL, 98 SIU_CLKB_EXT 99}; 100 101struct siu_info { 102 int port_id; 103 u32 __iomem *pram; 104 u32 __iomem *xram; 105 u32 __iomem *yram; 106 u32 __iomem *reg; 107 struct siu_firmware fw; 108}; 109 110struct siu_stream { 111 struct tasklet_struct tasklet; 112 struct snd_pcm_substream *substream; 113 snd_pcm_format_t format; 114 size_t buf_bytes; 115 size_t period_bytes; 116 int cur_period; /* Period currently in dma */ 117 u32 volume; 118 snd_pcm_sframes_t xfer_cnt; /* Number of frames */ 119 u8 rw_flg; /* transfer status */ 120 /* DMA status */ 121 struct dma_chan *chan; /* DMA channel */ 122 struct dma_async_tx_descriptor *tx_desc; 123 dma_cookie_t cookie; 124 struct sh_dmae_slave param; 125}; 126 127struct siu_port { 128 unsigned long play_cap; /* Used to track full duplex */ 129 struct snd_pcm *pcm; 130 struct siu_stream playback; 131 struct siu_stream capture; 132 u32 stfifo; /* STFIFO value from firmware */ 133 u32 trdat; /* TRDAT value from firmware */ 134}; 135 136extern struct siu_port *siu_ports[SIU_PORT_NUM]; 137 138static inline struct siu_port *siu_port_info(struct snd_pcm_substream *substream) 139{ 140 struct platform_device *pdev = 141 to_platform_device(substream->pcm->card->dev); 142 return siu_ports[pdev->id]; 143} 144 145/* Register access */ 146static inline void siu_write32(u32 __iomem *addr, u32 val) 147{ 148 __raw_writel(val, addr); 149} 150 151static inline u32 siu_read32(u32 __iomem *addr) 152{ 153 return __raw_readl(addr); 154} 155 156/* SIU registers */ 157#define SIU_IFCTL (0x000 / sizeof(u32)) 158#define SIU_SRCTL (0x004 / sizeof(u32)) 159#define SIU_SFORM (0x008 / sizeof(u32)) 160#define SIU_CKCTL (0x00c / sizeof(u32)) 161#define SIU_TRDAT (0x010 / sizeof(u32)) 162#define SIU_STFIFO (0x014 / sizeof(u32)) 163#define SIU_DPAK (0x01c / sizeof(u32)) 164#define SIU_CKREV (0x020 / sizeof(u32)) 165#define SIU_EVNTC (0x028 / sizeof(u32)) 166#define SIU_SBCTL (0x040 / sizeof(u32)) 167#define SIU_SBPSET (0x044 / sizeof(u32)) 168#define SIU_SBFSTS (0x068 / sizeof(u32)) 169#define SIU_SBDVCA (0x06c / sizeof(u32)) 170#define SIU_SBDVCB (0x070 / sizeof(u32)) 171#define SIU_SBACTIV (0x074 / sizeof(u32)) 172#define SIU_DMAIA (0x090 / sizeof(u32)) 173#define SIU_DMAIB (0x094 / sizeof(u32)) 174#define SIU_DMAOA (0x098 / sizeof(u32)) 175#define SIU_DMAOB (0x09c / sizeof(u32)) 176#define SIU_DMAML (0x0a0 / sizeof(u32)) 177#define SIU_SPSTS (0x0cc / sizeof(u32)) 178#define SIU_SPCTL (0x0d0 / sizeof(u32)) 179#define SIU_BRGASEL (0x100 / sizeof(u32)) 180#define SIU_BRRA (0x104 / sizeof(u32)) 181#define SIU_BRGBSEL (0x108 / sizeof(u32)) 182#define SIU_BRRB (0x10c / sizeof(u32)) 183 184extern struct snd_soc_platform siu_platform; 185extern struct snd_soc_dai siu_i2s_dai; 186 187int siu_init_port(int port, struct siu_port **port_info, struct snd_card *card); 188void siu_free_port(struct siu_port *port_info); 189 190#endif 191 192#endif /* SIU_H */ 193